PD - 94418

IRFB20N50K SMPS MOSFET Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits

HEXFET® Power MOSFET

VDSS

RDS(on) typ.

ID

500V

0.21Ω

20A

Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamicdv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) l

TO-220AB

Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG

Parameter

Max.

Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting Torque, 6-32 or M3 screw

20 12 80 280 2.2 ± 30 6.9 -55 to + 150

Units A W W/°C V V/ns

300

°C

10

N

Avalanche Characteristics Symbol EAS IAR EAR

Parameter Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy

Typ.

Max.

Units

––– ––– –––

330 20 28

mJ A mJ

Typ.

Max.

Units

––– 0.50 –––

0.45 ––– 58

°C/W

Thermal Resistance Symbol RθJC RθCS RθJA

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Parameter Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient

1 4/2/02

IRFB20N50K Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS

Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage IDSS

Drain-to-Source Leakage Current

IGSS

Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage

Min. 500 ––– ––– 3.0 ––– ––– ––– –––

Typ. ––– 0.61 0.21 ––– ––– ––– ––– –––

Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 0.25 Ω VGS = 10V, ID = 12A „ 5.0 V VDS = VGS, ID = 250µA 50 µA VDS = 500V, VGS = 0V 250 µA VDS = 400V, VGS = 0V, TJ = 125°C 100 VGS = 30V nA -100 VGS = -30V

Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff.

Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance

Min. 11 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––

Typ. ––– ––– ––– ––– 22 74 45 33 2870 320 34 3480 85 160

Max. Units Conditions ––– S VDS = 50V, ID = 12A 110 ID = 20A 33 nC VDS = 400V 54 VGS = 10V, See Fig. 6 and 13 „ ––– VDD = 250V ––– ID = 20A ns ––– RG = 7.5Ω ––– VGS = 10V,See Fig. 10 „ ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 400V …

Diode Characteristics Symbol IS I SM

VSD t rr Q rr ton

Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time

Min. Typ. Max. Units

Conditions D MOSFET symbol 20 ––– ––– showing the A G integral reverse ––– ––– 80 S p-n junction diode. ––– ––– 1.5 V TJ = 25°C, IS = 20A, VGS = 0V „ ––– 520 780 ns TJ = 25°C, IF = 20A ––– 5.3 8.0 µC di/dt = 100A/µs „ Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

 Repetitive rating; pulse width limited by max. junction temperature.

‚ Starting TJ = 25°C, L = 1.6mH, RG = 25Ω, IAS = 20A,

2

ƒ ISD ≤ 20A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C

„ Pulse width ≤ 400µs; duty cycle ≤ 2%.

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IRFB20N50K 100

100

VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V

VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V

10

TOP

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

TOP

1

0.1

5.0V 20µs PULSE WIDTH Tj = 25°C

10

5.0V 1

20µs PULSE WIDTH Tj = 150°C

0.01

0.1

0.1

1

10

100

0.1

1

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output Characteristics

3.5

T J = 150°C

T J = 25°C

0.1

VDS = 50V 20µs PULSE WIDTH

0.0 7.0

8.0

9.0

VGS , Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

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10.0

2.5

(Normalized)

10.0

6.0

I D = 20A

3.0

R DS(on) , Drain-to-Source On Resistance

ID, Drain-to-Source Current (Α)

100.0

5.0

100

VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

1.0

10

2.0

1.5

1.0

0.5

V GS = 10V 0.0 -60

-40

-20

0

20

40

60

TJ , Junction Temperature

80

100

120

140

160

( °C)

Fig 4. Normalized On-Resistance Vs. Temperature

3

IRFB20N50K 20

100000

VDS = 400V VDS = 250V VDS = 100V

16

= Cgd = Cds + Cgd

VGS , Gate-to-Source Voltage (V)

Crss Coss

10000

C, Capacitance (pF)

ID==21A 20A ID

VGS = 0V, f = 1 MHZ C iss = C gs + C gd , C ds SHORTED

Ciss 1000

Coss 100

Crss

12

8

4

FOR TEST CIRCUIT SEE FIGURE13

10

0

1

10

100

1000

0

20

40

60

80

100

120

QG, Total Gate Charge (nC)

VDS, Drain-to-Source Voltage (V)

Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage

100.0

1000

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

OPERATION IN THIS AREA LIMITED BY RDS (on) 100

T J = 150°C

10.0

1.0 T J = 25°C VGS = 0V

0.1 0.2

0.4

0.6

0.8

1.0

VSD, Source-toDrain Voltage (V)

Fig 7. Typical Source-Drain Diode Forward Voltage

4

10

1msec 1

0.1

1.2

100µsec

Tc = 25°C Tj = 150°C Single Pulse 1

10

10msec

100

1000

10000

VDS , Drain-toSource Voltage (V)

Fig 8. Maximum Safe Operating Area

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IRFB20N50K 20

RD

V DS VGS

ID , Drain Current (A)

16

D.U.T.

RG

+

-VDD

10V

12

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 8

Fig 10a. Switching Time Test Circuit VDS

4

90% 0 25

50

75

100

125

150

T C, Case Temperature (°C)

10% VGS

Fig 9. Maximum Drain Current Vs. Case Temperature

td(on)

tr

t d(off)

tf

Fig 10b. Switching Time Waveforms

(Z thJC)

1

D = 0.50

0.1

0.20

Thermal Response

0.10 0.05 0.02 0.01

SINGLE PULSE (THERMAL RESPONSE)

P DM

0.01

t1 t2 Notes: 1. Duty factor D = 2. Peak T

0.001 0.00001

0.0001

0.001

0.01

t1 / t 2

J = P DM x Z thJC

+TC

0.1

1

t1, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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5

IRFB20N50K 600

15V

ID TOP

D.U.T

RG

IAS VGS 20V

DRIVER

+ V - DD

BOTTOM

A

0.01Ω

tp

Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp

EAS , Single Pulse Avalanche Energy (mJ)

L

VDS

9.4A 17A 20A

500

400

300

200

100

0 25

50

75

100

125

150

Starting TJ, Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS

Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T.

50KΩ

QG

12V

.2µF .3µF

VGS QGS

D.U.T.

QGD

+ V - DS

VGS

VG

3mA

IG

Charge

Fig 13a. Basic Gate Charge Waveform

6

ID

Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

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IRFB20N50K Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer

+

D.U.T

ƒ +

‚ -

-

„

+

 RG

• • • •

dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test

Driver Gate Drive P.W.

Period

D=

+ -

VDD

P.W. Period VGS=10V

*

D.U.T. ISD Waveform Reverse Recovery Current

Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt

Re-Applied Voltage

Body Diode

VDD

Forward Drop

Inductor Curent Ripple ≤ 5%

ISD

* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS

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7

IRFB20N50K TO-220 Package Outline Dimensions are shown in millimeters (inches)

2.87 (.113) 2.62 (.103)

10.54 (.415) 10.29 (.405)

-B-

3.78 (.149) 3.54 (.139)

4.69 (.185) 4.20 (.165)

-A-

1.32 (.052) 1.22 (.048)

6.47 (.255) 6.10 (.240)

4 15.24 (.600) 14.84 (.584)

LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN

1.15 (.045) MIN 1

2

3

14.09 (.555) 13.47 (.530)

4.06 (.160) 3.55 (.140)

3X 3X

1.40 (.055) 1.15 (.045)

0.93 (.037) 0.69 (.027)

0.36 (.014)

3X M

B A M

2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH

0.55 (.022) 0.46 (.018)

2.92 (.115) 2.64 (.104)

3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220 Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C"

INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE

PART NUMBER

DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.4/02

8

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