New Product
Si7143DP Vishay Siliconix
P-Channel 30-V (D-S) MOSFET FEATURES
PRODUCT SUMMARY RDS(on) (Ω)
ID (A)e,f
0.0100 at VGS = - 10 V
- 35
0.0186 at VGS = - 4.5V
- 35
VDS (V) - 30
• Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • Low Thermal Resistance PowerPAK® Package with Small Size and Low 1.07 mm Profile • 100 % Rg Tested • 100 % UIS Tested • Compliant to RoHS Directive 2002/95/EC
Qg (Typ.) 24.6 nC
PowerPAK SO-8
APPLICATIONS S
6.15 mm
• Load Switch • Adaptor Switch • Notebook PC
5.15 mm
1
S 2
S 3
S
G
G
4 D 8
D 7
D 6
D 5
D Bottom View P-Channel MOSFET
Ordering Information: Si7143DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Symbol VDS VGS TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C
ID
IDM
Pulsed Drain Current Continuous Source-Drain Diode Current
TC = 25 °C TA = 25 °C
IS
Avalanche Current Single-Pulse Avalanche Energy
L = 0.1 mH
IAS EAS
Maximum Power Dissipation
TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C
PD
Limit - 30 ± 20 - 35e - 35e - 16.1a, b - 12.9a, b - 60 - 30 - 3.5a, b - 25 31.25 35.7 22.8 4.2a, b 2.7a, b - 50 to 150 260
Unit V
A
mJ
W
TJ, Tstg °C Soldering Recommendations (Peak Temperature)c, d Notes: a. Surface mounted on 1" x 1" FR4 board. b. t = 10 s. c. See solder profile (www.vishay.com/ppg?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. d. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. e. Package limited. f. Based on TC = 25 °C Operating Junction and Storage Temperature Range
Document Number: 65670 S10-0112-Rev. A, 18-Jan-10
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Si7143DP Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambienta, b Maximum Junction-to-Case (Drain)
Symbol RthJA RthJC
t ≤ 10 s Steady State
Typical 25 2.9
Maximum 30 3.5
Unit °C/W
Notes: a. Surface mounted on 1" x 1" FR4 board. b. Maximum under steady state conditions is 70 °C/W.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter
Symbol
Test Conditions
Min.
Static Drain-Source Breakdown Voltage VDS Temperature Coefficient
VDS
VGS = 0 V, ID = - 250 µA
- 30
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
ID = - 250 µA
Gate-Source Threshold Voltage
Typ.
Max.
Unit V
- 20
mV/°C
5
VGS(th)
VDS = VGS, ID = - 250 µA
- 2.8
V
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 20 V
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = - 30 V, VGS = 0 V VDS = - 30 V, VGS = 0 V, TJ = 55 °C
- 10
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
RDS(on)
Forward Transconductancea Dynamicb Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time Rise Time Turn-Off DelayTime Fall Time Turn-On Delay Time Rise Time Turn-Off DelayTime Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulse Diode Forward Currenta Body Diode Voltage
gfs
VDS ≤ - 5 V, VGS = - 10 V VGS = - 10 V, ID = - 16.1 A
tr
-1 - 20 0.0100
VGS = - 4.5 V, ID = 11.8 A
0.0155
0.0186
VDS = - 15 V, ID = - 16.1 A
37 2230
VDS = - 15 V, VGS = 0 V, f = 1 MHz
385
pF
322 VDS = - 15 V, VGS = - 10 V, ID = - 14.4 A VDS = - 15 V, VGS = - 4.5 V, ID = - 14.4 A
47.5
71
24.6
37
7.7
VDD = - 15 V, RL = 1.5 Ω ID ≅ - 10 A, VGEN = - 4.5 V, Rg = 1 Ω
0.3
1.5
3.0
50
75
43
65
30
45
14
21
14
21
VDD = - 15 V, RL = 1.5 Ω ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω
tf IS
9
18
36
54
10
20
TC = 25 °C
- 30 - 60
ISM VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
nC
12 f = 1 MHz
tf tr
Ω S
td(on) td(off)
µA A
0.0083
td(on) td(off)
- 1.2
IF = - 10 A
IF = - 10 A, dI/dt = 100 A/µs, TJ = 25 °C
Ω
ns
A
- 0.8
- 1.2
V
31
47
ns
30
45
nC
15 16
ns
Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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Document Number: 65670 S10-0112-Rev. A, 18-Jan-10
New Product
Si7143DP Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 60
1.2 VGS = 10 V thru 5 V
50 I D - Drain Current (A)
I D - Drain Current (A)
0.9 40
30
VGS = 4 V
20
TC = 125 °C
0.6
0.3 10
TC = 25 °C TC = - 55 °C
0 0.0
0.0 0.5
1.0
1.5
2.0
2.5
0
1
VDS - Drain-to-Source Voltage (V)
3600
0.025
3000 C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
4
Transfer Characteristics
0.030
VGS = 4.5 V
0.015
0.010
Ciss
2400
1800
1200
VGS = 10 V
0.005
3
VGS - Gate-to-Source Voltage (V)
Output Characteristics
0.020
2
Coss
600 Crss
0.000
0 0
15
30
45
60
0
6
12
ID - Drain Current (A)
10
ID = 16.1 A
8 RDS(on) - On-Resistance (normalized)
- Gate-to-Source Voltage (V)
30
1.8 VDS = 8 V
ID = 16.1 A
GS
24
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
V
18
VDS - Drain-Source Voltage (V)
6 VDS = 15 V 4 VDS = 24 V 2
0 0
10
20
30
40
50
1.5 VGS = 10 V 1.2 VGS = 4.5 V 0.9
0.6 - 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (ºC)
Gate Charge
On-Resistance vs. Junction Temperature
Document Number: 65670 S10-0112-Rev. A, 18-Jan-10
150
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Si7143DP Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100
0.05
RDS(on) - On-Resistance (Ω)
I S - Source Current (A)
0.04 10
TJ = 150 °C
1
TJ = 25 °C
0.03
TJ = 125 °C
0.02
0.01 TJ = 25 °C
0.1 0.0
0.00 0.3
0.6
0.9
1.2
2
4
VSD - Source-to-Drain Voltage (V)
8
10
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
- 1.3
200
ID = 250 µA
160
Power (W)
- 1.6 VGS(th) (V)
6
- 1.9
120
80
- 2.2
40
- 2.5 - 50
- 25
0
25
50
75
100
125
0 0.001
150
0.01
TJ - Temperature (°C)
0.1
1
10
Time (s)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage 100
Limited by RDS(on)* 100 µs
ID - Drain Current (A)
10 1 ms 10 ms 1
100 ms 1s 10 s
0.1 DC TA = 25 °C Single Pulse 0.01 0.1
BVDSS Limited 1
10
100
VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
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Document Number: 65670 S10-0112-Rev. A, 18-Jan-10
New Product
Si7143DP Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 60
ID - Drain Current (A)
45
30
Package Limited
15
0 0
25
50
75
100
125
150
TC - Case Temperature (°C)
Current Derating* 2.4
50
40
Power (W)
Power (W)
1.8 30
20
1.2
0.6 10
0.0
0 0
25
50
75
100
TC - Case Temperature (°C)
Power, Junction-to-Case
125
150
0
25
50
75
100
125
150
TA -- Ambient Temperature (°C)
Power, Junction-to-Ambient
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.
Document Number: 65670 S10-0112-Rev. A, 18-Jan-10
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Si7143DP Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1
Normalized Effective Transient Thermal Impedance
Duty Cycle = 0.5
0.2 0.1
Notes:
0.1 PDM
0.05
t1 t2 1. Duty Cycle, D =
0.02
t1 t2
2. Per Unit Base = RthJA = 70 °C/W 3. TJM - TA = PDMZthJA(t)
Single Pulse
0.01 10 -4
10 -3
10 -2
4. Surface Mounted
10 -1 1 Square Wave Pulse Duration (s)
100
10
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient 1
Normalized Effective Transient Thermal Impedance
Duty Cycle = 0.5
0.2 0.1 0.05
0.1 0.02 Single Pulse
0.01 10 -4
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65670.
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Document Number: 65670 S10-0112-Rev. A, 18-Jan-10
Legal Disclaimer Notice Vishay
Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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