Helping You Differentiate From factory and process automation to energy infrastructure and surveillance systems, your industrial products help improve our world. Your products have to be safe, reliable, adaptable, and built to last. At the same time, business success requires you act quickly in order to differentiate in a highly competitive market while driving down total cost. With innovative programmable solutions from Altera at the heart of your industrial designs, you’re equipped to tackle the key challenges: • Adapting quickly and cost-effectively to evolving end markets and standards • Meeting diverse and escalating performance requirements across product lines while simultaneously reducing system material and development costs • Designing systems that meet requirements for safety, quality, and reliability over very long system deployment lifetimes

Meeting Challenges with Altera FPGAs and SoCs Today’s FPGAs and SoCs from Altera offer unprecedented integration capabilities alongside inherent hardware and software flexibility and performance advantages. This silicon convergence delivers application-class ARM® Cortex™-A9 processors, state-of-the-art transceivers, and memory controllers integrated with high-performance programmable logic fabric. These platforms enable the cost-effective realization of complete industrial applications such as drives, solar inverters, programmable logic controllers (PLCs), or camera-based surveillance systems in a single device. Increased performance and integration of discrete devices can reduce both material and development costs. Standardization on a single platform across product lines and adjacent applications can significantly reduce schedule and obsolescence risks. Productivity with advanced software and system development tools provide optimal partitioning and design reuse to reduce time to market and preserve development methodology investments.

2    SoC

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www.altera.com/industrial

Industrial Automation – Motor Control Delivering a differentiated drive product that can meet evolving needs in a highly competitive market presents you with several distinct challenges: • Increasing DSP-intensive control algorithm performance for enhanced system efficiency and reliability while reducing overall material and development costs • Design flexibility to meet diverse and evolving requirements for Industrial Ethernet, power electronics, and sensor feedback • Integrated functional safety capability with high reliability and long-term device availability To accelerate your time to market and increase productivity, our Motor Control Development Framework lets you easily create integrated, high-performance drive-on-a-chip systems with our Cyclone® V FPGAs and SoCs. The Framework comprises tools, software libraries, intellectual property (IP) cores, reference designs, and development boards. Our motor control IP includes pulse-width modulation (PWM), analog-to-digital (ADC), and digital encoder interfaces. It also has integrated, customizable field-oriented control (FOC) drive-on-a-chip reference designs to support single and multiaxis hardware systems.

Drive-on-a-Chip for FPGA-Based Motor Control PLC/DCS with Safety

ARM®/Nios II Processor

Motor Control Algorithm

Industrial Ethernet

PHY PHY

IGBT Control I/F ADC I/F

ΣΔ A/D Converters

Power Stage

Position Encoder I/F

Safety IP

Multiple Motors

Encoder(s)

FPGA/CPLD Safety Device

Cyclone® V FPGA

Benefits of Altera FPGAs in Motor Control Applications • Meet the full range of system performance requirements by using hardware coprocessors to accelerate your motor control algorithm • Flexibly support varied power electronics, position feedback encoders, and new and upcoming Industrial Ethernet and legacy fieldbus communication interfaces • Increase productivity with software design flows targeting integrated ARM Cortex-A9 and Nios® II processors and model-based design for DSP coprocessors • Reduce time to market and development costs of functional safety compliance with IEC 61508-qualified design tools, IP, and products • Lower total cost of ownership through integrated SoC platforms, providing opportunities to differentiate on a single architecture with long device lifetimes that significantly reduce obsolescence risks

SoC

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2013

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www.altera.com/industrial    3

Industrial Automation - PLCs PLC architecture requires support for multiple specialized peripherals, backplanes, and other custom interfaces, typically integrated using an FPGA. You have the option to develop your system using an Altera SoC with an integrated processor or an FPGA companion chip for your discrete processor.

Integrated Altera SoC Solution You can reduce system power, cost, and board space by integrating your processor, FPGA, and other required functionality, such as peripherals, into our Altera SoC. • Run the PLC application software, Ethernet master protocol stack, and motion control software on the SoC’s dual-core ARM Cortex-A9 processor • Implement most peripherals, including USB, CAN, Ethernet, timers and UARTs, required by the PLC system processor using the SoC’s hard processor system • Implement specialized peripherals such as multiport Ethernet switches, 2D/3D graphics engine, and TCP/IP offload using the FPGA fabric

SoCs Implemented as PLC-on-a-Chip Motion Control Software Industrial Ethernet Protocol Stack (Master) PLC Run-Time Application Software

Multiport Ethernet Switch

HPS I/O

FPGA

HPS ARM Cortex-A9 NEON/FPU L1 Cache

HPS

ARM Cortex-A9 NEON/FPU L1 Cache

L2 Cache

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Integrated DMA

www.altera.com/industrial

(2)

GPIO

I2C (x4)

Timers (x11)

SPI (x2)

CAN (x2)

NAND Flash

QSPI Flash Controller

SD/SDIO/ MMC(1)

DMA

UART (x2)

HPS to FPGA

FPGA to HPS

FPGA Configuration

Hard PCIe*

(1)

Ethernet (x2)(1)

64 KB RAM

Shared Multiport DDR SDRAM Controller(2)

3.125-Gbps and 5-Gbps Transceivers*

USB OTG (x2)(1)

JTAG Debug/Trace(1)

(1) (2)

Hard Memory Controller*

*Optional Configuration

Ethernet MACs

RTOS – VxWorks, Linux RT, QNX

TCP/IP Offload

Integrated ECC

DDR Memory Controller, x32 with ECC | 400 MHz

Most of the Common Peripherals

FPGAs as a Companion Chip If you rely on a discrete processor, you can use our 28 nm Cyclone FPGA as a companion chip to cost-effectively implement Industrial Ethernet or fieldbus protocols, custom interfaces, and peripherals for your PLC application processor, including the Intel ATOM processor.

FPGAs as Companion Chips for Application Processor

• Integrate control and glue logic plus related bridging and communication devices using our FPGA’s high levels of integrated hard IP such as DDR memory controllers and PCI Express® (PCIe®) endpoint • Simplify PCIe link bandwidth sharing between multiple peripherals using standard operating system (OS) software drivers with our FPGA’s unique PCIe endpoint multifunction hard IP

x86 Processor PCle FPGA Visualization Motion Control Safety Application Specific GPIO

Fieldbus

Benefits of Altera FPGAs and Altera SoCs for PLC Applications • Build a single hardware platform for use with different types of PLCs • Integrate all the processing units, peripherals, and custom interfaces in a single device, effectively building a PLC-on-a-chip • Customize a completely programmable companion chip to your favorite application processor • Accelerate time to market by supporting the latest generation of interface standards in programmable logic • Minimize PCB spins and future-proof your system with in-field upgrades to the FPGA

SoC

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www.altera.com/industrial    5

Industrial Ethernet With the need to support multiple variants of Industrial Ethernet protocols, designing industrial systems can be far from simple. These protocols have to be implemented as a deeply embedded function to meet shrinking system cost, form factor, and power budgets. As you integrate the digital drive functions onto a single piece of silicon, the communication protocol is becoming a small function implemented as part of the entire “drive-on-chip” design.

Moving from Modules to Devices to an Integrated Chip Function To obtain IP protocols, you need to negotiate with different vendors, pay up-front licensing fees, and worry about tracking sales. By using our FPGAs with an integrated Industrial Ethernet function and our simplified licensing structure, you can support most of your required protocols and redirect your resources for a more cost-effective design. To make it easier for you to implement different slave Industrial Ethernet protocols with the same hardware, we teamed with Softing Industrial Automation GmbH, the world leader in Industrial Ethernet IP protocols. The combination of our FPGA and a security CPLD provides an easy and inexpensive way for you to develop Industrial Ethernet and fieldbus connectivity platforms with: • No license negotiation • No up-front licensing costs • No per-unit royalty reporting

Easy-to-Use Two-Chip Solution with “No-Hassle” Licensing

Security CPLD

Slave Protocols Profinet RT/IRT Ethernet POWERLINK ModBus/TCP Ethernet/IP Profibus DP EtherCAT

The protocol IP and reference designs are hardware tested on both the Altera Industrial Networking Kit (INK) featuring the Cyclone IV FPGA or Softing’s FPGA RTEM CIII kit.

Benefits of Altera FPGAs in Industrial Ethernet Applications • Update your system to work with any of the top Industrial Ethernet and fieldbus protocols without changing the hardware design • Use our pre-tested, license-free IP to speed your time to market

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www.altera.com/industrial

Save Time with Functional Safety Certification for Tools, IP, and Devices Functional safety is increasingly a central requirement for industrial systems in the machinery, transportation, and process automation sectors. Government directives to reduce the risk of operator injuries and the demand for improved operational efficiencies are driving the need for more comprehensive functional safety features. Safety imposes an increase in overall complexity with considerations such as: • On-schedule and in-budget product certification meeting the appropriate Safety Integrity Level (SIL) as defined by IEC 61508 and derivative industry-specific standards • Flexibility to design for today’s diverse requirements while meeting evolving requirements over the product line lifetime • Cost and risk reduction through integration of safe and non-safe functionality into fewer discrete devices To simplify and speed up your certification process, we worked with TÜV Rheinland, an independent third-party assessor specializing in functional safety testing and certification, to gain approval for the use of our products in safety applications. This makes us the first and only FPGA supplier whose FPGA devices, IP, development tools, and established FPGA design flow are certified for IEC 61508 functional safety to SIL Level 3. Altera’s TÜV-qualified safety packages typically save our customers 18 to 24 man-months in certifying their safety applications. Development Without “TÜV-Qualified Safety Package” Safe Requirement Specification

Qualification of Used Devices and Tools

Implementation of Safe Functionality

Development of Application-Specific Hardware and/or Software

Implementation of Safe Diagnostic Functions

Certification by TÜV

Development With “TÜV-Qualified Safety Package” Safe Requirement Specification

Development of Application-Specific Hardware and/or Software

Certification by TÜV

Functional Safety Data Package Components – IEC 61508 Qualified Tools

Qualified IP

Qualified Devices

Quartus® II software v11.0 SP1

Nios II embedded processor

Cyclone and Cyclone II, Cyclone III FPGAs

Analysis and elaboration

CRC compiler

Cyclone III 60 nm FPGAs

Altera simulation libraries

DDRx high-performance and next-generation controller supporting both Altmemphy and Uniphy

Cyclone IV except EP4CGX50 and EP4CGX75 FPGAs

Synthesis and place and route

8B/10B encoder/decoder

Arria® GX FPGAs

TimeQuest-timing analyzer

SOPC Builder IP within Quartus II software

Stratix® III FPGAs

Signal Tap II logic analyzer

Diagnostic IP: • CRC checker • SEU checker • Clock checker

Stratix II and Stratix II GX FPGAs

NIOS II debugger

Stratix and Stratix GX FPGAs

In-System memory editor

MAX® II and MAX II Z CPLDs

PowerPlay power analyzer

MAX 3000A, MAX 7000AE/B/S CPLDs SoC

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2013

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www.altera.com/industrial    7

Smart Energy – Substation Automation Reliable transmission and distribution substation automation equipment is key to keeping the electricity flowing. You may face some tough challenges when designing your substation equipment: • Meeting a wide range of functions for Intelligent Electronics Devices (IEDs), as well as monitoring, control, or safety systems • Supporting mission-critical systems in real time that place demands on reliability, upgradability, and interoperability • Implementing IEC 61850 over Ethernet with IEC 62439-3 Parallel Redundancy Protocol (PRP) and High-Availability Seamless Redundancy (HSR) • Sustaining long product life cycles With a single Altera FPGA, you can develop a scalable platform that delivers the performance, flexibility, and cost savings your design needs. For example, the real-time switch requirements in a redundant network are ideal for FPGAs. Our low-cost Cyclone V FPGAs and Cyclone V SoCs meet the performance requirements of Gbps Ethernet traffic with PRP/HSR redundancy and evolving standards. Our PRP/HSR solution includes no license negotiations, up-front licensing costs, or per-unit royalty reporting.

Example: Cyclone V SoC-Based IEDs with 4-Port PRP/HSR Switch Off-Chip

On-Chip

Host System

10/100/1000 Mbps Ethernet Medium

10/100/1000 Mbps Ethernet Medium

10/100/1000 Mbps Ethernet Medium

HSR/PRP ports

PHY

MII/GMII

MDIO

PHY

MII/GMII

MAC

Registers

STA

MAC

MMD

FRS

MAC

MDIO

MII/GMII

CPU

Interlink or maintenance port PHY

MII/GMII

MAC

Benefits of Altera FPGAs in Smart Grid Applications • Leverage FPGA flexibility to evolve your design for changing I/O interfaces and protocol standards • Improved performance to process 10/100/1000 Mbps switch traffic with HSR or PRP in real time • Integrate HSR/PRP Ethernet switch with IED system functions on a Cyclone V SoC to reduce cost, lower power, and increase system reliability with fewer components • Focus on new product development instead of worrying about life cycle management with our long FPGA life cycles

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2013

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www.altera.com/industrial

Smart Energy – Solar Inverters Producing reliable, more efficient, and less costly solar or photovoltaic (PV) systems is an important step in making solar energy more competitive. This poses challenges in designing the solar inverter architecture to meet demands for: • Reliability and usability with long service life to supply distributed, renewable energy sources with central power generation to meet growing power needs • Increased efficiency and lower unit costs using advanced control algorithms and power topologies like three-level insulated gate bipolar transistor (IGBT) and wideband gap SiC-FETs • Local grid code compliance which includes power quality monitoring and control Our FPGAs enable cost and efficiency through silicon convergence on the FPGA platform to meet real-time performance, feature requirements, and price points for high-volume inverter applications.

PV Inverter with Cyclone V as Coprocessor or All-in-One SoC SoC

MPPT Control

Control Block

DC-DC Control

DC-AC Control

Drivers

Drivers

Current & Voltage Sensors

Current & Voltage Sensors

DC-DC Converter

Inverter

DC

Communication HPS (e.g. ARM Cortex A9)

Current & Voltage Sensors

Grid Protection Interface

DC-AC Inverter

DC

Grid

AC

Benefits of Altera FPGAs in Solar Inverter Applications • Use the FPGA as a coprocessor to offload the DSP function, add I/O functions, or integrate DSP and communications on the SoC • Switch electrical current more efficiently using DSP control loop and multilevel IGBT control on the FPGA • Increase switching frequency and further reduce inductive component costs with the FPGA and wideband gap materials • Increase productivity with software design flows targeting integrated ARM Cortex-A9 and Nios II processors and model-based design for DSP coprocessors • Focus on new product development instead of worrying about life cycle management with our long FPGA life cycles

SoC

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2013

•

www.altera.com/industrial    9

Video Surveillance Government, municipalities, financial institutions, and businesses are driving new uses for video surveillance technologies beyond crime prevention or security into applications such as asset management, risk mitigation, and safety. Developing a differentiated IP camera that includes the latest features and capabilities presents several challenges: • Increasing image sensor resolution from standard definition to high definition with wide dynamic range (WDR) capabilities • Differentiating your products with reliable video analytics that can run real time on high-definition (HD) images with low power requirements • Flexibility to scale your solution across multiple product lines, adding new features and adapting to changing interface and output standards Our FPGAs can help you easily adapt your camera design to account for changing image sensors and market requirements while adding advanced analytics. Unlike an ASSP-based approach, designing with an FPGA lets you differentiate your products in hardware and software, allowing you to release new features and stay ahead of your competitors. We provide a wide variety of devices, tools, and IP directly and through a network of partners to help you quickly and easily bring your product to market.

Single-Chip IP Camera Block Diagram DRAM

Image Sensor

Video Analytics Sensor Control and WDR Pipeline

H.264 Encoding

10/100 Ethernet MAC

Ethernet PHY

CPU (Control)

FPGA

Benefits of Altera FPGAs in Video Surveillance • Optimized control of HD WDR image sensors • Integrate multiple IP camera functions and multichannel video analytics in a single chip • Only technology providing advanced 1080p video analytics capabilities in a single chip • Connect using our flexible options to various Ethernet interfaces • Add custom motor control algorithms for pan-tilt-zoom (PTZ) functionality • Integrate with low-power and high-performance FPGAs and SoCs

10    SoC

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www.altera.com/industrial

Accelerate Your Design Flow Optimizing industrial designs requires versatile software and hardware development tools and a practical design flow that enables an integrated system to meet the performance needs of an application. Using our integrated tool flow allows designers to reduce development time, while meeting optimization requirements across the various stages and levels of system design.

Optimize Designs with an Integrated, Flexible Design Flow Model System (Optional)

Develop Algorithm in Software

Integrate with Application Software ARM or Nios II Processor

ARM or Nios II Processor Software Tools

Algorithm in “C” Simulink/ MATLAB Algorithm Using DSP Builder

Qsys System Integration Tool

Quartus II Software SoC

Accelerate Algorithm in Hardware

Integrate System Hardware

Compile Design

Optimized System

Standard Software Development Tools for High Productivity Develop software targeting integrated ARM and Nios II processors on Altera’s SoC and FPGAs using the ARM Development Studio 5 (DS-5™) Altera® Edition Toolkit and other standard Eclipse-based software development and debug tools.

DSP Builder Design custom coprocessors for CPU offload and acceleration in the FPGA using hardware description language (HDL) or our model-based design flow that simplifies your design effort. Our DSP Builder development tool shortens your design cycle, enabling algorithm development and partitioning in MathWorks’ MATLAB/Simulink environment and automatic generation of optimized HDL.

Intellectual Property Together with our partners, we offer a broad IP portfolio in areas such as Industrial Ethernet, motor control, and functional safety in addition to optimized standard communication, memory controller, and DSP functions.

Quartus II Software Development Tool The Qsys system integration tool, part of the Quartus II software development tool, lets you integrate coprocessors, interface IP, and on-chip ARM and Nios II processors. It allows for system-level specification of design topology, peripheral addressing and interrupts, and AXI interconnect generation to meet required throughput, latency, and area constraints. The Quartus II tool is the programmable logic industry’s number-one software in performance and productivity for CPLD and FPGA design synthesis, place and route, and static timing analysis.

SoC

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2013

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www.altera.com/industrial    11

High Quality and Reliability for the Long Term Many industrial systems need to reliably perform demanding functions in extremely harsh environments, often for extended periods of time—in some cases for 15 years or more. Altera has decades of experience applying the highest quality standards, which means you get better solutions and peace of mind for your designs. As an ISO 9001 certified company since 1994, we have shipped hundreds of millions of programmable logic devices into industrial systems. We also require all our suppliers to comply with stringent manufacturing and test standards to ensure reliability and quality throughout your system. We have a zero-defect philosophy with rigorous procedures at each phase of development to ensure the highest quality and lowest defective parts per million (DPPM). Our wafer fabs, package, assembly, test, and programming facilities are TS-16949 certified for a quality management system providing for continual improvement, emphasizing defect prevention, and reducing variation and waste in the supply chain.

Altera's TS-16949 Compliant Manufacturing Flow Wafer fab(s)

TSMC TS-16949 certificates

✔

Package assembly site(s)

Test site(s)

Programming site(s)

ASE, Amkor TS-16949 ✔ certificates

ASE, Amkor TS-16949 ✔ certificates

ASE, Amkor TS-16949 ✔ certificates

We take business continuity planning (BCP) seriously and employ several initiatives to ensure you have a continuous supply of product: • Use of six fabs across four locations • Dual fab strategy by Fabmatch® methodology • Multiple assembly site sourcing • Sub-material sourcing control Our average product cycle is 15 years with many of our products having lifetimes in excess of 20 years, so you can design in our products with confidence.

Life Cycle Comparison Alignment to application life cycle dynamics Active 5 - 10 years

R&D 2 - 4 years t=0 ASSP 5 - 7 years (typical)

MCU 7 - 10 years (typical) ASIC 10 years (typical) Altera PLD +15 years (typical) Competing PLD 8 - 10 years (typical)

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www.altera.com/industrial

Phase Out 1 - 3 years

Obsolete

Industrial-Grade Products Our industrial-grade devices feature junction temperature range support from -40˚C to +100˚C (or higher on selected devices). Our industrial-grade portfolio spans from CPLDs to FPGAs and also includes SoCs and HardCopy® ASIC options to serve all your industrial needs.

Introducing the Cyclone V SoC The Cyclone V SoC integrates an ARM-based hard processor system (HPS) with our FPGA fabric. These usercustomizable SoCs increase system performance, lower power consumption, and reduce board space requirements, all designed to help you lower your overall system cost. Cyclone V SoC key features: • Single- or dual-core ARM Cortex-A9 processors • Vertical migration across FPGA logic densities (25K, 40K, 85K, and 110K logic elements) • 3 Gbps and 5 Gbps transceiver options • Dual CAN controllers (hard IP) • Dual Ethernet MACs with IEEE 1588 (hard IP) • Dual PCIe interface (hard IP) • Full suite of peripherals (hard IP) • Full error correction code (ECC) support – safety ready • Horizontal migration across the family

ARM Processor System Single / Dual Core ARM Cortex-A9 MPCore Processor Hard Memory Controller

28 nm FPGA

Hard Peripherals (CAN, EMAC,...)

Hard Memory Controller

Hard PCIe Gen 1 2x

Cyclone V SoC Industrial-Grade Device Package Options and Maximum User I/Os Package Type/ Pin Count UBGA-484 (U19)

Family

Product Line

Logic Density (K LEs)

UBGA-672 (U23)

FBGA-896 (F31)

Ball Spacing (mm)

PLL FPGA/ HPS

0.8

(count)

19 x 19

0.8

1.0

Dimensions (mm) 23 x 23

31 x 31

FPGA I/Os / Processor I/Os / LVDS I/Os / Transceivers (XCVR count)

Cyclone V SE SoC

Cyclone V SX SoC (3 Gbps) Cyclone V ST SoC (5 Gbps)

FPGA I/O

HPS I/O

LVDS TX

LVDS RX

XCVR

FPGA I/O

HPS I/O

LVDS TX

LVDS RX

XCVR

FPGA I/O

HPS I/O

LVDS TX

LVDS RX

XCVR

–

–

–

–

–

5CSE-A2

25

5/3

66

161

15

18

–

145

181

31

35

–

5CSE-A4

40

5/3

66

161

15

18

–

145

181

31

35

–

–

–

–

–

–

5CSE-A5

85

6/3

66

161

15

18

–

145

181

31

35

–

288

181

72

72

–

5CSE-A6

110

6/3

66

161

15

18

–

145

181

31

35

–

288

181

72

72

–

5CSX-C2

25

5/3

–

–

–

–

–

145

181

31

35

6

–

–

–

–

–

5CSX-C4

40

5/3

–

–

–

–

–

145

181

31

35

6

–

–

–

–

–

5CSX-C5

85

6/3

–

–

–

–

–

145

181

31

35

6

288

181

72

72

9

5CSX-C6

110

6/3

–

–

–

–

–

145

181

31

35

6

288

181

72

72

9

5CST-D5

85

6/3

–

–

–

–

–

–

–

–

–

–

288

181

72

72

9

5CST-D6

110

6/3

–

–

–

–

–

–

–

–

–

–

288

181

72

72

9

SoC

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www.altera.com/industrial    13

Cyclone V Industrial-Grade Device Package Options and Maximum User I/Os Package Type/ Pin Count

Family

Product Line

MBGA -301 (M11)

Logic Density (K LEs)

MBGA -383 (M13)

MBGA -484 (M15)

FBGA -256 (F17)

PLL

UBGA -324 (U15)

UBGA -484 (U19)

FBGA -484 (F23)

FBGA -672 (F27)

FBGA -896 (F31)

FBGA -1152 (F35)

1.0

1.0

1.0

1.0

23 x 23

27 x 27

31 x 31

35 x 35

Ball Spacing (mm)

(count)

0.5

0.5

0.5

1.0

0.8

0.8

Dimensions (mm) 11 x 11

13 x 13

15 x 15

17 x 17

15 x 15

19 x 19

I/Os / LVDS / Transceivers (count)

Cyclone V E

Cyclone V GX (3 Gbps)

Cyclone V GT (5 Gbps)

5CE-A2

25

4

–

208 / TBD

–

128 / 32

176 / 44

224 / 56

224 / 56

–

–

–

5CE-A4

49

4

–

208 / TBD

–

128 / 32

176 / 44

224 / 56

224 / 56

–

–

–

5CE-A5

77

6

–

208 / TBD

–

–

–

224 / 56

240 / 60

–

–

–

5CE-A7

149.5

6

–

–

240 / 60

–

–

240 / 60

240 / 60

336 / 84

480 / 120

–

5CE-A9

301

6

–

–

–

–

–

240 / 122

224 / 56

336 / 84

480 / 120

–

5CGX-C3

31.5

4

–

–

–

–

144 / 36 / 3

208 / 52 / 3

208 / 52 / 3

–

–

–

5CGX-C4

50

6

127 / TBD / 4

175 / TBD / 6

–

–

–

224 / 56 / 6

240 / 60 / 6

336 / 84 / 6

–

–

5CGX-C5

77

6

127 / TBD / 4

175 / TBD / 6

–

–

–

224 / 56 / 6

240 / 60 / 6

336 / 84 / 6

–

–

5CGX-C7

149.5

7

–

–

240 / 60 / 3

–

–

240 / 60 / 6

240 / 60 / 6

336 / 84 / 9

480 / 120 / 9

–

5CGX-C9

301

8

–

–

–

–

–

240 / 60 / 5

224 / 56 / 6

336 / 84 / 9

480 / 120 / 12

560 / 140 / 12

5CGT-D5

77

6

127 / TBD / 4

175 / TBD / 6

–

–

–

224 / 56 / 6

240 / 60 / 6

336 / 84 / 6

–

–

5CGT-D7

149.5

7

–

–

240 / 60 / 3

–

–

240 / 60 / 6

240 / 60 / 6

336 / 84 / 9

480 / 120 / 9

–

5CGT-D9

301

8

–

–

–

–

–

240 / 60 / 5

224 / 56 / 6

336 / 84 / 9

480 / 120 / 12

560 / 140 / 12

True LVDS I/O count only. Does not inlcude eTX/eRX.

Cyclone IV E Industrial-Grade Device Package Options and Maximum User I/Os Package Type/ Pin Count

Family

Product Line

Logic Density (K LEs)

EQFP-144 (E144)

MBGA-164 (M164)

UBGA-256 (U256)

FBGA-256 (F256)

0.5

0.5

0.8

1.0

22 x 22

8x8

14 x 14

17 x 17

91 / 21

–

179 / 66

179 / 66

PLL (count)

UBGA-484 (U484)

FBGA-324 (F324)

FBGA-484 (F484)

FBGA-780 (F780)

1.0

1.0

1.0

19 x 19

23 x 23

29 x 29

–

–

–

Ball Spacing (mm) 0.8

Dimensions (mm) 19 x 19

I/Os / LVDS I/Os (count) EP4CE6

Cyclone IV E

6.3

2

–

EP4CE10

10.3

2

91 / 21

–

179 / 66

179 / 66

–

–

–

–

EP4CE15

15.4

4

81 / 18

89 / 21

165 / 53

165 / 53

–

–

343 / 137

–

EP4CE22

22.3

4

79 / 17

–

153 / 52

153 / 52

–

–

–

–

EP4CE30

28.8

4

–

–

–

–

–

195 / 61

328 / 124

532 / 224

EP4CE40

39.6

4

–

–

–

–

328 / 124

195 / 61

328 / 124

532 / 224

EP4CE55

55.9

4

–

–

–

–

324 / 132

–

324 / 132

374 / 160

EP4CE75

75.4

4

–

–

–

–

292 / 110

–

292 / 110

426 / 178

EP4CE115

114.5

4

–

–

–

–

–

–

280 / 103

528 / 230

LVDS count includes dedicated and emulated LVDS pairs, see Handbook.

14    SoC

•

2013

•

www.altera.com/industrial

Cyclone IV GX Industrial-Grade Device Package Options and Maximum User I/Os Package Type/ Pin Count

Family

Product Line

Logic Density (K LEs)

QFN-148 (N148)

FBGA-169 (F169)

FBGA-324 (F324)

0.5

1.0

1.0

11 x 11

14 x 14

19 x 19

FBGA-484 (F484)

FBGA-672 (F672)

FBGA-896 (F896)

1.0

1.0

27 x 27

31 x 31

Ball Spacing (mm)

PLL (count)

1.0 Dimensions (mm) 23 x 23

I/Os / LVDS / Transceivers (count)

Cyclone IV GX (2.5/ 3 Gbps)

I/O

LVDS

XCVR

I/O

LVDS

XCVR

I/O

LVDS

XCVR

I/O

LVDS

XCVR

I/O

LVDS

XCVR

I/O

LVDS

XCVR

EP4CGX15

14.4

3

72

25

2

72

25

2

–

–

–

–

–

–

–

–

–

–

–

–

EP4CGX22

21.3

4

–

–

–

72

25

2

150

64

4

–

–

–

–

–

–

–

–

–

EP4CGX30

29.4

4/6

–

–

–

72

25

2

150

64

4

290

130

4

–

–

–

–

–

–

EP4CGX50

49.9

8

–

–

–

–

–

–

–

–

–

290

130

4

310

140

8

–

–

–

EP4CGX75

73.9

8

–

–

–

–

–

–

–

–

–

290

130

4

310

140

8

–

–

–

EP4CGX110

109.4

8

–

–

–

–

–

–

–

–

–

270

120

4

393

181

8

475

220

8

EP4CGX150

149.8

8

–

–

–

–

–

–

–

–

–

270

120

4

393

181

8

475

220

8

MAX V Industrial-Grade Device Package Options and Maximum User I/Os Package Type/ Pin Count MBGA-64 (M64) Family

Product Line

Logic Density (K LEs)

EQFP-64 (E64)

MBGA-68 (M68)

TQFP-100 (T100)

MBGA-100 (M100)

TQFP-144 (T144)

FBGA-256 (F256)

FBGA-324 (F324)

0.5

1.0

1.0

22 x 22

17 x 17

19 x 19

Ball Spacing (mm) 0.5

0.4

0.5

0.5

0.5

Dimensions (mm) 4.5 x 4.5

9x9

5x5

16 x 16

6x6

I/Os (count)

MAX V

5M40Z

40

30

54

–

–

–

–

–

–

5M80Z

80

30

54

52

79

–

–

–

–

5M160Z

160

–

54

52

79

79

–

–

–

5M240Z

240

–

–

52

79

79

114

–

–

5M570Z

570

–

–

–

74

74

114

159

–

5M1270Z

1270

–

–

–

–

–

114

211

271

5M2210Z

2210

–

–

–

–

–

–

203

271

SoC

•

2013

•

www.altera.com/industrial    15

Want to Dig Deeper? To learn more about Altera’s industrial solutions for factory automation and smart energy, contact your local Altera sales representative. You can download white papers, view webcasts, purchase development kits, and more from our website at www.altera.com/industrial.

Visit: www.altera.com/industrial

Altera Corporation

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101 Innovation Drive San Jose, CA 95134 USA www.altera.com

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©2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and are trademarks or registered trademarks in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/legal. May 2013 Broch 1006-1.0