Solder-Free Pressure Contact Micro-Springs in High-Density Flip-Chip Packages Eugene M. Chow, Chris Chua, Thomas Hantschel, Koenraad Van Schuylenbergh, David K. Fork Palo Alto Research Center (PARC) 3333 Coyote Hill Road, Palo Alto, CA 94304 USA email: [email protected], phone: 650-812-4184 Abstract This work investigates electrical pressure contacts based on a micro-spring with orders of magnitude smaller pitch and force than conventional pressure contacts. Flip-chip packages were assembled with hundreds of micro-springs at 20 µm pad-pitch, 40 µm spring-pitch, and an operating force of 0.01 grams on gold pads. These packages are shown to have stable resistance values during both in-situ thermocycle (0 ˚C to 125 ˚C) and humidity testing (60 ˚C at 95% RH). Highspeed glitch measurements are performed to confirm the pressure contact does not have intermittent opens during thermocycling. These results suggest that a low-force solderfree pressure spring contact is a viable technology for next generation flip-chip packaging. Introduction and Motivation While flip-chip is leading high performance packaging, there are still many challenges for the technology. The standard interconnect technology, such as solder balls, gold bumps, and conductive adhesives, all have very limited compliance. Without adequate compliance, thermal expansion mismatches within the package between the silicon integrated circuit (IC) and the package substrate leads to failures during thermocycle testing. This is particularly important for large die flip-chip on organic board applications such as memory. Processors are moving towards low-k dielectrics which can be damaged by thermal expansion mismatches, increasing the demand for compliance. Interposers and added thermal expansion matched layers help to reduce the relative movement near the flip-chip interconnects, but they also increase package height and size. The demands of lead-free solder and the associated high temperature reflow exacerbates the problem. Other challenges for flip-chip include pitch, testing, and known-good-die. Increases in the number of signals and continuing die size shrinks have increased the demand for higher pin counts and smaller pitch in markets such as display driver ICs for chip-on-glass and microprocessors for chip-inpackage. The testing of chips and thus the cost of knowngood-die remains expensive, as the industry relies on expensive probe cards that cannot probe an entire wafer. Finally, the recent popularity of portable electronics has driven more integration and more system-in-package solutions using multi-chip modules [1, 2]. The economics of multi-chip integration would greatly benefit from a re-workable interconnect technology, which current approaches such as solder do not readily offer. PARC is developing a spring-based flip-chip interconnect to address these challenges. A metal cantilever with a designed stress gradient is released to form a curved beam that acts as a conductive spring. The inherent compliance of the spring absorbs thermal mismatches and mitigates associated problems such as low-k dielectric failure. The added compli0-7803-8906-9/05/$20.00 ©2005 IEEE

ance can increase reliability for the same chip size, or provide the ability to package larger chips. A compliant spring on each pad enables new testing schemes such as wafer scale testing of an IC wafer full of springs against pads on a flat substrate connected to the test hardware. After testing, the wafer can be singulated and chips with spring tips can be soldered to a board. We previously demonstrated this concept in a memory chip configuration and showed that a chip packaged directly to a printed circuit board can pass standard thermocycle, humidity, shock and vibration testing [3]. The spring fabrication process uses standard wafer scale thin-film metallization techniques and provides top layer routing for the IC. The process is low temperature and compatible with active silicon circuitry [4]. The springs can have significantly tighter pitches than other compliant packaging approaches such as plated wire bonds or polymer bumps [5-7]. A further simplification is to remove the solder and use solder-free pressure contacts. This enables extremely small pitches, as we have previously demonstrated pitches as small as 6 µm [8, 9]. In addition, package rework is simplified, as the interconnects can more readily be separated from the pad. Such micro-springs also have potential as micro-connectors. Microsprings have already been shown to work as temporary pressure contacts, as probe cards based on PARC’s spring technology are already commercially available [10]. Others have also fabricated lithographically defined metal springs for probe card applications, though efforts have focused on dual spring fritting approaches to break through the native pad metal oxides, making tighter pitch more difficult [11, 12]. This work studies the reliability of low force pressure contacts on gold pads for use as permanent flip-chip interconnects. The reliability of gold contacts has been studied with fretting tests [13-15], but for large forces (> 50 gmf) and with only single contacts. In packages, the reliability of gold to gold pressure contacts has been measured but with high force (30-400 gmf) and large pitch technologies (> 250 µm pitch) [16, 17]. Low force springs are attractive because they are inherently smaller, more readily scalable to large pin counts, and require less package adhesion force. Low force (< 0.1 gmf) pressure contacts have been studied, but primarily in terms of contact resistance and with single springs [11, 18, 19]. We recently showed that a single pair of springs at < 0.1 gmf can slide against a gold pad and not have any intermittent contact resistance increases for over 10,000 cycles [20]. With single springs though, it is difficult to obtain statistically significant results as well as perform environmental testing. For flip-chip applications it is important to study packages with many contacts in parallel. In our previous work we characterized packages and showed that stable resistance values can be obtained for springs on 22 µm pitch using pressure contacts on gold pads during thermal cycling experiments between 30 -125 ˚C [21].

1119

2005 Electronic Components and Technology Conference

spring metal

A)

sacrificial/seed layers

substrate

100 µm release mask

B)

Figure 2. SEM image of a spring chip used for packaging tests. There are 200 springs in each of 4 rows. The spring anchors are staggered on a 40 µm pitch. The spring tips are on a 20 µm pitch.

over-plated metal

C)

Figure 1. Schematic of spring fabrication process flow. However, this work did not include 4-wire resistance measurements nor high speed glitch testing, and a concern with pressure contacts is that intermittent contact or slight resistance increases can occur during the wear associated with environmental testing. In this paper we address these concerns through the experimental investigation of a high-density flip-chip package using hundreds of micro-spring pressure contacts. In section II we describe the fabrication of the metal micro-springs and the assembly of a test vehicle flip-chip package. Section III describes the mechanical and electrical characterization of individual springs. In section IV the package characterization and reliability testing are described.

10 µm Figure 3. A magnified SEM image of the spring tips. The tips are on a 20 µm pitch.

In this project, we use electroplated nickel layers with different stresses to provide the gradient, similar to other approaches [23]. Plating is potentially lower cost than sputtering and more easily scaled to large substrates. A second photoresist mask is patterned with photolithography to define release regions around the springs. The springs are then released by etching away the sacrificial layer which allows the spring to rise off the wafer to relieve its inFabrication and Assembly The springs are fabricated with standard wafer-scale thin- ternal stress (Figure 1B). An alloy is then deposited around film deposition techniques. The starting substrate for the the spring, followed by electroplated nickel hardened gold spring process could be an active silicon integrated circuits (Figure 1C). The alloy provides mechanical strength and wafer from a foundry. In a previous report we demonstrated stiffness, and the gold provides protection against oxidation the IC compatibility of the spring process by fabricating and increased conductivity. There are 800 springs per packsprings on a BICMOS wafer [4]. For this test vehicle, a chip age and the final springs are each 180 µm long, 14 µm wide, with daisy chain and test structures is fabricate on four-inch and 5 µm thick. Figure 2 and Figure 3 show fabricated arrays Corning 1737 glass substrates. This substrate has the same of springs from a test vehicle chip. The springs are interthermal expansion coefficient as silicon but is optically trans- leaved so that springs pointing in the same direction have a pitch of 40 µm and the pads they contact are on a 20 µm pad parent which aids inspection and assembly. First, a sacrificial layer of titanium is deposited by sputter- pitch. The spring wafers are then diced with a wafer saw into ing. The sacrificial layer should etch selectively compared to chips for assembly into packages. The spring chip size is 3 the spring material and substrate, as well as provide strong mm by 10 mm, a typical size of a driver chip for LCD display adhesion. Next, a gold seed layer for subsequent plating is applications. The spring tips are 57 µm tall, with the height sputtered. The spring metal is then deposited and etched varying gradually for up to ± 5 µm from one chip end to the with a lithographically defined photoresist mask in the shape other. Pad chips consisting of gold metal lines and pads are fabof the spring and the metal traces for signal reroute on the chip (Figure 1A). The spring metal has multiple layers of ricated on a separate glass wafer. The pads are laid out on a different stress levels to provide a stress gradient with tensile 20 µm pitch to match the spring tips. The pad chip pattern layers on top. As reported previously, the spring metal layers includes test structures for measuring daisy chain continuity, can be sputtered MoCr layers which are deposited at different 4-wire resistance, and electrical isolation. The test signals are routed from the spring tips to 1 mm2 pads along the periphery pressures [22]. of the package for contact to the reliability equipment. The pad chip measures 11 mm by 22 mm. 1120 2005 Electronic Components and Technology Conference

spring chip

epoxy

pad chip

Figure 4. Image of a completed package. The small spring chip in the center is aligned and adhered to the larger pad chip. spring chip

Figure 6. Image of a package cross section.

springs adhesive

spring chip

pad chip

Figure 5. Schematic view of a package cross section. The springs form a pressure contact against the gold pads of the pad chip. An adhesive holds the chip down and protects the contact from the environment. To assemble the packages, a small amount of UV-curable acrylic adhesive is placed on the pad chip. The spring chip is held over the pad chip with a vacuum chuck and aligned to the pad chip while optically imaging through the glass. The chips are then compressed against each other, pushing the springs through the epoxy. The spring tips scrub against the pads as they compress, to expose clean tip and pad surfaces for the pressure contact. Once aligned, the package is exposed with UV light at predominantly 365 nm. The light exposure cures the adhesive. The assembly process uses a microscope and a force gauge combined in a custom setup. Knowledge of the spring mechanical stiffness (see next section) allows correlation between the assembled package force and the vertical compression of the springs. A typical compression force is about 8 grams for 800 springs, where each spring is compressed about 20 µm. Figure 4 and Figure 5 show the completed package. Figure 6 and Figure 7 show cross section micrographs of a sliced package. To enable measurements on individual springs, the spring wafer includes test chips which are not intended to be packaged. These test chips have a single spring on one corner which is used for force measurements and a three spring structure on another corner for electrical resistance measurements. Spring Characterization The single spring test chips are used to measure the mechanical properties of the springs. In a custom setup, described in detail elsewhere [24], the force as a function of compression is experimentally measured. A single spring is compressed against a silicon chip, which sits on a high-

35 µm

spring

pad metal pad chip Figure 7. Close-up image of a package cross section, corresponding the square in Figure 6. 20 spring force [mgf]

pads

15 10 5 0 0

10 20 displacement [µm]

30

Figure 8. Measured force versus displacement for a single spring.

resolution force scale, allowing smooth repeatable sliding and a direct measurement of the vertical spring force. The system has a position and force resolution of about 0.5 µm and 1 mgf respectively. The force was observed to be linear with compression, with a force of 0.01 gmf at 20 µm compression. This linear response is expected for the majority of the com1121 2005 Electronic Components and Technology Conference

were tested and all had similar curves, with the plateau value ranging between 0.54 and 0.56 ohms.

V- V+

A

I+

B

I-

C

dV Figure 9. Schematic of a 4-wire test structure to measure the electrical resistance of an individual spring. A small but non-zero voltage dV exists, hence some spreading resistance is also captured.

resistance [ohms]

0.70

Scrub Scrub Scrub Scrub Scrub Scrub Scrub Scrub

0.60

1 2 3 4 5 6 7 8

0.50 80

85

90 95 Z-position [µm]

100

105

Figure 10. Measured resistance of multiple scrubs during compression of the single spring structure against a gold pad. 0.545 resistance [ohms]

pression [25]. A typical force-displacement measurement is given in Figure 8. In order to test for plastic spring deformation, the spring is repeatedly compressed and retracted, while the maximum displacement of each compression is gradually increased. The absolute vertical position of the base of the spring is continually measured, allowing a measurement of the change of the spring height. The height of the spring is observed to not change during the compression tests, suggesting the spring remains in the linear elastic regime. However, our ability to align the test chip in the force setup allows us to measure a maximum compression of about 33 µm for these springs. Without measuring the force, the springs are compressed ten times through the full height of the springs (57 µm) until the spring is rolled out flat against the chip. Again the height does not change within the accuracy of the height measurement, suggesting the spring is compliant at room temperature through its entire compression range. The spring test chip also has the structure schematically shown in Figure 9 for measuring electrical resistance. Three springs are compressed a measured distance while a 4-wire resistance measurement is performed. Current is forced through the device under test, spring B, and returned through spring C. The voltage is measured between spring A and spring B. The voltage sense wire runs directly to the base of spring B to cancel the resistance of the wires to the current source. Spring A is closer to spring B (150 µm) while spring C is farther from spring B (300 µm). The observed resistance is thus the sum of the spring body resistance, the contact resistance between spring tip and the pad, and the spreading resistance in the pad between spring tips A and B. Measurement on pad surfaces with various sheet resistances indicate that observed spreading resistance corresponds to about one square of pad resistance. The test chip is aligned to a gold pad and compressed until all three springs are visually in contact with the pad and each compressed about 3-5 µm. This is done before starting the electrical measurement to minimize the chance of arcing across a small air gap and thereby damaging the spring tip or pad surface. The springs are then compressed while recording the resistance. The resistance is observed to decrease with increasing compression and plateau at about 0.54 ohms after approximately 20 µm of compression (Figure 10). We are not able to directly decouple the contact resistance from the spring body resistance, but subtracting the body resistance calculated from the spring dimensions and measured sheet resistances suggests a contact resistance of 100 mohms or below, in line with the 50-150 mohms values found in literature for this contact area and force [26]. This indicates that the metallization along the body of the spring is the dominating resistance. The initial resistance decrease is likely correlated to a decrease in contact resistance, where the tip and pad gold mate with a larger effective contact area as the force increases. The measurement is repeated many times with the same spring (Figure 11), showing a slight decrease of the plateau region resistance value. This is also likely due to gradual increases in the effective contact area as the gold on the tip is smoothed by the scrub. Three different samples

0.535

0.525 101 102 103 Z-position [mm] Figure 11. Close-up of plateau region in Figure 10. The resistance decreases slightly with each successive scrub.

1122

100

2005 Electronic Components and Technology Conference

Package Characterization Flip-chip packages were assembled and subjected to environmental testing to study the reliability of the electrical contact. The test package includes six four-wire resistance structures and two isolation structures (Figure 12) spaced throughout the chip. The four-wire structure is depicted in Figure 13. Current is forced through a daisy chain of springs and their corresponding metal traces on the spring chip and the corresponding pads and traces on the pad chip. The voltage is probed on the pad chips of two neighboring springs. The measured resistance is thus the sum of: two springs, their pad-tip contacts, the spring chip trace between the springs, and the associated pad chip trace. The isolation test structure (Figure 14), consists of two neighboring springs, at 40 µm pitch, which are electrically isolated from each other because the metal trace on the spring chip which normally connects the anchors of the two springs is omitted. Leads on the pad chip facilitate an IV curve. As the voltage between the two springs is ramped up, the leakage current is measured between the springs through the adhesive, as well as between neighboring traces on the surface of the pad and spring chips. The test packages were thermocycled in a commercial oven (Sigma Systems M18) to qualify their reliability. The temperature was cycled between 0 ˚C and 125 ˚C with 45 minute dwells for 460 cycles. Fast cooling and heating rates (> 40 ˚C/min) enabled a total cycle time of only 100 minutes. The 4-wire resistance structures were measured before and after thermocycling, while isolation structures were measured after thermocycling. In addition, in-situ high speed glitch detection was performed with an event detector (AnaTech STD Event Detector). During thermocycling the event detector sources 1 mA of current and measures the voltage across a single long daisy chain of hundreds of springs. A typical resistance of the entire daisy chain, which includes springs and associated metal traces, is about 450 ohms. An event is defined as an increase in resistance over the 2000 ohm threshold with a duration of greater than 200 nanoseconds. Humidity tests were also performed. Packages were placed in a commercial humidity chamber (ESPEC SH-241) for 500 hrs at 60 ˚C and 95% relative humidity. Four wire resistance measurements were made before and after humidity testing. No in-situ glitch detection was performed, and isolation test structures were measured after the tests. Resistance measurements after thermocycling a package Sample A are given in Table 1. Typical IV curves are given in Figure 15. The pressure contacts did not show any resistance increase during the environmental test, as instead they decreased about 6% from their initial values. This slight decrease is possibly due to scrubbing of the spring tip against the pad, which would clean the pad of any residue or possibly increase the effective contact area by wearing down the tip. One of the test structures was not testable because it had an open. Visual inspection identified a particle trapped under a spring preventing the tip from mating with its pad. Glitch detection measurements showed no events during the 460 thermocycles. In Sample A, the isolation test structure, in addition to the one bad resistance test structure, were

shunted with a soldered wire before this test, producing a single continuous daisy chain of 698 springs. 4R 11 10 9

pad chip

IS 8 7

6

4R 5 4

4R 3 2

1

spring chip

12 13 14 15 16 17 18 19 20 21 22 4R 4R IS 4R

Figure 12. Package test structure schematic. The pad numbers are labeled, as well as the location of the 4-wire test structures (4R) and the isolation test structures (IS). pad chip trace

pad V-

V+

I-

I+

…..

….. spring

spring chip trace

device under test Figure 13. Schematic of the 4-wire resistance test structure (4R) used inside of a package. The device under test consists of two springs, their corresponding spring-pad contacts, and connecting traces on each of the spring and pad chips. To test the top left 4R in Figure 12, the pin assignments would be I-(11), V-(10), V+(9) and I+(8).

pad chip trace

pad V+

….. spring chip trace

GND

….. spring

device under test Figure 14. Schematic of the isolation structure (IS) used in package.

In Sample B, the isolation test structures were shunted to form a continuous chain of 796 springs. A glitch in any one spring contact would cause the resistance of the entire chain to glitch. These two chips, each with hundreds of low force pressure contacts, showed no glitches. The humidity test results are given in Table 2. The initial and final 4-wire resistance values are very uniform, with less than five percent variation across the corners and middle of the chip.

1123

2005 Electronic Components and Technology Conference

pin B 3 6 10 14 17 21 avg [ohms] avg % decrease

4-wire resistance [ohms] initial 60 cycles 460 cycles 1.31 1.22 1.21 1.19 1.06 1.04 1.12 1.04 1.03 1.37 1.27 1.26 0.97 1.04 1.02 open open open 1.19 1.13 1.11 -4.9 -6.1

1.25

Table 1. Thermocycling results for package sample A. The resistances were measured at room temperature. Consult Figure 12 for pin number locations. 4-wire resistance [ohms] initial 120 hrs 240 hrs 500 hrs 2.19 2.17 2.18 2.17 2.30 2.22 2.21 2.21 2.22 2.20 2.18 2.18 2.23 2.21 2.19 2.15 2.25 2.20 2.21 2.21 2.20 2.17 2.17 2.18 2.23 2.20 2.19 2.18 -1.6 -1.8 -1.8

aft er 60 cycles aft er 460 cycles

0.75 0.50 0.25 0.00 0.00

0.25

0.50 0.75 current [mA]

1.00

Figure 15. Linear current vs. voltage measurements for the 4-wire resistance test structure taken at room temperature (Sample A, pin A=9, pin B=10). 100

after thermocycle test after humidity test

50 current [pA]

pin A pin B 2 3 5 6 9 10 13 14 16 17 20 21 avg [ohms] avg % decrease

initial

1.00 voltage [mV]

pin A 2 5 9 13 16 20

0 -50 -100

Table 2. Humidity test results for package sample C. The resistances were measured at room temperature, before and after being stored at 60˚C and 95% relative humidity for 120h, 240h and 500h respectively. Refer to Figure 12 for pin locations. Uniformity is better than 5 %. During the humidity tests no resistance increase was observed. This package, Sample C, had a slightly different pad layout than Samples A and B; still with the same 40 µm spring pitch and 20 µm pad pitch. The metal traces on the pad between the springs are much longer, producing about one additional ohm in the 4-wire test structures compared to Samples A and B. Leakage current between the center springs in Figure 14 was measured after environmental testing. Continuity measurements were performed on adjacent chains to insure that the springs in the isolation test structure were in contact with their pads. For example, to measure isolation structure pin 18-19 (see Figure 12), two-wire resistance measurements were performed on daisy chains pin 17-18 and pin 19-20 to confirm electrical continuity. Then the isolation structure was measured by ramping up the voltage across pins 18-19. Figure 16 shows a sample result for Sample A (thermocycle tested) and Sample D (humidity tested). The current is initially below the noise flow of the measurement system (Keithley 2410 Source Measure Unit). The leakage current then increases to just under 100 pA at 250 V. These measurements were performed in room temperature air and humidity. This suggests that an isolation of well over 500 Gohms at 250 V is maintained after thermocycle and humidity testing.

-150 0

50

100 150 200 250 voltage[V] Figure 16. Measured leakage current across isolation test structures after environmental testing.

Discussion The single spring tests show the springs can be used for electrical testing, as they can repeatedly contact a pad and give the same resistance. This is similar to the mode the springs would operate in if they were on a chip which was compressed to a flat contactor for electrical testing to confirm known-good-die status before packaging. To reduce the risk of packaging bad chips in a multi-chip module, the chip could be held in place on the module substrate and the entire module system electrically tested; all before gluing the chip to the substrate. The springs have a significant amount of compliance (> 50 µm), compared to solder balls, which simplify alignment to another non-planar or non-parallel substrate. The compliance also helps to compensate for spring liftheight nonuniformity, which can be about ±5 µm across the ends of a chip. As long as all springs are compressed over 20 µm all springs should make good electrical contact. The pressure contacts appeared very reliable in packages despite operating at only 0.01 gmf. Gold to gold contacts are known to be very reliable for connector applications at the macroscale. These micro-springs are operating at similar or greater pressures than macroscopic connectors, as a force of about 0.01 gmf (~0.1 mN), and a contact area of approximately 10 µm2, gives a pressure of 10 MPa, which is the same

1124

2005 Electronic Components and Technology Conference

pressure as a 1 kg force on a 1 mm2. This helps to explain why the pressure contacts in the packages did not show gradual or intermittent increases in resistance during thermocycle and humidity testing. Adequate compliance is important for making reliable pressure contacts in packages, as operating well below the yield point is critical to maintaining force. We found that if we used weaker thin films with less compliance, packages which had good contacts at room temperature failed after just a few thermocycles. The springs reported here are elastic through their entire compression range (57 µm) at room temperature. Separate tests showed that the spring liftheights changed less than 5% after being compressed 30 µm while being annealed at 135 ˚C for 48 hours. Other concerns for reliability at the microscale include thin film corrosion or stiction. Gold is naturally very corrosion resistant, but these packages have not yet been subject to industrial corrosion tests. The spring tip and pad, however, is encased in acrylic adhesive, which provides protection against gases and moisture. The absence of intermittent opens suggests that stiction problems due to cold or hot welding were not observed. These tests used 1 mA of current, which is more than adequate for LCD driver applications. However, higher current tests would be important to perform for applications such as microprocessors. Current work includes exploring higher force springs. Such springs would have the potential to make reliable pressure contacts on rough gold surfaces, such as printed circuit boards. The spring resistance of 0.54 ohms, while adequate for many applications, should be reduced for high current or high frequency applications. Future designs are addressing these markets. Conclusions These results suggest that a compliant, low force (10 mgf), pressure contact can make reliable electrical contact to a gold pad. Packages with very fine pad pitch (20 µm) were demonstrated, an important step for future generations of flip-chip packaging. Acknowledgments The authors thank Lai Wong, and Vicki Geluz-Aguilar for aiding in fabrication and assembly. References [1] Sudo, T., "An overview of MCM/KGD development activities in Japan," 50th Electronic Components and Technology Conference, Las Vegas, NV, USA, 2000, pp. 805-809. [2] Tummala, R. R., "SOP: what is it and why? A new microsystem-integration technology paradigm-Moore's law for system integration of miniaturized convergent systems of the next decade," IEEE Transactions on Advanced Packaging, vol. 27, (2004), pp. 241-249. [3] Fork, D. K., Chua, C. L., Van Schuylenbergh, K., Chow, E. M., Hantschel, T., Kosgalwies, S., Wong, L., and Geluz, V., "Wafer Level Packaing Using StressedMetal Technology," 37th International Symposium On Microelectronics (IMAPS), Long Beach, CA, 2004, pp. tbd.

[4] Chua, C. L., Fork, D. K., Van Schuylenbergh, K., and Lu, J.-P., "Out-of-plane high-Q inductors on low-resistance silicon," Journal of Microelectromechanical Systems, vol. 12, (2003), pp. 989-995. [5] Bakir, M. S., Reed, H. A., Kohl, P. A., Martin, K. P., and Meindl, J. D., "Sea Of Leads Ultra High-Density Compliant Wafer-Level Packaging Technology," 52nd Electronic Components and Technology Conference, San Diego, CA, 2002, pp. 1087-1094. [6] Hedler, H., Meyer, T., Leiberg, W., and Irsigler, R., "Bump Wafer Level Packaging, A New Packaging Platform (not only) For Memory Products," 36th International Symposium on Microelectronics, Boston, MA, 2003, pp. 681-686. [7] Novitsky, J. and Miller, C., "MicroSpring contacts on silicon: delivering Moore's law-type scaling to semiconductor package, test and assembly," 2000 HD International Conference on High-Density Interconnect and Systems Packaging, Denver, CO, USA, 2000, pp. 250-255. [8] Smith, D. L., Fork, D. K., Thornton, R. L., Alimonda, A., Chua, C. L., Dunnrowicz, C., and Ho, J., "Flip-Chip Bonding On A 6- um Pitch Using Thin Film Microspring Technology," 48th Electronic Components and Technology Conference, Seattle, Washington, 1998, pp. 325-329. [9] Chua, C. L., Fork, D. K., and Hantschel, T., "Densely packed optoelectronic interconnect using micromachined springs," IEEE Photonics Technology Letters, vol. 14, (2002), pp. 846-848. [10]www.nanonexus.com. [11]Kataoka, K., Kawamura, S., Itoh, T., Suga, T., Ishikawa, K., and Honma, H., "Low contact-force and compliant MEMS probe card utilizing fritting contact," Technical Digest. MEMS 2002 IEEE International Conference. Fifteenth IEEE International Conference on Micro Electro Mechanical Systems, 2002, pp. 364-367. [12]Itoh, T., Kawamura, S., Suga, T., and Kataoka, K., "Development of an electrostatically actuated MEMS switching probe card," Electrical Contacts, 2004. Proceedings of the 50th IEEE Holm Conference on Electrical Contacts and the 22nd International Conference on Electrical Contacts, 2004, pp. 226-230. [13]Aukland, N., Hardee, H., Wehr, A., Brennan, S., and Lees, P., "An examination of the metallic bonding of a clad material and two gold plating systems under constant force fretting conditions," Electrical Contacts - 1997 Proceedings of the Forty-Third IEEE Holm Conference on Electrical Contacts, 1997, pp. 7-19. [14]Antler, M. and Drozdowicz, M. H., "Fretting corrosion of gold-plated connector contacts," Wear, vol. 74, (1981), pp. 27-50. [15]Tian, H., Saka, N., and Rabinowicz, E., "Fretting failure of electroplated gold contacts," Wear, vol. 142, (1991), pp. 265-29. [16]Karnezos, M., Pendse, R. D., Afshari, B., Matta, F., and Scholz, K. D., "Reliability of area array pressure contacts on the DTAB package," IEEE Transactions on

1125

2005 Electronic Components and Technology Conference

Components, Packaging, and Manufacturing Technology, Part A, vol. 17, (1994), pp. 263-269. [17]Spiesshoefer, S., Schaper, L., Maner, K., Porter, E., Barlow, F., Glover, M., Marsh, W., Bates, G., and Lucas, M., "Alternative Z-axis connector technologies for highdensity 3-D packaging," Proceedings of 52nd Electronic Components and Technology Conference, 2002, pp. 11061109. [18]Pruitt, B. L., Park, W.-T., and Kenny, T. W., "Measurement system for low force and small displacement contacts," Journal of Microelectromechanical Systems, vol. 13, (2004), pp. 220-229. [19]Hyman, D. and Mehregany, M., "Contact physics of gold microcontacts for MEMS switches," Electrical Contacts 1998. Proceedings of the Forty-Fourth IEEE Holm Conference on Electrical Contacts, 1998, pp. 357-364. [20]Chow, E. M., Klein, K., Fork, D. K., Hantschel, T., Chua, C. L., Wong, L., and Van Schuylenbergh, K., "Intermittency study of a stressed-metal micro-spring sliding electrical contact," 53rd Electronic Components and Technology Conference, New Orleans, LA, USA, 2003, pp. 1714-1717. [21]Hantschel, T., Wong, L., Chua, C. L., and Fork, D. K., "Fabrication of highly conductive stressed-metal springs and their use as sliding-contact interconnects," Microelectronic Engineering, vol. 67-68, (2003), pp. 690695. [22]Fork, D. K., Chua, C., Wong, L., Alimonda, A. S., Smith, D. L., Modi, M., Zhu, Q., Ma, L., and Sitaraman, S., "Stress engineered metal interconnects," 2001 HD International Conference on High-Density Interconnect and Systems Packaging, Santa Clara, CA, USA, 2001, pp. 195-200. [23]Kataoka, K., Kawamura, S., Itoh, T., Ishikawa, K., Honma, H., and Suga, T., "Electroplating Ni microcantilevers for low contact-force IC probing," Sensors and Actuators A (Physical), vol. A103, (2003), pp. 116-121. [24]Chow, E. M., Hantschel, T., Klein, K., Fork, D. K., Chua, C. L., Wong, L., and Van Schuylenbergh, K., "Microspring force characterization and applications in integrated circuit packaging and scanning probe MEMS metrology," IEEE International Solid-State Sensors and Actuators Conference, Boston, MA, USA, 2003, pp. 408-411 vol.1. [25]Haemer, J. M., Sitaraman, S. K., Fork, D. K., Chong, F. C., Mok, S., Smith, D. L., and Swiatowiec, F., "Flexible micro-spring interconnects for high performance probing," 2000 Proceedings. 50th Electronic Components and Technology Conference, Las Vegas, NV, USA, 2000, pp. 1157-1163. [26]Bromley, S. C. and Nelson, B. J., "Performance of microcontacts tested with a novel MEMS device," Electrical Contacts, 2001. Proceedings of the FortySeventh IEEE Holm Conference on Electrical Contacts, 2001, pp. 122-127.

1126

2005 Electronic Components and Technology Conference