Ebers - Moll Model Equations: IDE = IES [exp(VBE/VT) -1] IDC = ICS [exp(VBC/VT) -1] Typical values: αF = .99 IES = 10-15 A αR = .66 ICS = 10-15 A
Slide 23
BJT Inverter & Fan-Out Analysis • BJT Inverter • Voltage Transfer Characteristics • Logic Level Description • Fan-Out Analysis
Slide 24
Base diffusion VCC
BJT Inverter Vout
VCC = 5 V RC 1 kΩ
100 Ω/ 10 = 1kΩ
Vin
RB
Vout
10 k Ω
Vin = 5 V Vin = 0 V
Slide 25
NPN BJT Parameters VBE(on) = 0.7 V VBE(sat) = 0.8 V VCE(sat) = 0.1 V Forward active mode: • current gain βF = 70
Slide 26
VOH and VIL VEB = 0 V IC = 0 IB = 0 VCB = +5 V
VCC = 5 V
I RB
Vin = 0 V I
B
10 k Ω
RC 1 kΩ C
Vout = 5 V Q0
cut-off
n E
p B
n C
VEB = 0 - 0.7 V Cut-off
Slide 27
VOH and VIL Cut-off
Vout [V] VOH 5
BP1
4 3 2 1 Vin [V] 0 0
VIL1
0.7 V
2
3
4
5 Slide 28
VOL βF = 70 in Forward Active
VEB = 0.7 V I B = (5-0.7)/10kΩ = 0.43 mA I C = IB βF = 30 mA Vout = 5 - IC RC = -25 V ?
VCC = 5 V
I RB
Vin = 5 V I
B
10 k Ω
RC 1 kΩ C
NOT Forward Active !
Vout = 0.1V
I C < IB βF = 30 mA βF < 70
Q0
Saturation n E
Vout = 0.1 V
p B
n C
Slide 29
VOL Cut-off
Vout [V] VOH 5
BP1
4 3 2
Saturation
1
0.1 V
Vin [V]
VOL 0 0
VIL 1
2
3
4
5
0.7 V Slide 30
VIH Edge of saturation: VCC = 5 V
I RB
Vin = ? I
B
10 k Ω
RC 1 kΩ
βF = 70 V = 0.8 V EBs
V
out
= 0.1V
C
Q0
Vout = 0.1V
I B = ((5-0.1)/1kΩ)/70 = 70 µA V = VEBs + I B R B = 0.8 + 0.7 Vin = 1.5 V Slide 31
VIH Vout [V] VOH 5
Cut-off BP1
4 3 2
Saturation
1
0.1 V
Vin [V]
BP2
VOL 0 0
VIL1 VIH 2
0.7 V 1.5 V
3
4
5 Slide 32
Transition Region VCC = 5 V RC 1 kΩ V in = 0.7 - 1.5V RB 10 k Ω
V out = 5.0 - 0.1 V Q0
Forward Active !
IB = (Vin - 0.7)/R B I C = IB βF Vout = VCC - IC RC Slide 33
Transition Region: Load Line Analysis I C [mA]
14 13 12 11 10
I
B
= 120µA
I
B
= 100µA
I
B
= 80µA
I
B
= 60µA
IB = (Vin - 0.7)/R B I C = IB βF Vout = VCC - IC RC
9
8 7 6
IB = (1.5 - 0.7)/ 10kΩ = 80 µΑ Vin = 0.7 - 1.5V
5 4
I
B
= 40µA
I
B
= 20µA
3 2
1 0
1.0
2.0
3.0
4.0
5.0 VCE [V] Slide 34
Voltage Transfer Characteristic Cut-off
Vout [V] VOH 5
BP1
4
Forward Active 3 2
Saturation
1
Vin [V]
BP2
VOL 0 0
VIL
1
VIH
2
3
4
5 Slide 35
Voltage Transfer Characteristic Vout [V] VOH 5
• Transition Width: TW= VIH - VIL = .8 V
BP1
4
• High Noise Margin: NMH = VOH - VIH = 3.5 V
3 2 1 VOL
Vin [V]
BP2
0 0
VIL
1
VIH
2
3
4
• Low Noise Margin: NML = VIL -VOL = .6 V
5
• Logic Swing: LS = VOH - VOL = 4.9 V
Slide 36
Inverter Fan-Out VCC = 5 V RC 1 kΩ
Vin
RB 10 k Ω
Vin = 0 RB
n
Q0
RC 1 kΩ V out RB 10 k Ω
Q1 RC 1 kΩ RB 10 k Ω
QN
Slide 37
Inverter Fan-Out • LOAD =1 VOH = 4.6 V
VCC = 5 V
RC 1 kΩ
V in= 0.1 V
RB 10 k Ω
Vout = ( V
CC
RC 1 kΩ
Vout = 4.6 V RB
Q0 cut-off 10 k Ω
- 0.8 )
( 5.0 - 0.8 )
RB R
B
10
+RC
10
+1
Q1 saturation
+ 0.8 = + 0.8 = 4.61 V Slide 38
Equivalent Circuit VCC = 5 V
VOH = ?
RC 1 kΩ RB
Vin
10 k Ω
Vout = ( V
CC
- 0.8 )
V out Q0 RB/N
RB / N R /N B
( 5.0 - 0.8 )
VBE(sat)
+RC
10 /10 10 /10 + 1
+ 0.8 =
+ 0.8 = 2.9 V Slide 39
Maximum Number of Load Gates: VOH = VIH VCC = 5 V
VOH = ?
RC 1 kΩ
VIH = ? N=?
RB
Vin
Vout = ( V
V out Q0
10 k Ω
CC
- 0.8 )
RB / N R /N B
( 5.0 - 0.8 )
10 /N 10 /N + 1
+R C
RB/N
VBE(sat)
+ 0.8
+ 0.8 = 1.5 V Slide 40
Transistor-Transistor Logic (TTL) • Disadvantages of TTL gates: • Large # of components, area --> VLSI not feasible • Large power consumption • Saturated transistors in either high or low state • Large propagation times • Advantage: • Can drive large capacitive loads since large output currents available