45th International Symposium on Microelectronics | September 9-13, 2012 | San Diego, California USA

Miniaturization of Electronic Substrates for Medical Device Applications Frank D. Egitto, Rabindra N. Das, Glen E. Thomas, and Susan Bagen Endicott Interconnect Technologies, Inc., 1093 Clark Street, Endicott, New York, 13760, Email : [email protected] Phone no: 607-755-2051 Abstract: The medical industry is clearly and urgently in need of development of advanced packaging that can meet the growing demand for miniaturization, high-speed performance, and flexibility for handheld, portable, in vivo, and implantable devices. To accomplish this, new packaging structures need to be able to integrate more dies with greater function, higher I/O counts, smaller die pad pitches, and high reliability, while being pushed into smaller and smaller footprints. As a result, the microelectronics industry is moving toward alternative, innovative approaches as solutions for squeezing more function into smaller packages. In the present report, key enablers for achieving reduction in size, weight, and power (SWaP) in electronic packaging for a variety of medical applications are discussed. These enablers include materials selection, embedded passives and active devices, System-in-Package (SiP) designs, and flex circuits. Manufacturing methods and materials for producing advanced organic substrates and flex along with ultra fine pitch assemblies are discussed. A case study detailing the fabrication of a flexible substrate for use in an intravascular ultrasound (IVUS) catheter demonstrates how the challenges of miniaturization are met. These challenges include use of ultra-thin polymer films, extreme fine-feature circuitization, and assembly processes to accommodate die having reduced die pad pitch. Introduction: The wide range of applications for medical electronics drives unique requirements that can differ significantly from commercial & military electronics. This is particularly the case for handheld, portable and implantable medical devices that demand increased functionality with decreasing size, weight and power (SWaP). Form, fit, function, integrated sensors, batteries, leads, biocompatibility, operational life and reliability specifications define requirements for atypical form factors, unique assemblies and non-standard material sets. Manufacturability and producibility are paramount to the practical implementation of these diverse packaging forms. High Density Substrate Technology A key enabling technology to achieving SWaP for medical electronics is the substrate. A substrate supplier must offer a range of substrate material sets and solutions to meet different form factor and performance requirements. When a greater degree of miniaturization is required in a rigid substrate, semiconductor packaging laminates fabricated using laminate materials that do not conain glass cloth, unlike typical printed circuit board laminate materials, allow for the formation of higher resolution vias by UV laser drilling as opposed to more conventional mechanical and CO2 laser drilling. The smaller via size minimizes capture pad area requirements and enables a much greater via density, resulting in substrate size reduction as compared to conventional technology. The absence of the glass cloth also results in a smoother dielectric surface finish, enabling higher resolution photolithography for finer line widths and spaces, which results in improved electrical performance. Because of the omission of glass cloth, the dielectric layer thicknesses are substantially less, therefore, the overall laminate stack-up is much thinner. Figure 1 depicts a rigid, wirebondable organic substrate that enables increased functionality in decreased form factor for

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implantable cardiac devices such as implantable cardioverter defibrillators (ICDs) and pacemakers. The 8-layer substrate cross-section shown incorporates high density buildup layers to accommodate reduced die pad pitch and improve electrical performance.

Figure 1. Increased functionality in a decreased form factor for implantable cardiac devices such as implantable cardioverter defibrillators (ICDs) and pacemakers. Embedded Passives and Active Devices Passives account for a very large part of today’s electronic assemblies. This is particularly true for digital products such as cellular phones, camcorders, computers and defense devices. Market pressures for new products with more features, smaller size and lower cost virtually demand smaller, compact, complex circuit boards. An effective strategy is to reduce the number of surface mounted passives by embedding them in the substrate or printed wire boards. In addition, current interconnect technology to accommodate surface mounted passives impose certain limits on board design,

45th International Symposium on Microelectronics | September 9-13, 2012 | San Diego, California USA

which limit the overall circuit speed. Embedding passives is one way to save substrate real estate, conversion cost, reduce parasitic effects and improve performance [1]. Among the various passives, embedded capacitors deserve special attention as they provide the greatest potential benefit for high density, high speed and low voltage IC packaging. Capacitors can be embedded into the interconnect substrates (printed wiring board, flex, MCM-L, interposer) to provide decoupling, bypass, termination, and frequency determining functions [2, 3]. In order for embedded capacitors to be useful, the capacitive densities must be high enough to make layout areas reasonable. Available commercial polymer composite technology is not adequate for high capacitance density thin film embedded passives. Several polymer nanocomposite studies so far have been focused on processing of high capacitance density thin films within small substrates/wafers [4-7]. One of the important processing issues in thin film polymer nanocomposite based capacitors is to achieve high capacitance density on large coatings. The miniaturization and embedding of components that SiP provides will greatly reduce the size, weight and power (SWaP) of the application. Thin film resistors are readily incorporated into the laminate substrate fabrication processing, substantially minimizing the discrete resistor count. Laser trim aids in meeting design requirements for tight resistor tolerances. New technologies for embedding active die are being developed and implemented into the manufacturing environment. A variety of active silicon die with metal pads, have been embedded and electrically connected to develop highly integrated packages. System-in-Package (SiP) System-in-Package (SiP) designs that implement embedded passive and active components further enable SWaP reductions. Thinner, high-density substrate technologies lower inductance, driving down the need for decoupling capacitors in the design. For example, high density interconnect technology combined with embedded passives and small die and component body sizes have been shown to achieve as much as 27 times reduction in physical size for existing printed wiring board assemblies, with significant reductions in weight and power consumption (see Figure 2). Primary reductions in power are due to reduced interconnect lengths and corresponding load. Shorter interconnects can also reduce or eliminate the need for termination resistors for some net topologies. The concept of SiP can be implemented on various levels depending on the application requirements including full system, partial bill-of-material (BOM) functional modules (e.g., digital processor – memory modules), MEMS sensor packaging, and component obsolescence issues.

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Figure 2. Miniaturization via System-in-Package. Microflex and Ultra Fine Pitch Flip Chip Assembly Advanced microflex coupled with ultra fine flip chip assembly meets the challenge of extreme miniaturization and unique form factors requirements. Figure 3 illustrates an example of a highly miniaturized assembly on microflex for use in intravascular ultrasound (IVUS) catheters. IVUS catheters provide physicians with a 360 degree digital view of the inside of a patient’s arteries. IVUS provides for analysis of the amount, location, and type of plaque in the arteries. An ultrasound transducer, or piezoelectric device, is mounted in the tip of the catheter. This transducer is mounted to a thin flexible substrate, along with a number of ASIC die used to control the functions of the catheter lab, i.e., the digital imaging control unit to which the catheter is attached during use. Advantages of IVUS over angiography include, better vessel definition, measurement of plaque thickness and plaque buildup, plaque make-up, stent size and placement determination, and blood pressure changes around a lesion [8]. The capabilities of IVUS are realized through the implementation of ultra-miniaturized electronics within the catheter that allow for image and signal processing to occur at the source of data acquisition. A paradigm shift in the approach to microelectronics packaging was needed to meet these requirements and enable this technology. For the IVUS catheter assembly, the exceptional thinness of the polyimide flex substrate (12.5 µm) is necessary for the assembly with the PZT transducer and ASIC die to be rolled into a very tight cylinder, having a diameter on the order of about 1 mm (about 3.5F). This rolled assembly is then placed at the end of the catheter after attachment of the electronic leads. The use of semi-additive circuitization facilitates manufacture of fine-line circuit features on the flex, in this application having metal traces of 14 m. A smooth copperpolymer interface is ideal for this fine line circuitization, and selection of appropriate material surface preparation and metal deposition processing provides good metal adhesion to the

45th International Symposium on Microelectronics | September 9-13, 2012 | San Diego, California USA

base polyimide film. The die are bumped with solder-tipped Cu studs having 22 µm diameter on a 70 µm pitch. Ultra fine flip chip assembly is required to produce this microflex assembly in high production volumes. The key technical challenges in developing the processes used to fabricate this flex device include use of the ultra-thin polyimide flex material and the fine line circuitization required for miniaturization. Also, to eliminate the need for a soldermask, a means of forming solder dams to prevent solder wicking away from the flip chip bond pads and down the circuit traces had to be devised. Of course, with 22 micron bumps on a 70 micron pitch, die placement tools with extremely high registration capabilities are required. And finally, maintaining flatness of the flex substrate during die placement and assembly processing at elevated temperatures is key.

To achieve fine line circuitization, a semi-additive, or pattern plating, process was employed. The process starts with sputter deposition of chromium and copper. The chromium serves as a “tie” layer to provide adhesion between the sputtered Cu and the polyimide. To achieve fine line lithographic features, a liquid photoresist is spun onto the polyimide film, held flat on its metal carrier. Resist thickness is on the order of 5 microns. After UV exposure and developing of the photoresist, (Figure 7) an electrolytic plating process is used to deposit the metal stack. Key to this construction is the plating of gold on the surface, for purposes of good flip chip solder bonding, and an underlying metal having a surface energy that’s low with respect to that of gold. The photoresist and sputter deposited seed layer are then removed.

Figure 4. Support of 12.5 µm polyimide film during substrate fabrication using a rigid frame.

Figure 3. IVUS catheter, containing flex substrate with ASIC die and transducer.

The thin polyimide film is held flat and taut during processing [9]. The film is mounted, using an adhesive, to a rigid metal frame by laminating at an elevated temperature. Since the coefficient of thermal expansion (CTE) of the polyimide film is greater than that of the metal frame, it shrinks at a greater rate during cooling to room temperature, pulling the film flat and taut. Figure 4 shows a substrate containing multiple images at successively greater magnifications. In the upper right corner, one can see the area of the device having 14 µm lines and spaces, with die bond pads on a 70 µm pitch. Figure 5 shows optical views of the flex substrate pre- and post- device attach, with an SEM micrograph showing four of the five ASIC die and a piezoelectric transducer. On the die side, bond pads are plated with Cu studs that are tipped with solder (Figure 6). The Cu pillars offer greater interconnect density than solder ball bumps owing to the spherical geometry of the latter. The Cu pillars also offer enhanced electrical and thermal connection [10].

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Since no solder mask is used for this application, a solder dam is formed using the low surface energy metal adjacent to gold bond pads on the flex substrate to prevent solder from the die bumps from wicking down circuit traces (Figure 8). Double-Sided Flex: In Vivo Ultrasound Diagnostics Device: A separate application involves a double-sided flex substrate, with finer circuitized features and greater wiring density than the single-sided flex substrate described above. As for the IVUS example above, this device is fabricated by holding the polyimide film flat and taut in a rigid frame. Also similar to the IVUS device, circuit traces are defined using a semiadditive plating process. In this case, minimum line width and spacing between lines are both 11 µm. Metal trace thickness is 6 µm. Vias are drilled through the 25 µm thick polyimide film using a frequency-tripled Nd-YAG laser operating at a wavelength of 355 nm. Vias and surface metal are plated simultaneously using the semi-additive plating process (Figure 9). After application of a 6 µm thick flexible soldermask to both sides of the substrate, placement of two ASIC die and a number of surface mounted capacitors completes the flex substrate assembly.

45th International Symposium on Microelectronics | September 9-13, 2012 | San Diego, California USA

Figure 5. Optical views of the flex substrate pre- (a) and post(b) device attach, with an SEM micrograph showing the five ASIC die and piezoelectric transducer (c).

Figure 8. SEM micrographs showing solder dams formed using a low surface energy metal adjacent to gold bond pads. The inset is at lower magnification.

Figure 9. Optical photo in cross section of a double-sided flex substrate with 25 µm plated vias and 11 µm plated metal traces.

Figure 6. Bumped die with solder-tipped Cu studs on a 70 µm pitch.

Figure 7. SEM micrographs showing typical resist profiles and features for this device. The inset is at lower magnification.

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Multilayer Flexible Substrates: Flex circuits are used in various applications where requirements for flexibility and space savings limit the serviceability of rigid substrates. Most of these miniaturized applications require high density multilayer flex circuits. For example, flexible solar cells, displays, transistors, etc may require substrates having at least 2-5 layers. Here, desired multi-layers properties are realized not through new materials but instead through new structural configurations, by controlling dielectric, metal and joining layers, and thickness. For example, flexibility will decrease with increasing total thickness. The extension to high layer count flexible substrates is remarkably straightforward: thin material structures offer flexibility without inducing significant strains in the materials themselves. This approach has recently been used to create rollable and flexible electronics. Flexible materials with 1-2 metal layers provide the smallest possible roll diameter for systems such as catheters.

45th International Symposium on Microelectronics | September 9-13, 2012 | San Diego, California USA

Figures 10 illustrate flexible substrates in two types of configurations. The first (Figure 10B-C) involves pure flexible materials with adhesive layers. For this case depending on dielectric and Cu thickness, one can roll the substrates with a roll diameter anywhere from 3 millimeter or higher. A 6 metal layer substrate with three joining layers (Figure 10A) can produce a minimum 1 inch roll diameter which is larger than 2 metal layers due to lower flexibility of the joining materials between flex layers. This interaction eventually converts rollable materials to just bendable materials with increasing metal layers. Bend radius will depend upon total thickness. It can be seen for the same number of metal layers, structures with lower dielectric thickness bend more than structures with thicker dielectric.

A

B

C Figure 11: Fine feature circuitization on highly thermally conducting flexible films having 30 m lines and spaces.

Figure 10 : Various multi-layer flexible structures (A) 12 metal layers, 12.8-13 mils thick, bend radius 1 inch or higher, (B) 12 metal layers, 7.5 mils thick, bend radius 3 mm or higher, and (C) rollable structures.

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PDMS-Based substrates: Polydiemethylsiloxane (PDMS) is a transparent, commercially important polymer based on inorganic backbone. PDMS is well suited to plastic molding process. It is biocompatible and, as such, is a good material for use in surgical procedures such as implants for plastic surgery, as components for catheters, and in prosthesis [11]. It is commonly used in the fabrication of micro-electromechanical-systems (MEMS), for example, microfluidic devices used for low injection analysis [12, 13]. PDMS ‘Stamps’ with pattern relief on the surface are used for the manufacture of nanostructures with dimention dimensions as small as 30 nm, a technique known as soft lithography [14]. Here we are transforming the PDMS surface to silicon-oxide by a plasma process. Silicon oxide modification provides a simple solution to build electronic circuits on low cost flexible PDMS substrates. Several PDMS substrates including nano and micro composites have been used in flexible technology. The present process allows fabrication of traces having line widths narrower than 30 m in PDMS-based substrates (Figure11).

45th International Symposium on Microelectronics | September 9-13, 2012 | San Diego, California USA

8. Summary and Conclusions: Medical devices, especially handheld, portable and implantable, are an expanding market driving the need for unique solutions for increased functionality with decreasing size, weight and power (SWaP). By integrating the building blocks of SiP - advanced substrate technology, embedded passives and actives – coupled with concurrent engineering design-for-manufacture (DFM), advanced packaging solutions have been successfully implemented to reduce electronics volume and advance the capabilities of medical device technology. For advanced flex circuit constructions, processes, fixtures, and equipment must be devised to provide fine line circuitry and accommodate mounting of ASIC die having ultra fine pitch flip chip assembly. For advanced flex circuit applications, thin flexible base materials require special handling techniques. Using semi-additive plating processes (pattern plating), fine-feature circuitization can be achieved. Avoidance of solder wicking during reflow can be achieved without use of traditional solder mask by using a low surface energy metal as a solder dam. For flexible substrates, cost of fabrication can be reduced by migrating from fabrication in a panel format to roll-to-roll processes. References 1. Jillek W. and Yung W. K. C., “Embedded components in printed circuit boards: a processing technology review” International Journal of Advanced Manufacturing Technology Vol. 25 No.(3-4), (2005), pp. 350-360. 2. “Passive Integration: Easier Said Than Done”, Prismark Partners LLC, August 1997 3. Post J. E., “Microwave performance of MCM-D embedded capacitors with interconnects” Microwave and Optical Technology Letters Vol. 46, No5, (2005), pp. 487-492. 4. Rao Y., Ogitani S., Kohl P., Wong C. P., “Novel polymer-ceramic nanocomposite based on high dielectric constant epoxy formula for embedded capacitor application” Journal of Applied Polymer Science Vol. 83, No. 5, (2002), pp.1084-1090. 5. Rao Y., Wong C. P., “ Material characterization of a high-dielectric-constant polymer-ceramic composite for embedded capacitor for RF applications” Journal of Applied Polymer Science Vol. 92, No. 4, (2004), pp. 2228-2231. 6. Windlass H., Raj P. M., Balaraman D., Bhattacharya S. K., and Tummala R. R., “ Colloidal processing of polymer-ceramic nanocomposites for integral capacitors” IMAPS International Symposium on Advanced Packaging Materials, Braselton, 2001, pp. 393-398 7. Ramesh S., Shutzberg B. A., Haung C., Gao J., Giannelis E. P., “Dielectric nanocomposites for integral thin film capacitors: Materials design, fabrication, and integration issues” IEEE Transactions on Advanced Packaging Vol. 26, No. 1, (2003), pp. 17-24.

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9. 10. 11. 12. 13. 14.

Diagnostic and Invasive Cardiology, January/February 2009 Issue, Reilly Communications Group. For discussion of frame mounting of flexible films, see, e.g., Durocher, et al., US Patent 6,994,897 (2006). Deepak Sharma, Sachin Kalra, Azeem Hasan, and Rahul Saxena, Freescale Semiconductors -- EDN, May 30, 2012. National toxicology program Report Number IMM90006, “Contact Hypersensitivity studies in Female B6C3F1 mice” US department of health and human services. Duffy D.C., OJA Schueller, ST Brittain, GM Whitesides, J. Micromech Microeng 9: 211 (1999). Jo B-H, Lerberghe L.M., Motsegood K.M., Beebe D.G., J. Microelectro-mech Syst. 9 :22 (2000) Xia Y., Whitesides G. M., Angew Chem Int Ed 37, 1998,pp.550.