Academic Course Description. VL2004 CMOS Analog VLSI Second Semester, (EVEN Semester)

Academic Course Description SRM University Faculty of Engineering and Technology Department of Electronics and Communication Engineering VL2004 CMOS ...
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Academic Course Description SRM University Faculty of Engineering and Technology Department of Electronics and Communication Engineering

VL2004 CMOS Analog VLSI Second Semester, 2014-15 (EVEN Semester) Course (catalog) description This course will teach design and analysis of analog circuits, in particular, design concepts pertinent to real world applications, with an emphasis on CMOS. It deals with the design and analysis of CMOS single stage and differential amplifiers at low and high frequencies of operation. This course introduces the design of current mirror and CMOS op-amp circuits. It also describes the noise analysis of CMOS amplifiers. Circuit performance is predicted by intuition and simple hand calculations, and is verified by computer simulations. The course also involves design projects which will be assigned using design software. Compulsory/Elective course: Compulsory for VLSI students Credit hours: 4 credits Course coordinator: Dr. J. Selvakumar, Asst. Prof. (S.G), Dept. of ECE Instructor(s) Name of the instructor

Class handling

Dr. J. Selvakumar

A

Office location

Relationship to other courses Pre-requisites : Assumed knowledge : Following courses :

Office phone -

Email (domain: @ktr.srmuniv.ac.in)

selvakumar.j

Consultations Day5: 1.30 to 4 pm, and Lunch hours of every day

Nil Basic knowledge in CMOS operation and circuit analysis. VL2107 CMOS Mixed Signal Circuit design VL2114 RF VLSI Design

References 1. Allen, Holberg, “CMOS analog circuit design”, Oxford University Press, 2004.

2. Razavi, “Design of analog CMOS integrated circuits”, McGraw Hill, 2001. 3. Gray, Meyer, Lewis, Hurst, “Analysis and design of Analog Integrated Circuits”, 4th Edition, Willey International, 2002. 4. Related journal and conference publications Computer usage: Synopsys HSPICE and Cadence Virtuoso are used to facilitate analysis, design and circuit simulation. Class schedule : Four 50 minutes lecture sessions per week, for 14-15 weeks. One Practical session of 2.5 hours per week, for 13-14 weeks. Section

Lecture Day1: 2 Hr, Day2: 4th Hr, Day3: 1st & 6 th Hr

Practical Day 2: 5, 6 & 7 Day 4: 5,6 & 7

nd

A

Professional component General Basic Sciences Engineering sciences & Technical arts Professional subject

-

0% 0% 0% 100%

Broad area : Communication | Electronics | VLSI | Embedded Test Schedule S. No.

Test

Portions

Duration

1

Cycle Test

Units: 1 & 2

2 Periods

2

Model Test

Units: 1 to 5

3 Hrs

Course objectives The course fulfills a need for a graduate level CMOS analog IC design course that covers both general analog IC design theory and practical design methodology. The objectives of this course is to 1. 2. 3. 4.

To analyze bias circuit using CMOS current mirror To design and analyze the single stage and differential MOS amplifiers. To analyze the MOS OP-AMP circuits and to study the frequency response of MOS amplifiers. To understand the noise analysis of MOS amplifiers.

Course Learning Outcome This course provides the foundation education in CMOS analog circuits suitable for low and high frequency applications. Through lecture, practical and out-of-class assignments, students are provided learning experiences that enable them to: 1. Discuss the small-, large-signal and noise analysis of MOS circuits. 2. Analyze and deign MOS op-amp circuits and the MOS subcircuits like switch, references and current mirrors. 3. Become proficient with computer skills (eg., Multisim, HSPICE, Virtuoso) for the analysis and design of circuits. 4. Design basic circuits based on the knowledge acquired in the course.

Syllabus Contents UNIT I - ANALOG CMOS SUB-CIRCUITS (12 hours) Introduction to analog design, Passive and active current mirrors, band-gap references, Switched Capacitor circuits - basic principles, sampling switches, switched capacitor integrator, switched capacitor amplifier, simulation of CMOS sub circuits using SPICE. UNIT II - CMOS SINGLE STAGE AMPLIFIERS (17 hours) Common-Source stage (with resistive load, diode connected load, current-source load, triode load, source degeneration), source follower, common-gate stage, cascode stage, folded cascode stage. Frequency responses of CS stage, CD stage, CG stage, cascode stage, simulation of CMOS amplifiers using SPICE. UNIT III - DIFFERENTIAL AMPLIFIER & OPERATIONAL AMPLIFIERS (16 hours) Single-ended and differential operation, basic differential pair – qualitative and quantitative analyses, commonmode response, differential pair with MOS loads, Performance parameters of op-amp, one stage op-amp, twostage CMOS op-amp, Gain boosting, slew rate, power supply rejection, Simulation of differential amplifiers using SPICE. UNIT IV - OSCILLATORS (15 hours) General considerations, Ring oscillators, LC oscillators – cross-coupled oscillators, Colpitts oscillator, One-port oscillator, and voltage controlled oscillators. Simulation of oscillators using SPICE. UNIT V - NOISE CHARACTERISTICS (15 hours) Statistical characteristics of noise, Types of noise - thermal noise, flicker noise, Representation of noise in circuits, noise in single-stage amplifiers (CS, CD and CG stages), noise bandwidth.

Topics covered week by week Week #

1

2

3 4 5 6

Topics Terminologies: Analog and Digital signals, analog sampled-data or discrete time signal, circuit Circuit design, analysis of a circuit, synthesis of a circuit, differences between integrated and discrete analog circuit Design process of an analog integrated circuit. Computer simulation models, simulation of MOS circuits using SPICE. Analog CMOS subcircuits: Passive and active current mirrors Current and voltage references, bandgap reference Switched capacitor circuits Simulation of CMOS sub circuits using SPICE. CMOS single-stage amplifiers: Common-Source stage Source follower, common-gate stage Cascode and folded cascode stages Frequency Response of CS stage, CG stage, CD stage and Cascode stage Simulation of CMOS amplifiers using SPICE.

Text / Chapter

[1] chapter-1 [2] chapter-1

[1] chapter-4 [2] chapter-5 & 11, [3] chapter-4 [2] chapter-12 [1] chapter-5 [2] chapter-3, [3] chapter-3 [1] chapter-5 [2] chapter-3, [3] chapter-3 [2] chapter-6 [3] chapter-7

Week # 7

8

9

10

11

12

13

14

Topics Differential amplifiers: Single-ended operation, differential operation, basic differential pair Large-signal and small-signal behaviour Common-mode response, differential pair with MOS loads Simulation of differential amplifiers using SPICE Operational amplifiers: Performance parameters of op-amp Two-stage CMOS op-amp, cascode op-amps Gain boosting, slew rate, power supply rejection Simulation of operational amplifiers using SPICE Oscillators: Basic principal and General considerations Ring oscillators, LC oscillators – cross-coupled oscillators, Colpitts oscillator One-port oscillator, and voltage controlled oscillators Simulation of oscillators using SPICE Noise: Noise characteristics in the frequency & time domains Thermal noise, shot noise, flicker noise, popcorn noise Noise models of IC components, Representation of noise in circuits Noise in single-stage amplifiers – CS, CD & CG Noise bandwidth, Noise figure, noise temperature

Text / Chapter [1] chapter-5 [2] chapter-4 [3] chapter-3 [1] chapter-5 [2] chapter-4, [3] chapter-3 [1] chapter-6 [2] chapter-9, [3] chapter-6 [1] chapter-6 [2] chapter-9, [3] chapter-6 [2] chapter-14

[2] chapter-14 [2] chapter-7 [3] chapter-11

[2] chapter-7 [3] chapter-11

Laboratory / Projects Labs

Lab Exercise

Week

1

Cadence / HSPICE tutorial

1

2

Basic MOS circuits

2

3

Analog CMOS sub-circuits

3

4

CMOS single-stage Amplifiers

4

5

Differential Amplifiers

5

6

One-stage & Two-stage op-amp

5

7

Voltage-Controlled Oscillators

6

8

Virtuoso ( Cadence Analog)Tutorial

7

9

CMOS single-stage Amplifiers Students are required to design and analyze an Analog or Mixed Analog-Digital system using a given CMOS technology and CAD tools. Projects must make an extensive use of the knowledge acquired from the course. Projects must be design-oriented and all designs must be in CMOS technologies.

Project

8,9

Note: Schedule of lectures and labs is tentative. There may be some changes in the schedule that will be announced in the class.

Assessment Methods Component Theory Component

Practical Component

Assessment Tool Cycle Test Model Test Surprise Test Assignment End-Semester Theory Examination Carrying out laboratory work, attendance, and submission of record, class tests, model examination, quizzes, etc. End-Semester Practical Examination

Weightage 10 % 10 % 5% 5% 40 % 15 % 15 %

Use of Calculators in Examinations Non-programmable scientific calculators without formulae storage and /or text display features may be used during examinations Reading Assignment Prior to each lecture, a reading assignment is assigned for that lecture. Students are expected to have read the sections assigned for the class before the class. In class, I will talk about elements from the reading assignment and solve some related problems. We will be exploring the material together, your participation and engagement are critical. Homework Homework assignments will be a combination of textbook problems and CAD tool exercises. Homework is assigned each week by Monday and will be due on Monday the week after it is assigned. No late turn-in of homework will be accepted for any reason, and the default students will receive zero grade. Project The students in the course will be required to perform a computer simulation project on assigned topic(s) related to analog IC circuits and make an oral presentation along with the project-report submission. The design of the system must contain the followings: (i) Background studies: An extensive background study of the system to be designed is required. A literature review must be included in the project report. (ii) Schematic-level design: The schematic-level design must be simulated. All schematics of the design must be included in the project report. The dimensions of all transistors and devices must be tabulated explicitly and included in the project report. All simulation results must be included in the project report. (iii) Project reports: Prepared in a single-column double-space format using either MicrosoftWord or LaTeX, and must contain the followings: 1) Title page - Title of the project, authors' name, and course name. 2) Abstract - Abstract of the project report. 3) Table of contents - List of chapters, sections, and subsections of the project report. 4) List of figures - List of all figures in the project report. 5) List of tables - List of all tables in the project report. 6) Main body of the project report - All figures and tables must be inserted into the main body of the report. No separate print-out of figure/table attached to the end of the report is acceptable.

7) References - List of the books, journal papers, conference papers, and other publications used in the project report. References must be listed using IEEE reference styles. You need to take a look at IEEE Transactions on Circuits and Systems I - Regular Papers and IEEE Journal of Solid-State Circuits for IEEE reference styles on books, journal papers, conference papers, and technical reports. 8) Index - List of key words and their page number in the project report. Policies • Attendance Policy: I expect you to attend classes regularly and participate in class discussion. If you must miss a class for some unavoidable reason, I would appreciate knowing ahead of time. • All assignments (homework, labs) will be due at the beginning of the class on the due date. No late submissions will be accepted unless a valid excuse is given to the instructor by a day prior to the due date. • You are expected to attend all classes. If you miss a class, you are responsible for finding out the material covered in that class. If you miss an exam, a grade of zero will be assigned, unless a valid excuse is given. • All assignments are expected to be done by each student individually. Verbal and informal exchange of ideas is permitted, indeed encouraged. However, written solution should NOT be shown to another student or copied from another student. Any act of academic dishonesty will result in a Fail grade. • Cheating, plagiarism and other forms of academic fraud are taken very seriously by both the University and the Department. Hope you work hard, learn a lot, and enjoy the course.

Prepared by: Dr. J.Selvakumar, Assistant Professor (S.G), Department of ECE. Dated: 02-01-2015

Revision No.: 00

Date of revision: Nil

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