7. Fundamental Transistor Amplifier Configurations Lecture notes: Sec. 5 Sedra & Smith (6th Ed): Sec. 5.4, 5.6 & 6.3-6.4 Sedra & Smith (5th Ed): Sec. 4.4, 4.6 & 5.3-5.4

ECE 65, Winter2013, F. Najmabadi

Issues in developing a transistor amplifier: 1. Find the iv characteristics of the elements for the signal (which can be different than their characteristics equation for bias). o This will lead to different circuit configurations for bias versus signal

2. Compute circuit response to the signal o Focus on fundamental transistor amplifier configurations

3. How to establish a Bias point (bias is the state of the system when there is no signal). o Stable and robust bias point should be resilient to variations in µnCox (W/L),Vt (or β for BJT) due to temperature and/or manufacturing variability. o Bias point details impact small signal response (e.g., gain of the amplifier).

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (2/26)

What are amplifier parameters? Voltage Gain of the Circuit : A =

vo vsig

Voltage Gain of the Amplifier : Av = Open - loop Gain : Avo =

Input Resistance : Ri =

vo vi

vo vi

RL → ∞

vi ii

Output Resistance of Amplifier : Ro = −

vo io

v →0

sig Output resistance is the Thevenin resistance between the output terminals!

 In general Ri depends on RL and Ro depends on Rsig F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (3/26)

Observations on the amplifier parameters Overall Gain : v v v Ri A= o = i × o = Av vsig vsig vi Ri + Rsig

vi Ri = vsig Ri + Rsig  Value of Ri is important. o For Ri >> Ri , vi ≈ vsig

o For Ri = Rsig , vi = 0.5 vsig o For Ri RL , Av ≈ 0

 Prefer “small” Ro F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (4/26)

Some observation on single-transistor amplifiers 1. As we will discuss, there are many ways to bias a transistor. Thus,

there are many practical single-transistor amplifier circuits. o Fortunately, signal circuits always reduce to one of four fundamental configuration . 2. We compute the voltage gain and input resistance of these four fundamental configurations in the presence of an arbitrary load RL. Then: Overall Gain : Open - loop Gain : A=

vo v v Ri = i × o= Av vsig vsig vi Ri + Rsig

Avo = Av |RL → ∞

3. Ro is calculated in a real circuit (with Rsig & vsig) once load is clearly identified.

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (5/26)

Fundamental Transistor Amplifier Configurations We are considering only signal circuit here!

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (6/26)

Possible BJT amplifier configurations

Common-Emitter

Common-Emitter with RE

Common-Base

Same as Common Base (vi does not change)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (7/26)

Common-Collector

Not Useful

PNP configurations are the same as those of NPN (because of similar small-signal model)

Common-Emitter

Common-Base

Common-Collector

Common-Emitter

Common-Base

Common-Collector

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (8/26)

MOS fundamental configurations are analogous to BJTs

Common-Emitter

Common-Base

Common-Collector

Common-Source

Common-Gate

Common-Drain

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (9/26)

Common Emitter Configuration Signal Circuit:

Signal Circuit with BJT SSM:

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (10/26)

o o

ro and R’L are in parallel vπ = v i

Common Emitter Configuration (Av & Ri)

By KCL

ii =

vi v ⇒ Ri = i = rπ rπ ii

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (11/26)

vo = − g m vi (ro || RL′ ) Av =

vo = − g m (ro || RL′ ) vi

Common Source Configuration Signal Circuit:

Signal Circuit with MOS SSM:

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (12/26)

o o

ro and R’L are in parallel vgs = vi

Common Source Configuration (Av & Ri)

By KCL

ii = 0 ⇒ Ri =

vi =∞ ii

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (13/26)

vo = − g m vi (ro || RL′ ) Av =

vo = − g m (ro || RL′ ) vi

Common Source & Common Emitter Configurations are “similar” Signal Circuit

Signal Circuit with transistor SSM

Av =

vo = − g m (ro || RL′ ) vi

Ri = rπ

Similar formula if we let rπ → ∞

Av =

vo = − g m (ro || RL′ ) vi

Ri = ∞

Note that Av & Ri are independent of vsig & Rsig F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (14/26)

Common Emitter Configuration with RE Signal Circuit:

Signal Circuit with BJT SSM:

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (15/26)

Common Emitter Configuration with RE (Av & Ri)

Node voltage method: vπ = vi − ve

Node ve

ve ve − vi ve − vo + + − g m (vi − ve ) = 0 RE rπ ro

Node vo

vo vo − ve + + g m (vi − ve ) = 0 RL′ ro

Av =

vo g m RL′ ≈− vi 1 + g m R E +( RL′ / ro )(1 + RE / rπ )

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (16/26)

1. Add the two node equations to get ve in terms of vo and vi 2. Substitute for ve in Node vo equation to find vo and gain 3. Compute ii in terms of node voltages. Then Ri = vi/ii 4. Lengthy calculations (See Notes). Ri ≈ rπ +

g m rπ RE 1 + ( RL′ / ro )(1 + RE / rπ )

Common Source Configuration with RS (Av & Ri) Signal Circuit

Av =

vo g m RL′ ≈− 1 + g m R E +( RL′ / ro )(1 + RE / rπ ) vi

Ri ≈ rπ +

Av =

g m rπ RE 1 + ( RL′ / ro )(1 + RE / rπ )

Ri = ∞

Let

rπ → ∞ RE → RS

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (17/26)

vo g m RL′ ≈− vi 1 + g m R S + ( RL′ / ro )

Common Base Configuration (Gain) Signal Circuit: Node voltage method: vπ = −vi

Node vo

Signal Circuit with BJT SSM:

vo vo − vi + + g m (−vi ) = 0 RL′ ro vo 1 + g m ro vi = ′ ro || RL ro

vo 1 + g m ro = (ro || RL′ ) vi ro Av ≈ g m (ro || RL′ ) Av =

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (18/26)

Common Base Configuration (Ri) Define Rx = KCL:

ii =

vi v v vi + ix = i + i = rπ Rx rπ || Rx rπ

Ri =

By KCL

vi ix

vi = rπ || Rx ii

KVL: vi = (ix +g m vπ )ro + ix RL′ vπ = −vi vi (1 + g m ro ) = ix (ro + RL′ ) Rx =

vi r + R′ = o ix 1 + g m ro

Ri = rπ || Rx = rπ ||

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (19/26)

ro + RL′ 1 + g m ro

Common Gate Configuration (Av & Ri)

Signal Circuit

vo ≈ g m (ro || RL′ ) vi r + RL′ Ri = rπ || o 1 + g m ro

vo ≈ g m (ro || RL′ ) vi r + RL′ Ri = o 1 + g m ro Av =

Av =

Let rπ → ∞

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (20/26)

Common Collector Configuration (Emitter Follower) Signal Circuit:

Node voltage method: vπ = vi − vo

Node vo

vo vo − vi vo + + − g m (vi − vo ) = 0 RL′ rπ ro   vo 1  1  vo = g m 1 + vi ≈ g m vi + 1 + ro || RL′  g m rπ   g m rπ 

g m rπ = β >> 1

Signal Circuit with BJT SSM: Av = ii =

vo g m (ro || RL′ ) = vi 1 + g m (ro || RL′ )

vi − vo vi = × (1 − Av ) rπ rπ

Ri =

vi r = π ii 1 − Av

Ri = rπ + g m rπ (ro || RL′ ) = rπ + β (ro || RL′ ) F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (21/26)

Common Drain Configuration (Source Follower)

Signal Circuit

v g (r || R′ ) Av = o = m o L vi 1 + g m (ro || RL′ ) Ri = g m rπ (ro || RL′ ) = β (ro || RL′ )

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (22/26)

Let rπ → ∞

vo g m (ro || RL′ ) Av = = vi 1 + g m (ro || RL′ ) Ri = ∞

BJT Basic Amplifier Configurations (PNP circuits are identical) Common Emitter

Common Base

Av = − g m (ro || RL′ ), Ri = rπ

ro + RL′ Av = g m (ro || RL′ ), Ri = rπ || 1 + g m ro

Common Emitter with RE

Av ≈ −

g m RL′ 1 + g m R E +( RL′ / ro )(1 + RE / rπ )

Ri ≈ rπ +

g m rπ RE 1 + ( RL′ / ro )(1 + RE / rπ )

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (23/26)

Common Collector/ Emitter Follower

g m (ro || RL′ ) Av = 1 + g m (ro || RL′ ) Ri = rπ + β (ro || RL′ )

MOS Basic Amplifier Configurations (PMOS circuits are identical) Common Source

Av = − g m (ro || RL′ ), Ri = ∞

Common Source with RS

g m RL′ Av = − , Ri = ∞ 1 + g m R S + RL′ / ro F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (24/26)

Common Gate

ro + RL′ Av = g m (ro || RL′ ), Ri = 1 + g m ro

Common Drain/Source Follower

g m (ro || RL′ ) Av = , Ri = ∞ 1 + g m (ro || RL′ )

Observations of Transistor Amplifiers (1)  Common-Emitter has a high gain of Av = − g m (ro || RL′ ) and a “medium” Ri = rπ (several k). o Minus sign in the gain reflects a 180o phase shift in the output.  Common-Base also has a high gain of Av ≈ g m (ro || RL′ ) but a “low” Ri (several hundred Ω) which significantly affects the overall circuit gain.  Common-Source has a high gain of Av = − g m (ro || RL′ ) (but lower than the BJT analog, CE amplifier). It has an infinite Ri.  Common-Gate also has a high gain of Av ≈ g m (ro || RL′ ) but a “low” Ri (several hundred Ω). CE and CS configurations are the main gain cells in ICs. CB and CG configurations have superior high-frequency response (discussed in ECE102). F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (25/26)

Observations of Transistor Amplifiers (2)  Common-Emitter with RE has a much lower gain compared to a CE amplifier (i.e., no RE ) but has a much larger Ri . o Amplifier gain is also much less sensitive to BJT parameters (i.e., β). o It is used primarily in discrete circuits because it does not need a by-pass capacitor (will be discussed later).  Common-Source with RS has a much lower gain compared to a CS amplifier (i.e., no RS ). It has an infinite Ri .  Common-Collector (emitter follower) and Common-Drain (source follower) configurations have a gain ≤ 1 . They have a large Ri (infinite for CD) and a low Ro (as we will see later). They are usually configured to get a gain close to 1 and used either as a “buffer” or as a “current amplifier” to drive a load. F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (26/26)

*Buffers are discussed later in the context of multi-stage amplifiers