ECEN 665 (ESS)

Radio Frequency Filters Material courtesy of Fikret Dülger,

Texas A&M University Electrical and Computer Engineering Department Analog & Mixed-Signal Design Center

Outline ] Problem Definition, Motivations and Research Goal ] A Fully-Integrated Q-Enhancement LC Bandpass Filter \ Noise Analysis \ Nonlinearity Analysis \ IC Measurements of the Filter in 0.35μm CMOS

] Comparison with previous reported filters and Conclusions

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Problem Definition and Motivations ] Wireless Communication systems have become an important part of our daily lives. ] The demand towards lower cost makes the task of circuit designers more and more challenging. ] This translates into the circuit specifications with lower power consumption, smaller die area but without any compromise from higher performance .

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Problem Definition and Motivations

LNA

Image Reject Filter

to the IF Strip

]

Transceiver front-ends are the sections next to the antenna.

]

Frequency range of interest is from 900 MHz to 2.4 GHz.

]

In state-of-the-art solutions, the bandpass filters are offchip.

LO2 Duplexer

PA

BPF

90o

Baseband

I

Baseband

Q

LO1

] MOTIVATION FOR INTEGRATION!

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Research Goal ] The feasibility of a Q-enhanced bandpass filter designed with a standard (low cost) CMOS technology at 2 GHz is investigated. \ The issue is addressed through the simulations, analyses, and the experimental verification of a prototype designed and fabricated in a 0.35μm CMOS technology.

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Q-Enhancement Bandpass Filters Vdd

L

L Frequency Control

Vout-

+ Vin

+

Gm

Vout

C 2

2L

Gloss 2

-G 2

Vin

+

C

C

Gm

M1

(a)

Vout+

1 Qo Qo ≡ ⇒Q= G ω o LGloss 1− Gloss (Gloss > G for stability )

M2

-G 2

Q - Enhancement Control

(b)

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A CMOS Programmable RF Bandpass Filter Vdd

Programmable in: •Peak Gain (not exploited previously) •Filter Q •Center Frequency

L

L

Vcontrol ( Frequency Tuning )

Vout-

C

C

Vout+

H ( jω o ) ≅ Gm ( jω o ) Q ω o L M1

+

M2

M5

M6

Vin

ω

o

≅

1 LC

Rdeg1

-

Rdeg2

IQboost

IBias

( Q Tuning )

( Gain Tuning )

M4

M3

M7

M8

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A CMOS Programmable Bandpass Filter ] The peak gain programmability through the input Gm stage.

Gm ( jω o ) = Gm ( jω o ) Q ω o L H ( jω o ) ≅ Gloss − G ] Increasing Q also increases the peak gain. ] If ωοand Q are fixed, the peak gain can be modified through Gm. 8

Noise Analysis RS

Cin

Vin

2

GmVin

Id

1

1

Vout

L

Gloss

C

2

Itank

-G

2

IG

2

VR

S

Csb

Mean square noise voltage of the source resistance

Rdeg

2

IR

deg

Mean square noise current of the input Gm stage

Mean square noise current of the source degeneration resistor

Mean square noise current of the LC tank

Mean square noise current of the negative conductance generator 9

Noise Analysis (contd.) ] The noise factor at ωo is obtained as

F = 1+

8kTGloss + 2 I

2 −G

+ 2I

G Z Sin ( jω o )

2 Rdeg

2 m1

2 m

4kTRS G

2

+

2 I d2in 4kTRS Gm21

] The calculations yield the following percentage contributions from the components: LC Tank: 44.5%, -G: 38%, Input Gm: 13.5%, Rdeg: 2.7%

] Increasing Gm reduces the contribution of -G and the LC tank 10

Nonlinearity Analysis ] There are three main nonlinearity contributors: \ the negative conductance generator \ the varactor \ the input Gm stage

] The analyses consider each contributor separately! ] Isolating each contributor allows us to identify the design trade-offs involved. 11

Nonlinearity Analysis (contd.) Contribution of the Negative Conductance Generator

Vin

GmVin

Vout

L

Gloss

C

G=f( Vout )

•The nonlinear behavior of the Negative Conductance is isolated first. •We use the method proposed by Wambacq/Sansen in “Distortion Analysis of Analog Integrated Circuits”. 12

Noise-linearity, Q-selectivitylinearity trade-offs ! ]

The 1dB compression point is approximated as:

V1dB

K2 ≅ ] ] ]

2.32 × g m5

⎛ ⎞ 1 ⎜⎜ 2 3 3 3 ⎟⎟ ≅ K 2θ 5 g m5 ⎛ 2 ⎞ ⎝ GmQ ω o L ⎠ ⎜⎜ 2 K 2 + ⎟⎟ 1 + θ 5 (VGS 5 − VT 5 ) ⎠ ⎝ μ oCOX ⎛ W5 ⎞⎛⎜ 2

⎞ ⎟ ⎜⎜ ⎟⎟ 3 ⎜ ⎟ ⎝ L5 ⎠⎝ (1 + θ (VGS 5 − VT 5 )) ⎠ 1

The effective bias of the negative conductance should be maximized With a higher Qo, a lower gm5 is required: higher eff. bias with given Iss. The higher the peak gain, GmQωoL, the worse the linearity. 13

Nonlinearity Contribution of the Varactor

1 V1dB

1.55 ≅ × 2 3 3 3 GmQ ω o L

j 2ω o L −

K 3C

V

L

+ Gloss + j 2ω o (C + CVo )

(

− jω o 2 K 3C Gloss + 4ω o2 (C + CVo ) K 3C − 2 K 22C V

V

V

] Higher peak voltage gain, GmQωoL, degrades linearity ] Trade-offs between noise-linearity and selectivitylinearity! 14

)

Nonlinearity Contribution of the Input Gm stage

V1dB

Gm2 1 (1 + Gm1 Rdeg ) 3 ≅ 2.32 × K 2Gm1θ1Gm1 ⎞ ⎛ 2 ⎜ 2 K 2G + ⎟ m1 ⎜ ⎟ + − θ V V 1 ( ) 1 GS 1 T 1 ⎝ ⎠

] The effective bias of the transistors should be maximized! ] Increasing Rdeg improves the linearity with a penalty in power consumption for the same input Gm. ] The same applies to adding Rdeg to the cross-coupled pair

linearity-power trade-off 15

Simulated DR vs. Q of the Resonator Inductor

(Vdd=1.3V, Qfilter=40, fo=2.29GHz)

DR =

P1dB 2 ⋅ Q o 4kT ( F + 1) BQ 2

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Dynamic Range Simulations

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Integrated Circuit Measurements ] TSMC 0.35μm CMOS technology ] The second poly was not used. Compatibility with a standard Digital CMOS ] The filter operates with a supply voltage of 1.3V, and 4mA for a Q= 40 at 2.19GHz ] Chip area+buffers~ 0.1mm2.

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30MHz

Measured Q-Tuning

More than 3 octaves at fo=2.16GHz

5dB/div

Q~170

Q~20 19

Measured Frequency Tuning

13% around 2.1GHz with Q~100 1.93GHz

2.19GHz

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Measured Peak Gain Tuning

Around 2 octaves with fo=2.12GHz and Q=40

Providing gain at the ωο of an image-reject filter is useful in a receiver front-end after the LNA, to relax the NF spec of the mixer.

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Overlaid Measurements of 10 different ICs (a) with the same bias settings

(b) programmed for the same fo, gain and Q=40

Q : 20-80 fo : 2.14-2.18GHz

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Two-tone IM3 Measurement *Vdd=1.3V, fo=2.19GHz, Q=40

Pin= -38dBm fin1=2.185GHz fin2=2.195GHz

Pin,1dB= -30dBm IIP3=-17.5dBm

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1 dB Compression Comparison *Vdd=1.5V, fo=2.17GHz

simulation

measurement

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A Comparison with State-of-theart Reference

Tech.

fo

Bandwidth

Vdd

PD/Pole

Area/Pole

SFDR

[1]

Bipolar

1.8GHz

51.4MHz

2.8V

12.2mW

0.2mm2

30dB

[3]

Bipolar

1GHz

25MHz

5V

34mW

0.3 mm2

36dB

[4]

BiCMOS

750MHz

37.5MHz

5V

40mW

0.3 mm2

25dB

[5]

BiCMOS

1.9GHz

150MHz

2.7V

12.15mW

1.79 mm2

49dB

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A Comparison with State-of-theart (contd.) Reference

Tech.

fo

Bandwidth

Vdd

PD/Pole

Area/Pole

SFDR

[2]

CMOS

850MHz

18MHz

2.7V

52mW

0.5mm2

55dB

[6]

CMOS

850MHz

28.3MHz

2V

22.9mW

0.32mm2

28dB

[7]

CMOS

2.14GHz

60MHz

2.5V

2.9mW

0.59mm2

55dB

This work

CMOS

2.19GHz

53.8MHz

1.3V

2.6mW

0.05mm2

31dB

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Remarks • Low voltage, low power, compact fully-integrated programmable bandpass filter in mainstream CMOS at frequencies higher than 2GHz. ¾ Comparison shows that the proposed RF filter uses the lowest power supply voltage, lowest power consumption per pole and occupies at least four times less silicon area per pole ¾ Programmability in the peak gain ¾ Noise and Nonlinearity analyses of the structure provide simplified approximate expressions to clarify design trade-offs

Reference: • Fikret Dulger, E. Sanchez-Sinencio, J. Silva-Martinez, "A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35 um CMOS,"

IEEE Journal of Solid-State Circuits, Volume :38 Issue:6, June 2003, Page(s): 918- 928

• F. Dulger and E. Sanchez-Sinencio, "Integrated RF Building Blocks for Wireless Communication" book, details will follow later.

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