Physical Layer Prototyping using WARPLab Patrick Murphy & Melissa Duarte Rice University WARP Workshop March 29, 2010

warp.rice.edu

WARPLab Overview • MATLAB WARP Link • Interact with WARP nodes directly from the MATLAB workspace

• Very rapid prototyping of PHY algorithms • Real-time Tx-Rx and offline processing

WARPLab Overview

Ethernet links

WARPLab Overview

…

Up to 16 WARP Nodes

WARPLab Overview • One PC controls many WARP nodes

• MATLAB for signal processing

• Non-real-time processing

• WARP for wireless interfaces • Real-time channel use

RADIO 1

RADIO 2

FPGA

RADIO 4

RADIO 3

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

TX

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

TX Path

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

RX

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

RX Path

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

TX

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

TX I/Q buffers 16384 (214) samples each

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

RX

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

RX I/Q buffers 16384 (214) samples each

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

RX

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

RSSI buffer 12 4096 (2 ) samples

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

Variable upconversion/downconversion carrier frequency Value input from MATLAB

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

Variable gain Tx BB and RF amplifiers Gain value input from MATLAB

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

Variable gain Rx BB and RF amplifiers Gain value input from MATLAB

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

Fixed Point 16_15 I/Q DACs Always clocked at 40 MHz

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

Fixed Point 14_13 I/Q ADCs Always clocked at 40 MHz

WARPLab Architecture FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

RSSI ADC always clocked at 10 MHz 10 bit number

RADIO 1

RADIO 2

FPGA

RADIO 4

RADIO 3

WARPLab Architecture Radio 1 Receiver RF Amplifier

Downconversion

FPGA WARPLab Sysgen Core Receiver Base-Band Amplifiers

Radio 4

Rx I Buffer ADC I To Ethernet

Rx Q Buffer

Rx Q Buffer ADC Q

PLL

RSSI

ADC Q RSSI Buffer To Ethernet

ADC RSSI

RSSI Buffer To Ethernet

TxI Buffer

ADC RSSI

From Ethernet

TxQ Buffer

TxQ Buffer

DAC Q

Receiver RF Amplifier

Downconversion

DAC Q

Rx I Buffer To Ethernet

Rx Q Buffer

Rx Q Buffer ADC Q

RSSI

ADC Q RSSI Buffer To Ethernet

ADC RSSI

RSSI Buffer To Ethernet

TxI Buffer

ADC RSSI

TxQ Buffer

Upconversion

Radio 2

Transmitter Base-Band Amplifiers

Antenna Switch

PLL

DAC I From Ethernet

DAC Q

RSSI

TxI Buffer

DAC I

Transmitter RF Amplifier

Receiver RF Amplifier

ADC I To Ethernet

PLL

Receiver Base-Band Amplifiers Downconversion

Rx I Buffer

ADC I

Antenna Switch

Transmitter RF Amplifier

Upconversion Transmitter Base-Band Amplifiers

Transmitter Base-Band Amplifiers Receiver Base-Band Amplifiers

Antenna Switch

PLL

DAC I From Ethernet

Upconversion

RSSI

TxI Buffer

DAC I

Transmitter RF Amplifier

Receiver RF Amplifier

ADC I To Ethernet

Antenna Switch

Receiver Base-Band Amplifiers Downconversion

Rx I Buffer

From Ethernet TxQ Buffer DAC Q Upconversion Transmitter Base-Band Amplifiers

Radio 3

Transmitter RF Amplifier

WARPLab Architecture

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 Radio 2

FPGA I/O

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Radio 3 Radio 4

FPGA

Radio Bridges

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

WARPLab M-Code Examples

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 Radio 2

FPGA

FPGA I/O

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

Radio 3 Radio Bridges

Radio 4

•

The WARPLab framework provides the following

• • •

Reference design Reference M-Code M-Code Examples

WARPLab M-Code Examples

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 Radio 2

FPGA

FPGA I/O

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

Radio 3 Radio Bridges

Radio 4

•

The WARPLab framework provides the following

• • •

Reference design Reference M-Code M-Code Examples

WARPLab M-Code Examples

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 FPGA I/O

Radio 2

FPGA

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

WARPLab M-Code Examples

Radio 3 Radio Bridges

Radio 4

•

Reference design

•

XPS project that contains all the FPGA code required to program the WARP nodes

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 FPGA I/O

Radio 2

FPGA

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver

WARPLab User M-Code Ethernet

Misc. Drivers

WARPLab Reference M-Code

WARPLab M-Code Examples

Radio 3 Radio Bridges

Radio 4

•

Reference design

•

XPS project that contains all the FPGA code required to program the WARP nodes

•

WARPLab Reference Sysgen - Ex: Buffers

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 FPGA I/O

Radio 2

FPGA

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver

WARPLab User M-Code Ethernet

Misc. Drivers

WARPLab Reference M-Code

WARPLab M-Code Examples

Radio 3 Radio Bridges

Radio 4

•

Reference design

•

XPS project that contains all the FPGA code required to program the WARP nodes

• •

WARPLab Reference Sysgen - Ex: Buffers WARPLab Reference C Code - Ex: Ethernet

WARPLab Architecture •

Reference design

•

Bitsream (.bit) file to program the WARP nodes is provided

•

Same bitstream for all nodes.

• •

Any node can be Tx or Rx

All open source

•

All code required to generate bitstream is available online

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 Radio 2

FPGA

FPGA I/O

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

Radio 3 Radio Bridges

Radio 4

•

The WARPLab framework provides the following

• • •

Reference design Reference M-Code M-Code Examples

WARPLab M-Code Examples

WARPLab Architecture WARP node Daughter Cards

Logic WARPLab Reference Sysgen

Radio 1 FPGA I/O

Radio 2

FPGA

Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

WARPLab M-Code Examples

Radio 3 Radio Bridges

Radio 4

•

Reference M-Code

•

MATLAB Code (M-Code) functions that allow interaction with WARP nodes

•

Ex:

•

warplab_writeSMWO(Node_ID,Buffer_ID,M_Vector)

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 Radio 2

FPGA

FPGA I/O

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

Radio 3 Radio Bridges

Radio 4

•

The WARPLab framework provides the following

• • •

Reference design Reference M-Code M-Code Examples

WARPLab M-Code Examples

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 FPGA I/O

Radio 2

FPGA

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

WARPLab M-Code Examples

Radio 3 Radio Bridges

Radio 4

•

M-Code Examples

•

Illustrate how to use the functions in the WARPLab Reference M-Code

•

Today’s Lab 1

WARPLab Architecture WARP node Daughter Cards

Logic

Radio 1 Radio 2

FPGA

FPGA I/O

WARPLab Reference Sysgen Radio Controller

AGC PLB Ethernet MAC

Host PC

PowerPC WARPLab Reference C Code Radio Driver

Ethernet MAC Driver Misc. Drivers

WARPLab User M-Code Ethernet

WARPLab Reference M-Code

Radio 3 Radio Bridges

Radio 4

•

The WARPLab framework provides the following

• • •

Reference design Reference M-Code M-Code Examples

All open source

WARPLab M-Code Examples

WARPLab Flow I Buffer

To DAC

From Ethernet

To DAC

Tx Q Buffer

I Buffer

Rx

From ADC

To Ethernet

From ADC

Q Buffer

WARPLab Flow I Buffer

To DAC

From Ethernet

To DAC

Tx Q Buffer

I Buffer

Rx

From ADC

To Ethernet

From ADC

Q Buffer

1. Initialize nodes & radio settings 2. Download Tx vectors

WARPLab Flow I Buffer

To DAC

From Ethernet

To DAC

Tx Q Buffer

I Buffer

Rx

From ADC

To Ethernet

From ADC

Q Buffer

3. Enable Tx/Rx paths 4. Prime Tx/Rx state machines

WARPLab Flow I Buffer

SYNC

To DAC

From Ethernet

To DAC

Tx Q Buffer

I Buffer

Rx

From ADC

To Ethernet

From ADC

Q Buffer

5. Trigger the transmission and capture 6. Retrieve Rx vectors

Tx BB Signal Requirements • Amplitude of real part in [-1,1] • Amplitude of imaginary part in [-1,1] • Highest frequency 9.5 MHz (19 MHz BW) • Lowest frequency 30 KHz • 40 MHz sampling • Note: Buffers persist between triggers

Tx to Rx path FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Tx

Rx I Buffer ADC I To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

X

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

|Y| = |H| GRXBB GRXRF GTXPA GTXRF GTXBB |X| |H| : Wireless channel magnitude FPGA WARPLab Sysgen Core

Radio Board Receiver RF Amplifier

Downconversion

Receiver Base-Band Amplifiers

Rx I Buffer ADC I

Y

To Ethernet Rx Q Buffer ADC Q

Antenna Switch

PLL

RSSI

RSSI Buffer To Ethernet

ADC RSSI TxI Buffer DAC I

From Ethernet TxQ Buffer DAC Q Transmitter RF Amplifier

Upconversion

Transmitter Base-Band Amplifiers

Rx

WARPLab Examples

• Hardware characterization • Channel measurement • Sphere detection • Cooperative communications • Beamforming

Lab 1: WARPLab

• WARPLab graphical interface • SISO communication • Measuring the wireless channel • Building a real bits-to-RF transmitter • Continuous transmitter mode • Two-way communication • 2x2 MIMO communication

WARPLab Overview

WARPLab Overview

WARPLab Overview

(2,3) (4,5) (7,8) (9,10)

WARPLab Overview No Ack !

No Ack ! (2,3) (4,5) (7,8) (9,10)

WARPLab Overview

(2,3) (4,5) (7,8) (9,10)