Display Port Physical Layer Testing Challenges)

Display Port Physical Layer Testing Challenges) Agilent Technologies Testing Overview Jim Choate Presentation Topics Display Technologies Overview ...
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Display Port Physical Layer Testing Challenges)

Agilent Technologies Testing Overview Jim Choate

Presentation Topics Display Technologies Overview Testing DisplayPort (TX focus) DisplayPort Compliance Testing and Program Agilent DisplayPort solutions

Overview: DisplayPort Technology Consumer Electronics

Computing

Portables

iDP GPU

Standard DisplayPort Type Lanes Bit Rate Version Status

Box-to-Box 1, 2, or 4 1.62, 2.7, 5.4 V1.2 Early Silicon

TCon

MYDP

eDP One Unit (laptops, games) 1, 2, or 4 1.62, 2.7,5.4 V1.3 Newly Proposed CTS

iDP LVDS replacement internal 4 or 8 3.24 or 3.78 V1.1 Test Guideline

MYDP Portable-to-TV 1 1.62, 2.7,5.4 V1.0 d2 Silicon November

DP Technology: Main Link Lanes Silicon structures: •  Structure leveraged from PCI Express •  Implementable on sub 65nm process •  Termination Voltage must be

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