I/O: Connecting to Outside World • So far, we’ve learned how to: – compute with values in registers – load data from memory to registers – store data from registers to memory – use the TRAP calls to deal with I/O • This lecture details – how I/O is read and written to – interrupts
– data rate: how fast can data be transferred? • keyboard: 100 bytes/sec • disk: 30 MB/s • network: 1 Mb/s - 1 Gb/s
CMPE12 – Winter 2011 – Joel Ferguson
9-3
Programming Interface • How are device registers identified? – Memory-mapped vs. I/O-mapped (special instructions) • How is timing of transfer managed? – Asynchronous (not do) vs. synchronous • Who controls transfer? – CPU (polling) vs. device (interrupts)
CMPE12 – Winter 2011 – Joel Ferguson
9-4
Memory-Mapped I/O • assign a memory address to each device register • use same memory data movement instructions (load/store) for control and data transfer • the hardware will figure out that the instruction refers to a device and not to the memory
CMPE12 – Winter 2011 – Joel Ferguson
CPU
00000000 00000001
FFFFFFFE FFFFFFFF
I/O Address Space FFFFFFFE FFFFFFFF
These addresses have no memory in them 9-5
I/O-mapped I/O • specific opcode(s) for I/O (e.g. IN and OUT in x86 and DOS) • two separate addressing spaces
CMPE12 – Winter 2011 – Joel Ferguson
9-6
But I/O isn’t Memory! I/O Controller
• Control/Status Registers – CPU tells device what to do -- write to control register – CPU checks whether task is done -- read status register Control/Status
CPU
Output Data
Graphics Controller
Electronics
display
• Data Registers – CPU transfers data to/from device • Device electronics – performs actual operation
• pixels to screen, bits to/from disk, characters from keyboard
CMPE12 – Winter 2011 – Joel Ferguson
9-7
Example from LC-3 ;page 226 in text checks status register ;when MSB=1 reads Keyboard Input LDI BRzp LDI L3 LDI BRzp STI . . DSR .FILL DDR .FILL KBSR .FILL KBSR .FILL
