Impact of multilevel inverters in grid connection PV generation systems Kamal Himour *, Kaci Ghedamsi*, and ElMadjid Berkouk† *Laboratory of Renewable Energy Mastery, University of Bejaia.
[email protected],
[email protected] †Control Process Laboratory, ENP of Algiers,
[email protected] Abstract In this paper, we present a comparative study between a three phase three level DCI and a three phase five level DCI for grid connection PV generation systems. It is well known that the power quality of multilevel inverter signals depends on their number of levels and on the control strategy. In this work, a fast and simplified space vector modulation for a three and for a five level diode clamped inverter is presented, the use of the five level diode clamped inverter can generate more voltage sinusoidal possible and improve the total harmonic distortion compared with the three level. The validation of the proposed system is proved by the simulation of the system using Matlab-Simulink software. Keywords : Photovoltaic generator, MPPT, three level diode clamped inverter, five level diode clamped inverter, space vector modulation, and grid utility.
1. INTRODUCTION In recent years, there has been an increasing interest in the integration of Distributed Generation (DG) systems based on solar energy to the distribution grid, which consider different objectives, such as technical, economic and environmental aspects. In parallel, the progress in technology has led to more powerful systems. Application of solar energy resource in a power system may cause major changes in the design and operation of distribution grids [1-3].
Moreover, the environmental advantages, the shorter construction period can also be considered as a key driving element accelerating th e development of DG technology. Multilevel converters, are a good tradeoff solution between performance and cost in high-voltage and high-power systems. The main advantages of multilevel converters are reduced voltage ratings for the switches, good harmonic spectrum (making possible the use of smaller and less expensive filters), and good dynamic response [4, 5]. However, the control complexity increases compared to conventional voltage source inverters (VSI). So, practical, cost effective, and flexible control strategies are vital to grid connection of Photovoltaic energy to the distribution grid [4]. In this paper, we present a comparative study between two multilevel inverters: 3 levels and 5 levels .These inverters have the same topology (Diodes Clamped Inverter) and are controlled by the same law: simplified Space Vector Modulation (SVM). Our interest concerns the magnitude and the quality of generated voltage.
2. SYSTEM MODELING The propose system consists of a photovoltaic generator connected to the three phase three level DCI or to a five level DCI through a DC bus, the multilevel inverter is connected to the grid by a filter as shown in Fig. 1.
DC/DC Converter MPPT
DC Bus 3/5
Rt, Lt
level
Udc
DCI Is1,2,3
dq
Isd, Isq
ABC Q ref
P ref
Vtd ref
Power Control
Vsd, Vsq
dq
DC Controler
Udc ref
Itd ref
ABC
Inverter control SVM
DC/DC Converter MPPT
Vs1,2,3
Vtq ref
Itq ref Curent Control
Lt.w
PI
Lt.w
PI
FIG. 1 – Global PV water pumping system.
2.1. Modeling of PV generator The equivalent circuit of a photovoltaic cell shown in Fig.2. It’s widely used in literature [1]. Iph
Rs
I V
Id Rsh
FIG. 2 – Photovoltaic cell equivalent circuit.
Charge
G R I D
T h current-voltage characteristic for a PV cell is :
Where: : the photo-current,
: the saturation current of diode, m : ideality factor,
and : series and parallel resistance, constant, q : electron charge.
T : junction temperature, K : Boltzmann
For a PV module with series connected cells and connected cells, the current-
parallel
voltage characteristic is given by:
2.2. Maximum power point tracking
The PV array must operate electrically at a certain voltage which corresponds to the maximum power point under the given operating conditions. To do this, a maximum power point tracking (MPPT) technique should be applied. Various MPPT techniques like look-up table methods, perturbation and observation (P & O) methods and computational methods have been proposed in the literature. The perturb and observe(P&O), as the name itself states that the algorithm is based o n the observation of the array output power and on the perturbation (increment or decrement) of the power based on increments of the array voltage or current. The algorithm continuously increments or decrements the reference current or voltage based on the value of the previous power sample. The P&O is the simplest method which senses the PV array voltage and the cost of implementation is less and hence easy to implement [7].
Start P&O algorithm
Mesure of V( k ) et I( k )
P ( k )=I( k )*V( k ) Δ P=P( k )-p( k-1 ) ΔV=V( k )-V( k-1 )
Yes
No ΔP>0
Yes Yes
No
No ΔV>0
ΔV> 0
V (k+1)= V(k) +ΔV
V (k+1)= V(k)- ΔV
V (k+1)= V(k)- ΔV
V (k+1)= V(k) +ΔV
FIG. 3 – Flowchart of P&O algorithm.
2.3. Model and control of the 3 level DCI A three-phase three-level diode-clamped inverter is shown in Fig.4 [8].Each leg is composed of two upper and lower switches with antiparallel diodes. Two series dc link capacitors split the dc bus voltage in half and six clamping diodes confine the voltages across the switch within the voltages of the capacitors. The necessary conditions for the switching states are that the dc link capacitors should not be shorted and the output current should be continuous.
u c1
T11
T21
T31
T12
T22
T32
T13
T23
T33
T14
T24
T34
C1
O
UC
u c2
C2
VA
VC
VB
N FIG. 4 – T hree level diode clamped inverter (DCI). -
Connexion fonctions
For each leg of the inverter, we define three connection functions, each one is associated to one of the three states of the leg:
TABLE 1-States of one leg of the 3 level DCI
0 0 1 1
0 1 1 0
1 1 0 0
1 0 0 1
-Uc/2 0 Uc/2 unknown
Etat N O P -
As indicated in table II, each leg of the inverter can have three possible switching states ,O N.
-
Output voltages
The output voltages of a three level diode clamped inverter are expressed as follows:
From the output voltages vector given by:
O PN
NPN
OPO NON
NPO
NPP
OPP NOO
NNO
NNP
and
PPO OON
PO N
PPP V sVs POO OOO ONN NNN
O NP
, we define the output voltage
PPN
OOP
NO P
,
POP ONO
PNN
PNO
PNP
FIG. 5 – T hree level diode clamped inverter space vector diagram . Fig. 5 shows the space vector diagram of the three level inverter. The output voltage space vector is identified by combination of switching states of the three legs. Since three kinds of switching states exist in each leg, three level inverter has switching states. In SVPWM method the output voltage is approximated by using the nearest three output vectors that the nodes of the triangle containing the
reference vector changes from one region to another, it may induce an output vector abrupt change. In addition we need to calculate the switching sequences and switching time of the states at every change of the reference voltage location. In this paper, a new method is proposed in which the three level inverter is decomposed into six space vector diagrams of two level inverters. This modification can reduce considerably the computational time and reduce the algorithm complexity [8]. 2.3.1. Correction of reference voltage vector Having the location of a given reference voltage vector, one hexagon is selected among the six small hexagons that contain the three level space vector diagram. Each hexagon is identified by a number s defined as given by:
After selection of one hexagon, we make a translation of the reference vector towards the center of this hexagon. TABLE 2- Correction of reference voltage vector. Hexagone
’
1 2 3 4 5 6
2.3.2. Determination of dwelling times
’
Ones the corrected reference voltage and the corresponding hexagon are determined, we can apply the conventional two level space vector PWM method to calculate the dwelling times, the only difference between the two level SVPWM and the three level SVPWM is the factor 2 appearing at the first two equations as shown in this equation:
2.3.3.Conversion and sequence of the switching states The reference voltage vector is approximated using the nearest three states which are nodes of the triangle containing the vector identified as X, Y and Z. the optimum sequence of these states is selected so as to minimize the total number of switching transitions. It’s well known that these sequences should be reversed in the next switching interval for minimum harmonic impact as given in [8 ].
2.4. Model and control of the five level DCI Fig.6 shows diagram of a five-level diode clamping inverter. Each leg is composed of four upper and lower switches with anti-parallel diodes. Four series dc-link capacitors split the dc-bus voltage in half, and eighteen clamping diodes confine the voltages across the switches within the voltages of the capacitors. The necessary conditions for the switching states for the five-level inverter are that the dc-link capacitors should not be shorted, and the output current should be continuous. As indicated in Table 1, each leg of the inverter can have five possible switching states, P1, P2, O, N1 or N2. When the top four witches Sx1, Sx2, Sx3and Sx4(x = a, b, c) are turned on, switching state is P2. When the switches Sx2, Sx3, Sx4and Sx5are turned on switching state is P1. When the switches Sx3, Sx4, Sx5and Sx6are turned on, the switching state is O. when the switches S x4, Sx5,
Sx6and Sx7are turned on, the switching state is N1. When the switches Sx5, Sx6, Sx7and Sx8are turned on, the switching state is N2 [9]. TABLE 3- States of one leg of the five level DCI Eta t P2 P1 O N1 N2
Sx1
Sx2
Sx3
Sx4
Sx5
Sx6
Sx7
Sx8
Vxo
1 0 0 0 0
1 1 0 0 0
1 1 1 0 0
1 1 1 1 0
0 1 1 1 1
0 0 1 1 1
0 0 0 1 1
0 0 0 0 1
Uc/2 Uc/4 0 -Uc/4 -Uc/2
i d2 T14
D14
T13
D13
T12
D12
T11
D11
T24
D24
T34
D34
T33
D33
T32
D32
T31
D31
UC1 D’11
D’21
D’31 T23
D23
i d1 D’12
D’22
D’32 T22
D22
UC2 D’13
D’23
Udc
D’33 T21
D21
M i d0 ia
D’14
ib
T15
D15
T16
D16
T17
D17
T18
D18
T25
D’24
ic
D25
D’34
T35
D35
T36
D36
T37
D37
T38
D38
UC3
D’15
D’25
T26
D26
D’35
i d3 D’16
D’26
T27
D’36
D27
UC4
T28
D28
i d4
VA
VB
VC
N
FIG. 6 – Five-level diode clamped inverter. According to the states of the inverter, the output voltage vector can take several positions in the d-q frame. These positions are indicated on the space vector diagram Fig. 7.Like as the three levels, the space vector diagram of five-
level inverter is decomposed into six space vector diagrams of three level
inverters. In turn, each of these space vector diagrams of three level inverters is decomposed into six space vectors diagrams of two level inverters like showed in Fig. 8. This modification can reduce considerably the computational time and reduce the algorithm complexity [9].
FIG. 7 – Space vector diagram of five-level inverter.
FIG. 8 – Decomposition of five level space vector diagram. 2.4.1.First correction of reference voltage vector Having the location of a given reference voltage vector, one hexagon is selected among the six small hexagons that contain the five levels space
vector diagram.Each hexagon is identified by a number s defined as given by:
After selection of one hexagon, we make a translation of the reference vector towards the center of this hexagon. TABLE 4- First correction of reference voltage vector Hexagon
’
’
1 2 3 4 5 6
2.4.2. Second correction of reference voltage vector Having the selected three level inverter and the location of the translated vector, one hexagon is selected among the six small hexagons that contain this three level diagram. We make a translation of the reference . Table gives the components d and q of the reference voltage
.
TABLE 5- Second correction of reference voltage vector
Hexagon 1 2
’
’
3 4 5 6
2.4.3. Determination of dwelling times Ones the corrected reference voltage and the corresponding hexagon are determined; we can apply the conventional two level space vector Modulation method to calculate the dwelling times,
2.4.5.Conversion and sequence of the switching states The reference voltage vector is approximated using the nearest three states which are nodes of the triangle containing the vector identified as X, Y and Z. the optimum sequence of these states is selected so as to minimize the total number of switching transitions [9].
2.5. Control of the global system The objective of the controller of global system is to regulate the DC-link voltage and to set a unit power factor. Fig 9 illustrates the whole bloc diagram of the control structure [10] [11].
DC Bus
Power
Current
Controll
Controll
Controll
FIG. 9 – Bloc diagram of the control structure.
2.5.1. DC bus control The DC voltage corrector regulates the DC bus and sets the active power . Fig 10 shows the bloc diagram of DC voltage control.
FIG. 10 – Bloc diagram of the DC bus control. 2.5.2.Power control The active and reactive power ( ) can be both expressed by using Park components of supply voltage ( ) and line current ( ) as follows:
Reference currents ( ) which allows setting the desired reference active and reactive powers ( ), as follows:
The unity power factor is obtained simply by setting the reactive power reference null. We can also generate or absorb ( ). 2.5.3. Current control The vector current control in Park reference frame is carried out by using the synchronized reference with the grid voltage [5]. The electric equations of the filter ( ) connected to the grid are given bellow:
Vsd Vt d_ref +
+
+
-
vbd_ref
Cid -
+
ωs.Lt
Isd Isq
ωs.Lt Vt q_ref
-+
It d_ref
+
-
vbq_ref
Ci q
-+
It q_ref Vsq
Decoupling
Compensation
Correcteur
FIG. 11 – Bloc diagram of the current control.
3. RESULTS SIMULATION In this section, the photovoltaic grid connexion system is simulated using SIMULINK-MATLAB for two cases:
Irradiace (KWm-2)
DC bus is connected to the grid by the three levels DCI, DC bus is connected to the grid by the five levels DCI. 1.5 1 0.5
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
1.6
1.8
1.6
1.8
Temperature (0 C)
FIG. 12 – Irradiace profile (KW.m -2 ). 35 30 25 20
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
FIG. 13– T emperature profile ( 0 C). PV power (W)
-
3000 2000 1000 0
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
FIG. 14 – PV generator power (W).
1.6
1.8
DC link voltage (V)
432.2
432
431.8
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
1.6
1.8
1.4
1.6
1.8
FIG. 15 – DC bus voltage (V).
PV current (A)
6 4 2 0
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
FIG. 16 – PV generator current (A).
5 Level DCI Active power (W)
3000 Pg Pg ref
2000 1000 0
3000 Pg
1000 0
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
1.6
1.8
0
0.2
Reactive power (VAR)
5
Qg ref
0 -5 -10
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
0.4
0.6
0.8 1 Time (s)
1.2
1.4
1.6
1.8
FIG. 21 – Grid active power (W).
10 Qg
Pg ref
2000
FIG. 17 – Grid active power (W). Reactive power (VAR)
Active power (W)
3 Level DCI
1.6
FIG. 18 – Grid raactive power (VAR).
1.8
5 Qg
Qg ref
0
-5
0
0.2
0.4
0.6
0.8 1 Time (s)
1.2
1.4
FIG. 22 – Grid raactive power (VAR).
1.6
1.8
5
4 2
0
0 -2
-5
0
0.5
-4 0.5
1 Time (s)
1.5
Fundamental (50Hz) = 3.688 , THD= 9.68% 6 4 2 0
0
5
10 Harmonic order
1.5
2
2
15
Fundamental (50Hz) = 3.679 , THD= 5.58%
Mag (% of Fundamental)
Mag (% of Fundamental)
0
1 Time (s)
3 2 1 0
0
5
10 Harmonic order
15
20
20
FIG. 19 – Grid injected current (A) and T HD analysis.
FIG. 23 – Grid injected current (A) and T HD analysis.
500
1000
0
0
-1000
-500 0
0.02
0.04 0.06 Time (s)
0.08
0
0.1
0.02
0.04 0.06 Time (s)
0.08
0.1
Fundamental (50Hz) = 965.7 , THD= 17.09%
Fundamental (50Hz) = 512.8 , THD= 25.64% 3
Mag (% of Fundamental)
Mag (% of Fundamental)
3.5 2.5 2 1.5 1 0.5 0
3 2.5 2 1.5 1 0.5
0
500
1000 Frequency (Hz)
1500
2000
0
0
500
1000 Frequency (Hz)
1500
2000
FIG. 20 – Output multilevel voltage phase 1 (V) and T HD
FIG. 24 – Output multilevel voltage phase 1 (V) and T HD
analysis.
analysis.
TABLE 6- Total harmonic distorsion Current
Voltage
Grid filter
THREE LEVEL DCI
FIVE LEVEL DCI
T HD = 9.68 %
T HD = 5.58 %
T HD 25.54 %
T HD = 17.09 %
Rt= 3 Ω, Lt =0.08 H
Rt= 3 Ω, Lt =0.01 H
Fig. 15 shows the results of DC link voltage. It proves that the voltage is maintained constant, Fig. 17, Fig 18, Fig 21and Fig 22 shows the simulation result for the proposed system. The circuit provides good decoupling of the voltage loops Vd and Vq since the Vq remains constant under variations which shows high dynamic performances of the controllers. Thus the active and reactive power follows quietly the reference signals. The grid voltage and current are in phases there by the power factor at the grid connection is almost unity. The results from five level simplified SVM inverter are compared with those from three-level inverter in terms of THD. The THD measurement for the proposed five-level inverter and three-level inverter are shown in Figs. 13and 14 respectively. As shown in Fig. 19, 20,23 and 24, the THD measurement of the three-level inverter is 23.64 % for the 3 level and 17.09 % for the 5 level. the comparisons are tabulated inTable IV. By comparison, the THD measurement for three-level inverter is much higher when compared with five-level inverter. This proves that multilevel inverters can reduce the THD which is necessary criterion for gridconnected PV systems. TABLE 7- System parameters values. Pmax Vop Iop Voc Icc
150 34.5 4.35 43.5 4.75
Photovoltaic array W Maximal power V Optimal voltage A Optimal current V open circuit voltage A Short circuit current
Ns Np
18 0
-
Udc
432
V
Vs f
380 50
V Hz
Number of series arrays Number of parallel arrays DC Bus DC bus voltage Grid voltage frequency
4. CONCLUSION This paper presents a three level and a five level diodes clamped inverter for grid connected photovoltaic systems. The acceptable results for the proposed system are summarized as follows: 1- The proposed system produces less dv/dt stresses imposed on the switching devices and generates fewer harmonic in voltage and current. 2- The proposed control scheme features several advantages such as the generation of high-quality currents, the capacity to operate at a lower switching frequency. 3- The results obtained are full of promise to use the inverter in high voltage and also in high power applications such as PV generation system with grid connected. The proposed five-level inverter solves EMI, harmonics and high frequency switching problems.
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[2] Yu, H., Pan, J., 2005. A multi-function grid-connected PV system with reactive power compensation for the grid. Solar Energy 79 (1), 101– 106. [3] Tsengenes, G., Adamidis, G., 2011. Investigation of the behavior of a three phase grid-connected photovoltaic system to control active andreactive power. Electric Power Systems Research 81 (1), 177–184. [4] Rodriguez, J., Lai, J.S., Peng, F.Z., 2002. M ultilevel inverters: a survey of topologies, controls, and applications. IEEE Transactions on Industrial Electronics 49 (4), 724–738. [5] Colak, Ilhami, Kabalci, Ersan, Bayindir, Ramazan, 2011. Review of multilevel voltage source inverter topologies and control schemes. Energy Conversion and M anagement 52 (2), 1114–1128. [6] D. Sera, R. Teodorescu, and P. Rodriguez, “Pv panel model based on datasheet values,” Industrial Electronics, 2007. ISIE 2007. IEEE International Symposium on, pp. 2392–2396, June 2007. [7] H ohm DP, Ropp M E.” Comparative study of maximum power point tracking algorithm using an experimental, programmable, maximum power point tracking test bed”. Proc 28th IEEE photovoltaic Specialist Conf 2000; 28:1699–702. [8] Lalili D., “Simplified space vector PWM algorithm for three-level inverter with neutral point potential control”, The M edeteranean Journal of M easurement and Control”, vol 3, No 1, January 2007. [9] Lalili D., “Simplified space vector PWM algorithm for five-level inverter”, The European Physical Journal, Applied Physics, vol. 40, December 2007, pp. 335-342. [10] F. Blaabjerg, and All . Timbus, “Overview of Control and Grid Synchronization for Distributed Power Generation Systems,” IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1398-1409, Oct. 2006. [11] Bouchafaa, F., Beriber, D., Boucherit, M .S., 2010. M odeling and control of a gird connected PV generation system. In: 18th M editerranean Conference on Control & Automation, pp. 315–320.