RAGHU INSTITUTE OF TECHNOLOGY Dakamarri(vill), Bheemunipatnam Mandal, Visakhapatnam Dist, Andhra Pradesh, PIN- 531162 (Approved by AICTE, New Delhi, and Affiliated to Jawaharalal Nehru Technological University: Kakinada(AP)
2015-2016 III B.Tech ECE: 1st Semester
LABORATORY MANUAL For
LINEAR INTEGRATED CIRCUIT APPLICATIONS LAB Student Manual Prepared by
A.Sai Ramya, M.Tech Assistant Professor
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
RAGHU INSTITUTE OF TECHNOLOGY (Affiliated to JNTU-KAKINADA) Visakhapatnam-531162
CERTIFICATE
Name of the Laboratory
:
Linear Integrated Circuit Applications
Name of the Faculty
:
Miss.A.Sai Ramya
Department
:
Electronics and Communication Engineering
Program
:
Year Semester
B.Tech :
:
III Year
I Semester
IQAC Members Name
:
Signature(s)
:
HOD - ECE
CONTENTS S.NO
DESCRIPTION
PAGE NO
1.
Course Description
i
2.
General Instructions
v
3.
Additional Instructions
vii
4.
University Syllabus
viii
5.
List of Experiments
ix
6.
Cycle-Wise List of Experiment
x
7.
Study of op amp IC-741,IC555,IC565,IC566,IC1496-functioning,parameters and
1
specifications. 8.
Op-amp applications-adder, subtractor, comparator circuits.
12
9.
Integrator, differentiator circuits using IC 741.
17
10.
Active Filter Applications – LPF, HPF (first order)
24
11.
Active Filter Applications – BPF & Band Reject (Wideband and Notch Filters)
29
12.
Wein Bridge Oscillaor
38
13.
Function Generator using Op-Amps
42
14.
IC 555 Timer-Astable Operation Circuit
46
15.
IC 555 Timer - Monostable Operation Circuit
50
16.
IC 565- PLL Applications
54
17.
Schmitt Trigger Circuits- using IC 741 & IC 555
57
18.
IC 566 – VCO Applications
61
19.
Voltage Regulator using IC723
65
20.
Three Terminal Voltage Regulators- 7805, 7809, 7912
69
21.
4 bit DAC using Op-Amp
76 ADDITIONAL EXPERIMENTS
22.
Voltage- to- Current Converter
81
23.
Precision Rectifier
86
24.
Clipper Circuits using IC 741
89
25.
Appendix-A
94
26.
Appendix-B
95
27.
Reference
96
Department of Electronics & Communication Engg.
LICA LAB
COURSE DESCRIPTION Course Context and Overview: The course consists of laboratory tasks dealing with different types of Analog IC , timers and regulators . It is a credit based laboratory course designed as a supplement to the Linear Integrated Circuit Applications theory course. Primary emphasis is placed on practical performance of Circuits which are designed by analog IC’s. Practical information relating to Input and Output characteristics are studied. Laboratory experiments are conducted to reinforce theory and to provide practical experience with analog IC’s , timers and Regulators. The course covers practical experiments on different Applications of Analog IC’s. Course Prerequisites: Pulse and Digital Circuits Literature: Faculty Manual Books Recommended: Text Books: 1. Linear Integrated Circuits – D. Roy Chowdhury, New Age International (p) Ltd, 2nd Edition,2003. 2. Op-Amps & Linear ICs - Ramakanth A. Gayakwad, PHI,1987. Reference Books: 1. Design with Operational Amplifiers & Analog Integrated Circuits - Sergio Franco, McGraw Hill, 1988. 2. Operational Amplifiers & Linear Integrated Circuits–R.F.Coughlin & Fredrick Driscoll, PHI, 6th Edition. 3. Micro Electronics – Millman, McGraw Hill,1988. 4. Operational Amplifiers – C.G. Clayton, Butterworth & Company Publ. Ltd./ Elsevier, 1971. Programme Educational Objectives: PEO No.
Programme Educational Objectives
PEO 1
Our graduates will be productive in the professional practice and obtain employment.
PEO 2
Our Graduates will function effectively as individual and within a team with good leadership qualities.
PEO 3
Our Graduates will recognize the need for continuous self-improvement and with good moral values.
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Programme Outcomes: PO No.
Programme Outcomes
a
an ability to apply knowledge of mathematics, science and engineering
b
an ability to design and conduct experiments, as well as to analyze and interpret data
c d
an ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, andonsustainability an ability to function multidisciplinary teams
e
an ability to identify, formulate, and solve engineering problems
f
an ability to understanding of professional and ethical responsibility
g
an ability to communicate effectively
h i
the broad education necessary to understand the impact of engineering solutions in a global, economic, environmental, and societal context a recognition of the need for, and an ability to engage in life-long learning
j
a knowledge of contemporary issues
k
an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice an ability to implement MATLAB, Embedded systems design for electronics and communications engineering applications.
l
Course Objectives: To expose the students to know about different Applications of Analog IC’s of IC-741, IC555 timer with experimental experience and also to impart industry oriented learning. Course Outcomes: S.No Course Outcomes 1 Gains knowledge in IC Design 2 Gains knowledge in Op-Amp and its Applicaitons 3 Gains knowledge in design of function generator using Op-Amp 4 Gains Knowledge in design of Voltage regulators and PLL. Mapping of Course Outcomes to Programme Outcomes and Programme Educational Objectives:
S.No 1
Course Outcomes Student Gains knowledge in IC Design
Raghu Institute of Technology, Dakamarri, Visakhapatnam
Programme Programme Educational Outcomes Objectives B PEO I Page ii
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Student Gains knowledge in Op-Amp and its Applicaitons Student Gains knowledge in design of function generator using Op-Amp Student Gains Knowledge in design of Voltage regulators and PLL.
B
PEO I
B
PEO I
B
PEO I
Assessment Strategy: A variety of learning strategies are used throughout the course. S.No 1 2 3 4 5
Teaching Learning and Assessment Strategy Classroom Demonstration by Faculty In-charge through different Teaching Methodologies Extra Laboratory Session Student- Faculty In charge Discussion Collaborative and Co-operative learn Independent student study and Practice
Evaluation of Marks for the Laboratory Exam Internal Marks - 25 For Laboratory courses there should be continuous evaluation during the semester for 25 Internal Marks. The distribution of Internal Marks is given below. Serial No 1 2 3
Criteria Day to Day Work Record Internal Examination Total Marks
Marks 10 5 10 25
External Lab Exam - 50 Each semester end lab Examination shall be evaluated by an External Examiner along with an Internal Examiner. Serial No 1 2 3 4
Criteria Pre practical Practical Post practical Viva Total Marks
Marks 30 10 10 10 50
Total Lab Exam Marks - 75 Each semester Total Final lab Examination marks is the sum of marks obtained in both internal and external Exams. Serial No 1
Criteria Internal
Marks 25
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Department of Electronics & Communication Engg. 2
External Total Marks
LICA LAB 50 75
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GENERAL INSTRUCTIONS SAFETY: 1. When students are doing experiment they have to be very care full. 2. Students should have the prior knowledge about the lab they are doing. 3. If any kind of wrong thing happened while doing the experiment. Students have to immediately switch off power supply on the work table. 4. Wearing loose garments inside the lab is strictly prohibited .
ATTENDANCE: 1. Students have to come to the laboratory with proper dress code and ID Cards. 2. Students have to bring Observation note book , Record note book and calculators etc.. to the Laboratory. 3. Students have to sign in the log register after entering into the lab and before leaving the laboratory. 4. Students have to show their observations with results after completion of their experiments and they have to get is signed. 5. After completion of experiment students have to submit their completed records to the faculty of their lab with in a week.
DOING EXPERIMENTS: 1. Start the experiment as per the procedure. 2. Enter all readings in the tabulation. 3. Do not make any interconnections on the bread board when power is switched ON. 4. Take readings without any parallax error. 5. If any of the things are wrong, then switch off and modify the connections. Inform to the staff and then START.
CALCULATION: Calculate all required quantities and enter in the tabulation. Units are very, very important. Draw the necessary graphs. Write the result. Show it to the staff for getting Signature.
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RECORD: 1. As the name Implies, it is a record: permanent record for reference. Write neatly; Draw circuit diagrams neatly and label correctly. 2. Enter readings in the tabulation. 3. Draw Graph. Complete the record before you come for next lab class. 4. Bring the record for submission during next lab class.
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ADDITIONAL INSTRUCTIONS 1. Before entering into the laboratory class, you must be well prepared for the experiment that you are going to do on that day. 2. You must bring the related textbook, which may deal with the relevant experiment. 3. Get the circuit diagram and block diagram without any wrong connections. 4. Get the reading verified. Then inform the technician so that supply to the worktable can be switched off. 5. You must get the observation note corrected within two days from the date of completion of experiment. 6. Write the answer for all the discussion questions in the observation note. If not, marks for concerned observation will be proportionately reduced. 7. If you miss any practical class due to unavoidable reasons, intimate the staff in charge and do the missed experiment in the repetition class. 8. Such of those students who fail to put in a minimum of 75% attendance in the laboratory class will run the risk of not being allowed for the University Practical Examination. They will have to repeat the lab course in subsequent semester after paying prescribed fee. 9. Acquire a good knowledge of the surrounding of your worktable. Know where the various live points are situated in your table. 10. In case of any unwanted things happening, immediately switch off the mains in the worktable. The same must be done when there is a power break during the experiment being carried out.
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LIST OF EXPERIMENTS RECOMMENDED BY JNTU KAKINADA
JAWAHARLAL TECHNOLOGICAL UNIVERSITY KAKINADA ELECTRONICS AND COMMUNICATION ENGINEERING III Year B.Tech ECE I Semester
T P C 0 3 2
Minimum Twelve Experiments to be conducted : 1. Study of OP AMPs – IC 741, IC 555, IC 565, IC 566, IC 1496 – functioning, parameters and Specifications 2. OP AMP Applications – Adder, Subtractor, Comparator Circuits. 3. Integrator and Differentiator Circuits using IC 741. 4. Active Filter Applications – LPF, HPF (first order) 5. Active Filter Applications – BPF, Band Reject (Wideband) and Notch Filters. 6. IC 741 Oscillator Circuits – Phase Shift and Wien Bridge Oscillators. 7. Function Generator using OP AMPs. 8. IC 555 Timer – Monostable Operation Circuit. 9. IC 555 Timer – Astable Operation Circuit. 10. Schmitt Trigger Circuits – using IC 741 and IC 555. 11. IC 565 – PLL Applications. 12. IC 566 – VCO Applications. 13. Voltage Regulator using IC 723. 14. Three Terminal Voltage Regulators – 7805, 7809, 7912. 15. 4 bit DAC using OP AMP. Equipment required for Laboratories: 1. RPS 2. CRO 3. Function Generator 4. Multi Meters 5. IC Trainer Kits (Optional) 6. Bread Boards 7. Components:- IC741, IC555, IC565, IC1496, IC723, 7805, 7809, 7912 and other Essential components. 8. Analog IC Tester
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List of Experiment 1.Study of OP AMPs – IC 741, IC 555, IC 565, IC 566, IC 1496 – functioning,
.
parameters and Specifications 2. OP AMP Applications – Adder, Subtractor, Comparator Circuits.
3. Integrator and Differentiator Circuits using IC 741. 4. Active Filter Applications – LPF, HPF (first order)
5. Function Generator using OP AMPs. 6. IC 555 Timer – Monostable Operation Circuit. 7. IC 555 Timer – Astable Operation Circuit. 8. Schmitt Trigger Circuits – using IC 741 and IC 555. 9. IC 565 – PLL Applications.
10. Voltage Regulator using IC 723. 11. Three Terminal Voltage Regulators – 7805, 7809, 7912.
12. 4 bit DAC using OP AMP.
Additional Experiments: 13. Voltage- to- Current Converter
14. Clipper Circuits using IC 741
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CYCLE-WISE LIST OF EXPERIMENTS CYCLE – I : i.Study of OP AMPs – IC 741, IC 555, IC 565, IC 566, IC 1496 – functioning,
.
parameters and Specifications 1. OP AMP Applications – Adder, Subtractor, Comparator Circuits.
2. Integrator and Differentiator Circuits using IC 741. 3. Active Filter Applications – LPF, HPF (first order)
4. Function Generator using OP AMPs. 5. IC 555 Timer – Monostable Operation Circuit. 6. IC 555 Timer – Astable Operation Circuit. CYCLE – II : 7. Schmitt Trigger Circuits – using IC 741 and IC 555. 8. IC 565 – PLL Applications.
9. Voltage Regulator using IC 723. 10. Three Terminal Voltage Regulators – 7805, 7809, 7912.
11. 4 bit DAC using OP AMP.
12. Voltage- to- Current Converter
13. Clipper Circuits using IC 741
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1. STUDY OF OP AMPS - IC 741, IC 555, IC 565, IC 566, IC 1496-FUNCTIONING, PARAMETERS AND SPECIFICATIONS
IC 741 General Description: The IC 741 is a high performance monolithic operational amplifier constructed using the planer epitaxial process. High common mode voltage range and absence of latch-up tendencies make the IC 741 ideal for use as voltage follower. The high gain and wide range of operating voltage provide superior performance in integrator, summing amplifier and general feed back applications. Block Diagram of Op-Amp:
Pin Configuration:
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Features: 1. No frequency compensation required. 2. Short circuit protection 3. Offset voltage null capability 4. Large common mode and differential voltage ranges 5. Low power consumption 6. No latch-up Specifications: 1. Voltage gain A = α typically 2,00,000 2. I/P resistance RL = α Ω, practically 2MΩ 3. O/P resistance R =0, practically 75Ω 4. Bandwidth = α Hz. It can be operated at any frequency 5. Common mode rejection ratio = α (Ability of op amp to reject noise voltage) 6. Slew rate + α V/μsec (Rate of change of O/P voltage) 7. When V1 = V2, VD=0 8. Input offset voltage (Rs ≤ 10KΩ) max 6 mv 9. Input offset current = max 200nA 10. Input bias current : 500nA 11. Input capacitance : typical value 1.4pF 12. Offset voltage adjustment range : ± 15mV 13. Input voltage range : ± 13V 14. Supply voltage rejection ratio : 150 μV/V 15. Output voltage swing: + 13V and – 13V for RL > 2KΩ 16. Output short-circuit current: 25mA 17. supply current: 28mA 18. Power consumption: 85mW 19. Transient response: rise time= 0.3 μs Overshoot= 5%
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Applications: 1. AC and DC amplifiers 2. Active filters 3. Oscillators 4. Comparators 5. Regulators
IC 555: Description: The operation of SE/NE 555 timer directly depends on its internal function. The three equal resistors R1, R2, R3 serve as internal voltage divider for the source voltage. Thus onethird of the source voltage VCC appears across each resistor. Comparator is basically an Op-amp which changes state when one of its inputs exceeds the reference voltage. The reference voltage for the lower comparator is +1/3 VCC. If a trigger pulse applied at the negative input of this comparator drops below +1/3 V CC, it causes a change in state. The upper comparator is referenced at voltage +2/3 VCC. The output of each comparator is fed to the input terminals of a flip flop. The flip-flop used in the SE/NE 555 timer IC is a bistable multivibrator. This flip flop changes states according to the voltage value of its input. Thus if the voltage at the threshold terminal rises above +2/3 VCC, it causes upper comparator to cause flip-flop to change its states. On the other hand, if the trigger voltage falls below +1/3 VCC, it causes lower comparator to change its states. Thus the output of the flip flop is controlled by the voltages of the two comparators. A change in state occurs when the threshold voltage rises above +2/3 VCC or when the trigger voltage drops below +1/3 Vcc. The output of the flip-flop is used to drive the discharge transistor and the output stage. A high or positive flip-flop output turns on both the discharge transistor and the output stage. The discharge transistor becomes conductive and behaves as a low resistance short circuit to ground. The output stage behaves similarly. When the flip-flop output assumes the low or zero states reverse action takes place i.e., the discharge transistor behaves as an open circuit or positive VCC state. Thus the operational state of the discharge transistor and the output stage depends on the voltage applied to the threshold and the trigger input terminals.
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Block Diagram of IC 555:
Pin Configuration:
Function of Various Pins of 555 IC: Pin (1) of 555 is the ground terminal; all the voltages are measured with respect to this pin. Pin (2) of 555 is the trigger terminal, If the voltage at this terminal is held greater than onethird of VCC, the output remains low. A negative going pulse from Vcc to less than Vec/3 triggers the output to go High. The amplitude of the pulse should be able to make the comparator (inside the IC) change its state. However the width of the negative going pulse must not be greater than the width of the expected output pulse.
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Pin (3) is the output terminal of IC 555. There are 2 possible output states. In the low output state, the output resistance appearing at pin (3) is very low (approximately 10 Ω). As a result the output current will goes to zero , if the load is connected from Pin (3) to ground , sink a current I Sink (depending upon load) if the load is connected from Pin (3) to ground, and sinks zero current if the load is connected between +VCC and Pin (3). Pin (4) is the Reset terminal. When unused it is connected to +Vcc. Whenever the potential of Pin (4) is drives below 0.4V, the output is immediately forced to low state. The reset terminal enables the timer over-ride command signals at Pin (2) of the IC. Pin (5) is the Control Voltage terminal.This can be used to alter the reference levels at which the time comparators change state. A resistor connected from Pin (5) to ground can do the job.
Normally 0.01μF capacitor is connected from Pin (5) to ground.
This capacitor
bypasses supply noise and does not allow it affect the threshold voltages. Pin (6) is the threshold terminal. In both astable as well as monostable modes, a capacitor is connected from Pin (6) to ground. Pin (6) monitors the voltage across the capacitor when it charges from the supply and forces the already high O/p to Low when the capacitor reaches +2/3 VCC. Pin (7) is the discharge terminal. It presents an almost open circuit when the output is high and allows the capacitor charge from the supply through an external resistor and presents an almost short circuit when the output is low. Pin (8) is the +Vcc terminal. 555 can operate at any supply voltage from
+3 to +18V.
Features of 555 IC: 1. The load can be connected to o/p in two ways i.e. between pin 3 & ground 1 or between pin 3 & VCC (supply) 2. 555 can be reset by applying negative pulse, otherwise reset can be connected to +Vcc to avoid false triggering. 3. An external voltage effects threshold and trigger voltages. 4. Timing from micro seconds through hours. 5. Monostable and bistable operation 6. Adjustable duty cycle 7. Output compatible with CMOS, DTL, TTL 8. High current output sink or source 200mA 9. High temperature stability 10. Trigger and reset inputs are logic compatible.
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Specifications: 1. Operating temperature
:
SE 555-- -55oC to 125oC NE 555--
0o to 70oC
2. Supply voltage
:
+5V to +18V
3. Timing
:
μSec to Hours
4. Sink current
:
200mA
5. Temperature stability
:
50 PPM/oC change in temp or 0-005% /oC.
Applications: 1. Monostable and Astable Multivibrators 2. dc-ac converters 3. Digital logic probes 4. Waveform generators 5. Analog frequency meters 6. Tachometers 7. Temperature measurement and control 8. Infrared transmitters 9. Regulator & Taxi gas alarms etc.
IC 565: Description: The Signetics SE/NE 560 series is monolithic phase locked loops. The SE/NE 560, 561, 562, 564, 565, & 567 differ mainly in operating frequency range, power supply requirements and frequency and bandwidth adjustment ranges. The device is available as 14 Pin DIP package and as 10-pin metal can package. Phase comparator or phase detector compare the frequency of input signal fs with frequency of VCO output fo and it generates a signal which is function of difference between the phase of input signal and phase of feedback signal which is basically a d.c voltage mixed with high frequency noise. LPF remove high frequency noise voltage. Output is error voltage. If control voltage of VCO is 0, then frequency is center frequency (fo) and mode is free running mode. Application of control voltage shifts the output frequency of VCO from fo to f. On application of error voltage, difference between fs & f tends to decrease and VCO is said to be locked. While in locked condition, the PLL tracks the changes of frequency of input signal.
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Block Diagram of IC 565:
Pin Configuration:
Specifications: 1. Operating frequency range
:
0.001 Hz to 500 KHz
2. Operating voltage range
:
±6 to ±12V
3. Inputs level required for tracking
:
10mV rms minimum to 3v (p-p) max.
4. Input impedance
:
10 KΩ typically
5. Output sink current 6. Drift in VCO center frequency
: :
1mA typically
300 PPM/oC typically
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(fout) with temperature 7. Drif in VCO centre frequency with
:
1.5%/V maximum
8. Triangle wave amplitude
:
typically 2.4 VPP at ± 6V
9. Square wave amplitude
:
typically 5.4 VPP at ± 6V
10. Output source current
:
10mA typically
11. Bandwidth adjustment range
:
± 60%
supply voltage
Center frequency fout = 1.2/4R1C1 Hz = free running frequency FL = ± 8 fout/V Hz V = (+V) – (-V)
fL fc = ± 3 2 (3.6) x10 xC 2
1 / 2
Applications: 1. Frequency multiplier 2. Frequency shift keying (FSK) demodulator 3. FM detector
IC 566: Description: The NE/SE 566 Function Generator is a voltage controlled oscillator of exceptional linearity with buffered square wave and triangle wave outputs. The frequency of oscillation is determined by an external resistor and capacitor and the voltage applied to the control terminal. The oscillator can be programmed over a ten to one frequency range by proper selection of an external resistance and modulated over a ten to one range by the control voltage with exceptional linearity.
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Block Diagram of IC566:
Pin diagram:
Specifications: Maximum operating Voltage ---
26V
Input voltage
---
3V (P-P)
Storage Temperature
---
-65oC to + 150oC
Operating temperature
---
0oC to +70oC for NE 566 -55oC to +125oC for SE 566
Power dissipation
---
300mv
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Applications: 1. Tone generators. 2. Frequency shift keying 3. FM Modulators 4. clock generators 5. signal generators 6. Function generator IC 1496 Description: IC balanced mixers are widely used in receiver IC’s. The IC versions are usually described as balanced modulators. Typical example of balanced IC modulator is MC1496. The circuit consists of a standard differential amplifier (formed by Q5 _ Q6 combination) driving a quad differential amplifier composed of transistor Q1 – Q4. The modulating signal is applied to the standard differential amplifier (between terminals 1 and 4). The standard differential amplifier acts as a voltage to current converter. It produces a current proportional to the modulating signal. Q7 and Q8 are constant current sources for the differential amplifier Q5 – Q6. The lower differential amplifier has its emitters connected to the package pins ( 2 & 3) so that an external emitter resistance may be used. Also external load resistors are employed at the device output (6 and 12 pins).The output collectors are cross-coupled so that full wave balanced multiplication takes place. As a result, the output voltage is a constant times the product of the two input signals. Schematic of IC1496:
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Pin Configuration:
Applications of MC 1496: a) Balanced modulator b) AM Modulator c) Product Modulator d) AM Detector e) Mixer f) Frequency Doublers.
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2. OP AMP APPLICATIONS – ADDER, SUBTRACTOR, COMPARATOR CIRCUITS Aim: To design adder, subtractor and comparator for the given signals by using operational amplifier.
Apparatus required: S.No
Equipment/Component name
Specifications/Value
Quantity
1
IC 741
Refer page no 2
1
2
Resistor
1kΩ
4
3
Regulated Power supply
(0 – 30V),1A
2
4
Function Generator
(.1 – 1MHz), 20V p-p
1
5
Cathode Ray Oscilloscope
(0 – 20MHz)
1
6
Multimeter
3 ½ digit display
1
Theory: Adder: A two input summing amplifier may be constructed using the inverting mode. The adder can be obtained by using either non-inverting mode or differential amplifier. Here the inverting mode is used. So the inputs are applied through resistors to the inverting terminal and non-inverting terminal is grounded. This is called “virtual ground”, i.e. the voltage at that terminal is zero. The gain of this summing amplifier is 1, any scale factor can be used for the inputs by selecting proper external resistors. Subtractor: A basic differential amplifier can be used as a subtractor as shown in the circuit diagram. In this circuit, input signals can be scaled to the desired values by selecting appropriate values for the resistors. When this is done, the circuit is referred to as scaling amplifier. However in this circuit all external resistors are equal in value. So the gain of amplifier is equal to one. The output voltage Vo is equal to the voltage applied to the noninverting terminal minus the voltage applied to the inverting terminal; hence the circuit is called a subtractor. Comparator: The circuit diagram shows an op-amp used as a comparator. A fixed reference voltage Vref is applied to the (-) input, and the other time – varying signal voltage Vin is applied to the (+) input; Because of this arrangement, the circuit is called the non-inverting comparator. Depending upon the levels of Vin and Vref, the circuit produces output. In short,
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At any given time the output
waveform shows whether Vin is greater or less than Vref. The comparator is sometimes also called a voltage-level detector because, for a desired value of Vref, the voltage level of the input Vin can be detected Circuit Diagrams:
Fig 1: Adder
Fig 2: Subtractor
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Fig 3: Comparator Procedures: A) Adder: 1. Connect the circuit as per the diagram shown in Fig 1. 2. Apply the supply voltages of +15V to pin7 and pin4 of IC741 respectively. 3. Apply the inputs V1 and V2 as shown in Fig 1. 4. Apply two different signals (DC/AC ) to the inputs 5. Vary the input voltages and note down the corresponding output at pin 6 of the IC 741 adder circuit. 6. Notice that the output is equal to the sum of the two inputs. B) Subtractor: 1. Connect the circuit as per the diagram shown in Fig 2. 2. Apply the supply voltages of +15V to pin7 and pin4 of IC741 respectively. 3
Apply the inputs V1 and V2 as shown in Fig 2.
4. Apply two different signals (DC/AC ) to the inputs 5. Vary the input voltages and note down the corresponding output at pin 6 of the IC 741 subtractor circuit. 6. Notice that the output is equal to the difference of the two inputs. C) Comparator: 1. A fixed reference voltage Vref is applied to the (-) input, and to the other input a varying voltage Vin is applied as shown in Fig 3. 2. Vary the input voltage above and below the Vref and note down the output at pin 6 of 741 IC.
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3. Observe that, when Vin is less than Vref, the output voltage is -Vsat ( - VEE) when Vin is greater than Vref, the output voltage is +Vsat (+VCC)
Observations: Adder:
V1(V)
V2(V)
Vo(V)
V1(V)
V2(V)
Vo(V)
Vin(V)
Vref(V)
Vo(V)
Subtractor:
Comparator:
Model Calculations: a) Adder Vo = - (V1 + V2) If V1 = 2.5V and V2 = 2.5V, then Vo = - (2.5+2.5) = -5V. b) Subtractor Vo = V2 – V1 If V1=2.5 and V2 = 3.3, then Vo = 3.3 – 2.5 = 0.8V
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c) Comparator If Vin < Vref, Vo = -Vsat - VEE Vin > Vref, Vo = +Vsat = +VCC Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Result:
Inference: Different applications of opamp are observed.
Questions & Answers: 1. What is the saturation voltage of 741 in terms of VCC? 2. What is the maximum voltage that can be given at the inputs? .
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3. INTEGRATOR AND DIFFERENTIATOR CIRCUITS USING IC 741 Aim: To design and verify the operation of an integrator and differentiator for a given input.
Apparatus required:
S.No
Equipment/Component name
Specifications/Value
Quantity
1
741 IC
Refer page no 2
1
2
Capacitor
0.1μf
1
3
Resistors
1KΩ, 1KΩ ,1MΩ , 100KΩ
Each one
4
Regulated Power supply
(0 – 30)V,1A
1
5
Function generator
(1Hz – 1MHz)
1
6
Cathode Ray Oscilloscope
(0 – 20MHz)
1
Theory: Integrator: In an integrator circuit, the output voltage is integral of the input signal.
The
t
output voltage of an integrator is given by Vo = -1/R1Cf
Vidt o
At low frequencies the gain becomes infinite, so the capacitor is fully charged and behaves like an open circuit. The gain of an integrator at low frequency can be limited by connecting a resistor in shunt with capacitor.
Differentiator: In the differentiator circuit the output voltage is the differentiation of the input voltage. The output voltage of a differentiator is given by
Vo = -RfC1
dVi .The input impedance of this circuit decreases with increase in frequency, thereby dt
making the circuit sensitive to high frequency noise. At high frequencies circuit may become unstable.
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Circuit Diagrams:
Fig 1: Integrator
Fig 2: Differentiator Design equations: Integrator: Choose T = 2πRfCf Where T= Time period of the input signal Assume Cf and find Rf Select Rf = 10R1
1 Vo (p-p) = R1C f
T /2
V
i ( p p)
dt
o
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Differentiator: Select given frequency fa = 1/(2πRfC1), Assume C1 and find Rf Select fb = 10 fa = 1/2πR1C1 and
find R1
From R1C1 = RfCf, find Cf
Procedures: Integrator 1. Connect the circuit as per the diagram shown in Fig 1 2. Apply a square wave/sine input of 4V(p-p) at 1KHz 3. Observe the output at pin 6. 4. Draw input and output waveforms as shown in Fig 3.
Differentiator 1. Connect the circuit as per the diagram shown in Fig 2 2. Apply a square wave/sine input of 4V(p-p) at 1KHz 3. Observe the output at pin 6 4. Draw the input and output waveforms as shown in Fig 4 Wave Forms: Integrator
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Fig 3: Input and output waves forms of integrator
Differentiator
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Fig 4 :Input and output waveforms of Differentiator Sample readings: Integrator Input –Square wave
Output - Triangular
Amplitude(VP-P)
Time period
Amplitude (VP-P)
Time
(V)
(ms)
(V)
period (ms)
Input –sine wave
Output – cosine
Amplitude(VP-P)
Time
Amplitude (VP-P)
Time
(V)
period
(V)
period
(ms)
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Differentiator: Input –square wave
Output – Spikes
Amplitude (VP-P)
Time period
Amplitude (VP-P)
Time period
(V)
(ms)
(V)
(ms)
Input –sine wave
Output – cosine
Amplitude (VP-P)
Time period
Amplitude (VP-P)
Time period
(V)
(ms)
(V)
(ms)
Model Calculations: Integrator: For T= 1 msec fa = 1/T = 1 KHz fa = 1 KHz = 1/(2πRfCf) Assuming Cf= 0.1μf, Rf is found from Rf=1/(2πfaCf) Rf =1.59 KΩ Rf = 10 R1 R1= 159Ω Differentiator For T = 1 msec f= 1/T = 1 KHz fa = 1 KHz = 1/(2πRfC1) Assuming C1= 0.1μf, Rf is found from Rf=1/(2πfaC1) Rf=1.59 KΩ fb = 10 fa = 1/2πR1C1 for C1= 0.1μf; R1 =159Ω Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
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Result:
Inferences: Spikes and triangular waveforms can be obtained from a given square waveform by using differentiator and integrator respectively.
Questions & Answers:
1. What are the problems of ideal differentiator?
2. What are the problems of ideal integrator?
3. What are the applications of differentiator and integrator?
4. What is the need for Rf in the circuit of integrator? 5. What is the effect of C1 on the output of a differentiator?
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4. ACTIVE FILTER APPLICATIONS – LPF, HPF (FIRST ORDER) Aim: To design and obtain the frequency response of i)
First order Low Pass Filter (LPF)
ii)
First order High Pass Filter (HPF)
Apparatus required: S.No
Equipment/Component name
Specifications/Value
Quantity
1
IC 741
Refer page no 2
1
2
Resistors
10KΩ
3
3
Capacitors
0.01μf
1
4
Cathode Ray Oscilloscope
(0 – 20MHz)
1
5
Regulated Power supply
(0 – 30V),1A
1
6
Function Generator
(1Hz – 1MHz)
1
Theory: a) LPF: A LPF allows frequencies from 0 to higher cut of frequency, fH. At fH the gain is 0.707 Amax, and after fH gain decreases at a constant rate with an increase in frequency. The gain decreases 20dB each time the frequency is increased by 10. Hence the rate at which the gain rolls off after fH is 20dB/decade or 6 dB/ octave, where octave signifies a two fold increase in frequency. The frequency f=fH is called the cut off frequency because the gain of the filter at this frequency is down by 3 dB from 0 Hz. Other equivalent terms for cut-off frequency are -3dB frequency, break frequency, or corner frequency. b) HPF: The frequency at which the magnitude of the gain is 0.707 times the maximum value of gain is called low cut off frequency. Obviously, all frequencies higher than fL are pass band frequencies with the highest frequency determined by the closed –loop band width all of the op-amp.
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Circuit diagrams:
Fig 1: Low pass filter
Fig 2: High pass filter
Design: First Order LPF: To design a Low Pass Filter for higher cut off frequency fH = 4 KHz and pass band gain of 2 fH = 1/( 2πRC ) Assuming C=0.01 µF, the value of R is found from R= 1/(2πfHC) Ω =3.97KΩ The pass band gain of LPF is given by AF = 1+ (RF/R1)= 2 Assuming R1=10 KΩ, the value of RF is found from RF=( AF-1) R1=10KΩ
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First Order HPF: To design a High Pass Filter for lower cut off frequency fL = 4 KHz and pass band gain of 2 fL = 1/( 2πRC ) Assuming C=0.01 µF,the value of R is found from R= 1/(2πfLC) Ω =3.97KΩ The pass band gain of HPF is given by AF = 1+ (RF/R1)= 2 Assuming R1=10 KΩ, the value of RF is found from RF=( AF-1) R1=10KΩ
Procedure: First Order LPF 1. Connections are made as per the circuit diagram shown in Fig 1. 2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into saturation. 3. Vary the input frequency and note down the output amplitude at each step as shown in Table (a). 4. Plot the frequency response as shown in Fig 3 .
First Order HPF: 1.
Connections are made as per the circuit diagrams shown in Fig 2.
2.
Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into saturation.
3.
Vary the input frequency and note down the output amplitude at each step as shown in Table (b).
4.
Plot the frequency response as shown in Fig 4.
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Tabular Form and Sampled Values: a)LPF
b) HPF Input voltage Vin = 0.5V O/P
Voltage Gain
Frequency Voltage(V) Gain
indB
Frequency O/P
Voltage Gain
Voltage(V) Gain
Vo/Vi
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Vo/Vi
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Model graphs :
Fig (3) Frequency response characteristics
Fig(4) Frequency response characteristics
of LPF
of HPF
Precautions: 1. Check the connections before giving the power supply. 2. Readings should be taken carefully.
Result:
Inferences: By interchanging R and C in a low-pass filter, a high-pass filter can be obtained.
Questions & Answers: 1. What is meant by frequency scaling?
2. How do you convert an original frequency (cut off) fH to a new cut off frequency fH? 3. What is the effect of order of the filter on frequency response characteristics?
4. What modifications in circuit diagrams require to change the order of the filter?
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5 ACTIVE FILTER APPLICATIONS – BPF & BAND REJECT (WIDEBAND ) AND NOTCH FILTERS. Aim: To design and obtain the frequency response of i)
Wide Band pass filter
ii)
Wide Band reject filter
iii)
Notch filter
Apparatus required: S.No
Equipment/Component name
Specifications/Value
Quantity
1
741 IC
Refer page no 2
3
2
Resistors
5.6kΩ
9
Resistors
39kΩ
2
3
Resistors
(20kΩ pot)
2
4
Capacitors
0.01μf
2
Capacitors
0.1μf
2
Capacitors
0.2μf
5
Regulated Power supply
(0 – 30)V,1A
1 1
6
Function Generator
(1Hz – 1MHZ)
1
7
Cathode Ray Oscilloscope
(0 – 20MHz)
1
Theory: Band pass filter: A band pass filter has a pass band between two cutoff frequencies fH and fL such that fH > fL. Any input frequency outside this pass band is attenuated. There are two types of band-pass filters. Wide band pass and Narrow band pass filters. We can define a filter as wide band pass if its quality factor Q 10, then we call the filter a narrow band pass filter. A wide band pass filter can be formed by simply cascading high-pass and low-pass sections. The order of band pass filter depends on the order of high pass and low pass sections. Band Rejection Filter: The band-reject filter is also called a band-stop or band-elimination filter. In this filter, frequencies are attenuated in the stop band while they are passed outside
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this band. Band reject filters are classified as wide band-reject narrow band-reject. Wide band-reject filter is formed using a low pass filter, a high-pass filter and summing amplifier. To realize a band-reject response, the low cut off frequency fL of high pass filter must be larger than high cut off frequency fH of low pass filter. The pass band gain of both the high pass and low pass sections must be equal.
Notch Filter: The narrow band reject filter, often called the notch fitter is commonly used for the rejection of a single frequency. The most commonly used notch filter is the twin-T network .This is a passive filter composed of two T-shaped networks. One T network is made up of two resistors and a capacitor, while the other uses two capacitors and a resistor. There are several ways to make the notch filter. One way is to subtract the band pass filter output from its input .The notch-out frequency is the frequency at which maximum attenuation occurs and is given by fN = 1/( 2πRC )
Circuit diagrams:
Fig 1: Wideband pass filter
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Fig 2: Wideband reject filter
Fig 3: Notch filter
Design: Band pass filter: To design a band pass filter having fH = 4KHz and
fL = 400Hz and
pass band gain of 2. As shown in Fig 1,the first section consisting of Op Amp,RF,R1,R and C is the high pass filter and second consisting of low pass filter. The design of low pass and high pass filters.
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Low Pass Filter Design: Assuming C’=0.01μf, the value of R’ is found from R’ = 1/(2πfH C’) Ω =3.97KΩ The pass band gain of LPF is given by ALPF = 1+ (R’ F / R’1 )=2 Assuming R’1=5.6 KΩ, the value of R’F is found from R’F =( AF-1) R’1=5.6KΩ High Pass Filter Design: Assuming C=0.01μf, the value of R is found from R = 1/(2πfLC) Ω =39.7KΩ The pass band gain of HPF is given by AHPF = 1+ (RF / R1 )=2 Assuming R1=5.6 KΩ, the value of RF is found from RF = ( AF-1) R1=5.6KΩ Band reject filter: To design a band reject filter with fH = 4 KHz, fL = 400Hz and pass band gain of 2 Low Pass Filter Design: Assuming C’=0.01μf, the value of R’ is found from R’ = 1/(2πfH C’) Ω =3.97KΩ The pass band gain of LPF is given by ALPF = 1+ (R’ F / R’1 )=2 Assuming R’1=5.6 KΩ, the value of R’F is found from R’F =( AF-1) R’1=5.6KΩ High Pass Filter Design: Assuming C=0.01μf, the value of R is found from R = 1/ (2πfLC) Ω =39.7KΩ The pass band gain of HPF is given by AHPF = 1+ (RF / R1) =2 Assuming R1=5.6 KΩ, the value of RF is found from RF = (AF-1) R1=5.6KΩ Adder circuit design: Select all resistors equal value such that gain is unity. Assume R2=R3=R4=5.6 KΩ Notch Filter Design:
fN = 400Hz
Assuming C=0.1μf,the value of R is found from R = 1/ (2πfNC)=39 KΩ
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Procedure: Wide Band Pass Filter:
1. Connect the circuit as per the circuit diagram shown in Fig1 2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp does not go into saturation (depending on gain). 3. Vary the input frequency from 100 Hz to 100 KHz and note down the output amplitude at each step as shown in Table (a). 4. Plot the frequency response as shown in Fig 4.
Wide Band Reject Filter:
1. Connect the circuit as per the circuit diagram shown in Fig 2 2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp
does not go into saturation (depending on gain). 3. Vary the input frequency from 100 Hz to 100 KHz and note down the output
amplitude at each step as shown in Table( b). 4. Plot the frequency response as shown in Fig 5.
Notch Filter: 1. Connect the circuit as per the circuit diagram shown in Fig 3 2. Apply sinusoidal wave of 2Vp-p amplitude as input such that opamp does not go into saturation (depending on gain). 3. Vary the input frequency from 100 Hz to 4 KHz and note down the output amplitude at each step as shown in Table( c). 4. Plot the frequency response as shown in Fig 6.
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Observations: a) Band pass filter:
b)
Band Reject Filter
Input voltage(Vi)=0.5V
Frequeny
O/P
Gain
Gain
Voltage
Vo/Vi
indB
Frequency
O/P
Gain
Gain indB
Voltage(V) Vo/Vi
Vo(V)
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c) Notch filter Input voltage=2Vp-p Frequency
O/P Voltage(V)
Vo/Vi
Gain in dB
Model graphs:
Fig 4 : Frequency response of Band pass filter
Fig 5 : Frequency response of wide band reject filter
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Fig 6: Frequency response of notch filter
Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Result:
Inferences: Cascade connection of HPF and LPF produces wideband pass filter and parallel connection of the above filters gives wideband reject filter. The notch filter is used to reject the single frequency.
Questions & Answers: 1. What is the relation between fC & fH, fL? 2. How do you increase the gain of the wideband pass filter?
3. What is the application of Notch filter?
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4. What is the order of the filter (each type) ?.What modifications you suggest for the circuit diagram to increase the order of the filter?
5. What is the gain roll off outside the pass band?
6. What is the difference between active and passive filters?
7. What are the advantages of active filters over passive filters?
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6. WEIN BRIDGE OSCILLATOR Aim: Design a Wein-Bridge Oscillator to produce 100kHz, ±9V output.
Apparatus Required: S.no
Component
Specification
Quantity
1
IC
LM 565
1
2
Resistors
1.5kΩ,10kΩ,2kΩ
1
4.7kΩ
2
3
Capacitor
0.047µf,0.1µf
1
4
Variable Resistor
10 kΩ
1
5
Fixed power supply
±15V
1
6
Connecting wires
Single starned
As required
7
CRO
0-30MHz
1
8
CRO Probes
Crocodile Clips
3
9
Bread Board
1
Theory: An oscillator consists of an amplifier and a feedback network. 1) 'Active device' i.e. Op Amp is used as an amplifier. 2) Passive components such as R-C or L-C combinations are used as feed back net work To start the oscillation with the constant amplitude, positive feedback is not the only sufficient condition. Oscillator circuit must satisfy the following two conditions known as Barkhausen conditions: a. The first condition is that the magnitude of the loop gain (Aβ) = 1 A = Amplifier gain and _ = Feedback gain. b. The second condition is that the phase shift around the loop must be 360° or 0°. The feedback signal does not produce any phase shift. This is the”basic principle of a Wien bridge oscillator”. The given circuit shows the RC combination used in Wien bridge oscillator. circuit is also known as lead-lag circuit. Here, resistor R1 and capacitor C1 are connected in the series while resistor R2and capacitor C2 are connected in parallel. At high frequencies, the reactance of capacitor C1 and C2 approaches zero. This causes C1 and C2 appears short. Here, capacitor C2 shorts the resistor R2. Hence, the output voltage Vo will be zero since output is taken across R2 and C2 combination. So, at high high frequencies,
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circuit acts as a 'lag circuit'. C1combination. Here, the circuit acts like a 'lead circuit'. But at one particular frequency between the two extremes, the output voltage reaches to the maximum value. At this frequency only, resistance value becomes equal to capacitive reactance and gives maximum output. Hence, this particular frequency is known as resonant frequency or oscillating frequency. The maximum output would be produced if R = Xc.= 1/(2_fC) If R1 = R2 = R and C1 = C2 = C Then the resonant frequency f = 1/(2_RC) Due to limitations of the op-amp, frequencies above 1MHz are not achievable. The basic version of Wein bridge has four arms. The two arms are purely resistive and other two arms are frequency sensitive arms. These two arms are nothing but the lead-lag circuit. The series combination of R1 and C1 is connected between terminal a and d. The parallel combination of R2 and C2 is connected between terminal d and c . So the two circuits (Fig.1 and Fig.2) are same except in shape. Here, bridge does not provide phase shift at oscillating frequency as one arm consists of lead circuit and other arm consists of lag circuit. There is no need to introduce phase shift by the operational amplifier. Therefore, non inverting amplifier is used.
Circuit diagram:
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Design: Gain required for sustained oscillation is Av = 1/b = 3 (PASS BAND GAIN) (i.e.) 1+Rf/R1 = 3 Rf = 2R1 Frequency of Oscillation fo = 1/2p R C Given fo = 1 KHz Let C = 0.05 μF R = 1/2 π foC R = 3.2 KW Let R1 = 10 KΩ \ Rf = 2 * 10 KΩ
Procedure: 1. Connect the components as shown in the circuit 2. Switch on the power supply and CRO. 3. Note down the output voltage at CRO. 4. Plot the output waveform on the graph. 5. Redesign the circuit to generate the sine wave of frequency 2KHz. 6. Compare the output with the theoretical value of oscillation.
Observation: Peak to peak amplitude of the output = __________Volts. Frequency of oscillation = __________Hz.
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Result:
Questions & Answers: 1. State the two conditions for oscillations.
2. Classify the Oscillators?
3. Define an oscillator?
4. What is the frequency range generated by Wein Bridge Oscillator?
5. What is frequency stability?
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7. FUNCTION GENERATOR USING OPAMPS Aim: To generate square wave and triangular wave form by using OPAMPs.
Apparatus required: S.No Equipment/Component name
Specifications/Value
Quantity
1
741 IC
Refer page no 2
2
2
Capacitors
0.01μf,0.001μf
Each one
3
Resistors
86kΩ ,68kΩ ,680kΩ
Each one
Resistors
100kΩ
2
4
Regulated Power supply
(0 – 30V),1A
1
5
Cathode Ray Oscilloscope
(0 -20MHz)
1
Theory: Function generator generates waveforms such as sine, triangular, square waves and so on of different frequencies and amplitudes. The circuit shown in Fig1 is a simple circuit which generates square waves and triangular waves simultaneously. Here the first section is a square wave generator and second section is an integrator. When square wave is given as input to integrator it produces triangular wave. Circuit Diagram:
Fig1: Function generator
OR
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Function generator Design: Square wave Generator: T= 2RfC ln (2R2 +R1/ R1) Assume R1 = 1.16 R2 Then T= 2RfC Assume C and find Rf Assume R1 and find R2 Integrator: Take R3 Cf >> T R3 Cf = 10T Assume Cf find R3 Take R3Cf = 10T Assume Cf = 0.01μf R3 = 10T/C = 20KΩ Procedure: 1. Connect the circuit as per the circuit diagram shown above. 2. Obtain square wave at A and Triangular wave at Vo2 as shown in Fig 1. 3. Draw the output waveforms as shown in Fig 2(a) and (b).
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Model Calculations: For T= 2 m sec T = 2 Rf C Assuming C= 0.1μf Rf = 2.10-3/ 2.01.10-6 = 10 KΩ Assuming R1 = 100 K R2 = 86 KΩ Sample readings: Square Wave: Vp-p = 26 V(p-p) T = 1.8 msec Triangular Wave: Vp-p = 1.3 V T= 1.8 msec
Wave Forms:
Fig 2 (a): Output at ‘A’ (b): Output at V02
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Precautions: Check the connections before giving the power supply. Readings should be taken carefully. . Result:
Inferences: Various waveforms can be generated.
Questions & Answers: 1. How do you change the frequency of square wave?
2. What are the applications of function generator?
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8. IC 555 TIMER - ASTABLE OPERATION CIRCUIT Aim: To generate unsymmetrical square and symmetrical square waveforms using IC555. Apparatus required: S.No
Equipment/Component name
Specifications/Value
Quantity
1
IC 555
Refer page no 6
1
2
Resistors
5.6kΩ,2.2kΩ
Each one
3
Capacitors
0.1μf,0.01μf
Each one
4
Regulated Power supply
(0 – 30V),1A
1
5
Cathode Ray Oscilloscope
(0 – 20MHz)
1
Theory: When the power supply VCC is connected, the external timing capacitor ‘C” charges towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high (≈VCC) as Reset R=0, Set S=1 and this combination makes Q =0 which has unclamped the timing capacitor ‘C’. When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the control flip flop on that Q =1. It makes Q1 ON and capacitor ‘C’ starts discharging towards ground through RB and transistor Q1 with a time constant RBC. Current also flows into Q1 through RA. Resistors RA and RB must be large enough to limit this current and prevent damage to the discharge transistor Q1. The minimum value of RA is approximately equal to VCC/0.2 where 0.2A is the maximum current through the ON transistor Q1. During the discharge of the timing capacitor C, as it reaches VCC/3, the lower comparator is triggered and at this stage S=1, R=0 which turns Q =0. Now Q =0 unclamps the external timing capacitor C. The capacitor C is thus periodically charged and discharged between 2/3 VCC and 1/3 VCC respectively. The length of time that the output remains HIGH is the time for the capacitor to charge from 1/3 VCC to 2/3 VCC. The capacitor voltage for a low pass RC circuit subjected to a step input of VCC volts is given by VC = VCC [1- exp (-t/RC)] Total time period T = 0.69 (RA + 2 RB) C f= 1/T = 1.44/ (RA + 2RB) C
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Circuit Diagram:
Fig.1 555 Astable Circuit Design: Formulae: f= 1/T = 1.44/ (RA+2RB) C Duty cycle (D) = tc/T = RA + RB/(RA+2RB) Procedure: I) Unsymmetrical Square wave 1. Connect the circuit as per the circuit diagram . 2. Observe and note down the waveform at pin 6 and across timing capacitor pin 3. 3. Measure the frequency of oscillations and duty cycle and then compare with the given values. 4. Sketch both the waveforms to the same time scale. Model calculations: Given f=1 KHz. Assuming c=0.1μF and D=0.25 1 KHz = 1.44/ (RA+2RB) x 0.1x10-6 and 0.25 =( RA+RB)/ (RA+2RB) Solving both the above equations, we obtain RA & RB as RA = 7.2K Ω RB = 3.6K
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Waveforms:
Fig 2 (a) Unsymmetrical square wave output 2 (b) Capacitor voltage of Unsymmetrical square wave output
Sample Readings:
Parameter
Unsymmetrical
Symmetrical
Voltage VPP Time period T Duty cycle
Precautions: Check the connections before giving the power supply.Readings should be taken carefully.
Result:
Inferences: Unsymmetrical square wave of required duty cycle and symmetrical square waveform can be generated.
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Questions & Answers: 1. What is the effect of C on the output?
2. How do you vary the duty cycle?
3. What are the applications of 555 in astable mode?
4. What is the function of diode in the circuit?
5. On what parameters Tc and Td designed? 6. What are charging and discharging times
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9. IC 555 TIMER-MONOSTABLE OPERATION CIRCUIT
Aim: To generate a pulse using Monostable Multivibrator by using IC555
Apparatus required:
S.No
Equipment/Component
Specifications/Value Quantity
name 1
555 IC
Refer page no 6
1
2
Capacitors
0.1μf,0.01μf
Each one
3
Resistor
10kΩ
1
4
Regulated Power supply
(0 – 30V),1A
1
5
Function Generator
(1HZ – 1MHz)
1
6
Cathode ray oscilloscope
(0 – 20MHz)
1
Theory: A Monostable Multivibrator, often called a one-shot Multivibrator, is a pulsegenerating circuit in which the duration of the pulse is determined by the RC network connected externally to the 555 timer. In a stable or stand by mode the output of the circuit is approximately Zero or at logic-low level. When an external trigger pulse is obtained, the output is forced to go high ( VCC).
The time for which the output remains high is
determined by the external RC network connected to the timer. At the end of the timing interval, the output automatically reverts back to its logic-low stable state. The output stays low until the trigger pulse is again applied. Then the cycle repeats. The Monostable circuit has only one stable state (output low), hence the name monostable. Normally the output of the Monostable Multivibrator is low.
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Fig1: Monostable Circuit using IC555 Design: Consider VCC = 5V, for given tp Output pulse width tp = 1.1 RA C Assume C in the order of microfarads & Find RA
Typical values: If C=0.1 µF , RA = 10k then tp = 1.1 mSec Trigger Voltage =4 V Procedure: 1. Connect the circuit as shown in the circuit diagram. 2. Apply Negative triggering pulses at pin 2 of frequency 1 KHz. 3. Observe the output waveform and measure the pulse duration. 4. Theoretically calculate the pulse duration as Thigh=1.1. RAC 5. Compare it with experimental values.
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Waveforms:
Fig 2 (a) Trigger signal
(b) Output Voltage
(c) Capacitor Voltage
Sample Readings: Trigger
Output wave
Capacitor output
Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Result:
Inferences: Output pulse width depends only on external components RA and C connected to IC555.
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Questions & Answers:
1. Is the triggering given is edge type or level type? If it is edge type, trailing or raising edge?
2. What is the effect of amplitude and frequency of trigger on the output?
3. How to achieve variation of output pulse width over fine and course ranges?
4. What is the effect of Vcc on output?
5. What are the ideal charging and discharging time constants (in terms of R and C) of capacitor voltage?
6. What is the other name of monostable Multivibrator? Why?
7. What are the applications of monostable Multivibrator?
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10. IC 565 – PLL APPLICATIONS Aim: Design a Phase Locked Loop Application (Voltage Controlled Oscillator) using IC LM565.
Apparatus Required:
S.No Component
Specification
Quantity
1
IC
LM 565
1
2
Resistors
1.5kΩ, 10kΩ, 2kΩ
1
4.7kΩ
2
3
Capacitor
0.047µF, 0.1µF
1
4
Variable Resistor
10kΩ
1
5
Fixed Power Supply
±15V
1
6
Connecting Wires
Single Strand
As Required
7
CRO
0-30MHz
1
8
CRO Probes
Crocodile Clips
3
9
Bread Board
1
Theory: This oscillator uses a special IC chip, the LM565 that is designed to function as a phase locked loop (PLL). The chip contains a VCO (which we will utilize in this experiment) and a phase detector. A combination of an input control voltage on pin 7 and the RC time constant formed by the components on pins 8 and 9 set the VCO output frequency. The VCO within the LM565 is not designed like a conventional oscillator. It is really a current controlled oscillator. Remember that as the charging current in a capacitor is increased, the rate of capacitor charging (as evidenced in its voltage rise) also increases. The same is true for capacitor discharging as well. The LM565 simply translates the control voltage on pin 7 into a charging and discharging current for the timing capacitor, C1. So what is the function of the resistors on pin 8? The resistors on pin 8 also help set the charge and discharge current for the timing capacitor C1. In other words, the output frequency of the LM565 VCO depends on three factors: 1) The control voltage on pin 7;
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2) The total resistance on pin 8 (R3 and R4); 3) The capacitance on pin 9 (C1).
When a capacitor is charged by a constant current, its voltage rises linearly (straightline). Thus, one of the output waveforms of the LM565 is a triangle wave. The other output is a square wave -- the result of the triangle wave going through a Schmitt trigger. Two different LM565 VCO circuits will be examined in this experiment, and they are shown in Figures 1 and 2. In Figure 1, the control voltage of the VCO is held constant by resistors R1 and R2, and the RC time-constant is varied by R3. (Note that the total resistance Rt in Figure 1 is the series combination of R3 and R4). In Figure 2, the timing resistance Rt is equal to R2, and is constant. A potentiometer has been substituted in R1's place, allowing the control voltage to be varied over a range of approximately 7.5 V to 15 V. Note that the control voltage should be adjusted to be in the range 11.25 V to 15 V in part two of this experiment
Circuit Diagram Of PLL:
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Observations: Output Voltage(V) S.No R1
C1
Theoreical
Practical
Square Wave Triangular Wave Frequency(Hz) Frequency
Procedure: 1. Connections are made as per the circuit diagram. 2. Measure the output voltage and frequency of both triangular and squares. 3. Vary the values of R1 and C1 and measure the frequency of the waveforms. 4. Compare the measured values with the theoretical values. Precautions: 1. Connect the wires properly. 2. Maintain proper Vcc levels. Result:
Questions & Answers: 1. What are the applications of VCO? 2. Draw the pin diagram of NE/SE 565. 3. What is the need of connecting 0.0047μF capacitor between pin 5 and pin
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11. SCHMITT TRIGGER CIRCUITS- USING IC 741 & IC 555 Aim: To design the Schmitt trigger circuit using IC 741 and IC 555
Apparatus required:
Equipment/Component name
Specifications/Value Quantity
1
IC 741
Refer page no 2
1
2
555IC
Refer page no 6
1
3
Cathode Ray Oscilloscope
(0 – 20MHz)
1
4
Multimeter
5
Resistors
S.No
6
Capacitors
1 100K Ω,1KΩ
2
10KΩ
1
0.1 μf, 0.01 μf
Each one
7
Regulated power supply
(0 -30V),1A
1
Theory: The circuit shows an inverting comparator with positive feed back. This circuit converts orbitrary wave forms to a square wave or pulse. The circuit is known as the Schmitt trigger (or) squaring circuit. The input voltage Vin changes the state of the output Vo every time it exceeds certain voltage levels called the upper threshold voltage Vut and lower threshold voltage Vlt. When Vo= - Vsat, the voltage across R1 is referred to as lower threshold voltage, Vlt. When Vo=+Vsat, the voltage across R1 is referred to as upper threshold voltage Vut. The comparator with positive feed back is said to exhibit hysterisis, a dead band condition.
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Circuit Diagrams:
Fig 1: Schmitt trigger circuit using IC 741
Fig 2: Schmitt trigger circuit using IC 555
Design: Vutp = [R1/(R1+R2 )](+Vsat) Vltp = [R1/(R1+R2 )](-Vsat) Vhy = Vutp – Vltp =[R1/(R1+R2)] [+Vsat – (-Vsat)]
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Procedure: 1. Connect the circuit as shown in Fig 1 and Fig2. 2. Apply an orbitrary waveform (sine/triangular) of peak voltage greater than UTP to the input of a Schmitt trigger. 3. Observe the output at pin6 of the IC 741 and at pin3 of IC 555 Schmitt trigger circuit by varying the input and note down the readings as shown in Table 1 and Table 2 4. Find the upper and lower threshold voltages (Vutp, VLtp) from the output wave form.
Wave forms:
Fig 3: (a) Schmitt trigger input wave form (b) Schmitt trigger output wave form Sample readings: Table 1: Parameter
Input 741
Output 555
741
555
Voltage( Vp-p) Time period(ms)
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Table 2: Parameter
741
555
Vutp Vltp
Precautions: Check the connections before giving the power supply. Readings should be taken carefully. Results:
.
Inferences: Schmitt trigger produces square waveform from a given signal.
Questions & Answers:
1. What is the other name for Schmitt trigger circuit?
2. In Schmitt trigger which type of feed back is used?
3. What is meant by hysteresis?
4. What are effects of input signal amplitude and frequency on output?
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12. IC 566 – VCO APPLICATIONS Aim:
i) To observe the applications of VCO-IC 566. ii) To generate the frequency modulated wave by using IC 566.
Apparatus required:
S.No
Equipment/Component Name
Specifications/Value Quantity
1
IC 566
Refer page no 10
1
2
Resistors
10KΩ
2
1.5KΩ
1
0.1 μF
1
100 pF
1
3
Capacitors
4
Regulated power supply
0-30 V, 1 A
1
5
Cathode Ray Oscilloscope
0-20 MHz
1
6
Function Generator
0.1-1 MHz
1
Theory: The VCO is a free running Multivibrator and operates at a set frequency fo called free running frequency. This frequency is determined by an external timing capacitor and an external resistor. It can also be shifted to either side by applying a d.c control voltage vc to an appropriate terminal of the IC. The frequency deviation is directly proportional to the dc control voltage and hence it is called a “voltage controlled oscillator” or, in short, VCO.
The output frequency of the VCO can be changed either by R1, C1 or the voltage VC at the modulating input terminal (pin 5). The voltage VC can be varied by connecting a R1R2 circuit. The components R1 and C1 are first selected so that VCO output frequency lies in the centre of the operating frequency range. Now the modulating input voltage is usually varied from 0.75 VCC which can produce a frequency variation of about 10 to 1.
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Circuit Diagram:
Fig1: Voltage Controlled Oscillator Design: 1. Maximum deviation time period =T. 2. fmin = 1/T. where fmin can be obtained from the FM wave 3. Maximum deviation, ∆f= fo - fmin 4. Modulation index β = ∆f/fm 5. Band width BW = 2(β+1) fm = 2 (∆f+fm) 6.
Free running frequency,fo = 2(VCC -Vc) / R1C1VCC
Procedure: 1. The circuit is connected as per the circuit diagram shown in Fig1. 2. Observe the modulating signal on CRO and measure the amplitude and frequency of the signal. 3. Without giving modulating signal, take output at pin 4, we get the carrier wave. 4. Measure the maximum frequency deviation of each step and evaluate the modulating Index. mf = β = ∆f/fm
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Waveforms:
Fig 2 (a) Input wave of VCO (b) Output of VCO at pin3 (c) Output of VCO at pin4 Sample readings: VCC=+12V; R1=R3=10KΩ; R2=1.5KΩ; fm=1KHz Free running frequency, fo = 26.1KHz fmin = 8.33KHz ∆f= 17.77 KHz β = ∆f/fm = 17.77 Band width BW ≈ 36 KHz
Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
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Result:
Inferences: During positive half-cycle of the sine wave input, the control voltage will increase, the frequency of the output waveform will decrease and time period will increase. Exactly opposite action will take place during the negative half-cycle of the input as shown in Fig (b).
Questions & Answers: 1. What are the applications of VCO?
2. What is the effect of C1 on the output?
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13. VOLTAGE REGULATOR USING IC723 Aim: To design a low voltage variable regulator of 2 to 7V using IC 723.
Apparatus required:
S.No
Equipment/Component name
Specifications/Value Quantity
1
IC 723
Refer appendix A
1
2
Resistors
3.3KΩ,8.2KΩ,
2
1KΩ, 2KΩ
1
3
Capacitor
100µf
1
4
Regulated Power supply
0 -30 V,1A
1
5
Multimeter
3 ½ digit display
1
6
Ammeter
(0-20 mA)
1
7
Voltmeter
(0-20 V)
1
Theory: A voltage regulator is a circuit that supplies a constant voltage regardless of changes in load current and input voltage variations. Using IC 723, we can design both low voltage and high voltage regulators with adjustable voltages. For a low voltage regulator, the output VO can be varied in the range of voltages Vo < Vref, where as for high voltage regulator, it is VO > Vref. The voltage Vref is generally about 7.5V. Although voltage regulators can be designed using Op-amps, it is quicker and easier to use IC voltage Regulators. IC 723 is a general purpose regulator and is a 14-pin IC with internal short circuit current limiting, thermal shutdown, current/voltage boosting etc.
Furthermore it is an
adjustable voltage regulator which can be varied over both positive and negative voltage ranges. By simply varying the connections made externally, we can operate the IC in the required mode of operation. Typical performance parameters are line and load regulations which determine the precise characteristics of a regulator. The pin configuration and specifications are shown in the Appendix-A.
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Circuit Diagram:
Fig1: Voltage Regulator Design of Low voltage Regulator :Assume Io= 1mA,VR=7.5V RB = 3.3 KΩ For given Vo R1 = ( VR – VO ) / Io R2 = VO / Io
Procedure: a) Line Regulation: 1. Connect the circuit as shown in Fig 1. 2. Obtain R1 and R2 for Vo=5V 3. By varying Vn from 2 to 10V, measure the output voltage Vo. 4. Draw the graph between Vn and Vo as shown in model graph (a) 5. Repeat the above steps for Vo=3V
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b) Load Regulation: For Vo=5V 1. Set Vi such that VO= 5 V 2. By varying RL, measure IL and Vo 3. Plot the graph between IL and Vo as shown in model graph (b) 4. Repeat above steps 1 to 3 for VO=3V.
Sample Readings: a) Line Regulation: Vi(V)
Vo(V)
a) Load Regulation:
Regulated O/p
Load Current
Load Resistance
(V)
(mA)
RL(Ω)
VFL
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Model graphs:
a) Line Regulation:
b)
Load Regulation:
Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Results:
Inferences: Variable voltage regulators can be designed by using IC 723.
Questions & Answers:
1. What is the effect of R1 on the output voltage? 2. What are the applications of voltage regulators?
3. What is the effect of Vi on output?
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14. THREE TERMINAL VOLTAGE REGULATORS- 7805, 7809, 7912 Aim: To obtain the regulation characteristics of three terminal voltage regulators.
Apparatus required:
S.No Equipment/Component
Specifications/Values Quantity
Name 1
Bread board
1
2
IC7805
Refer appendix A
1
3
IC7809
Refer appendix A
1
4
IC7912
Refer appendix A
1
5
Multimeter
3 ½ digit display
1
6
Milli ammeter
0-150 mA
1
7
Regulated power supply
0-30 V
1
8
Connecting wires
9
Resistors pot
100Ω ,1k Ω
Each one
Theory: A voltage regulator is a circuit that supplies a constant voltage regardless of changes in load current and input voltage. IC voltage regulators are versatile, relatively inexpensive and are available with features such as programmable output, current/voltage boosting, internal short circuit current limiting, thermal shunt down and floating operation for high voltage applications. The 78XX series consists of three-terminal positive voltage regulators with seven voltage options. These IC’s are designed as fixed voltage regulators and with adequate heat sinking can deliver output currents in excess of 1A. The 79XX series of fixed output voltage regulators are complements to the 78XX series devices. These negative regulators are available in same seven voltage options. Typical performance parameters for voltage regulators are line regulation, load regulation, temperature stability and ripple rejection. The pin configurations and typical parameters at 250C are shown in the Appendix-B.
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Circuit Diagrams:
Fig 1: Positive Voltage Regulator
Fig 2: Negative Voltage Regulator Procedure: a) Line Regulation: 1. Connect the circuit as shown in Fig 1 by keeping S open for 7805. 2. Vary the dc input voltage from 0 to 10V in suitable stages and note down the output voltage in each case as shown in Table1 and plot the graph between input voltage and output voltage. 3. Repeat the above steps for negative voltage regulator as shown in Fig.2 for 7912 for an input of 0 to -15V. 4. Note down the dropout voltage whose typical value = 2V and line regulation typical value = 4mv for Vin =7V to 25V.
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b) Load regulation: 1. Connect the circuit as shown in the Fig 1 by keeping S closed for load regulation. 2. Now vary R1 and measure current IL and note down the output voltage Vo in each case as shown in Table 2 and plot the graph between current IL and Vo. 3. Repeat the above steps as shown in Fig 2 by keeping switch S closed for negative voltage regulator 7912.
c) Output Resistance: Ro= (VNL – VFL) Ω IFL VNL - load voltage with no load current VFL - load voltage with full load current IFL -
full load current.
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Sample readings:
1) IC 7805 a) Line Regulation
Vi(V)
Vo(V)
b) Load Regulation VNL = 15 V
Load Current
Load
(mA)
Resistance
Vdc(FL) (V)
% Regulation
RL(Ω)
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2) IC 7912 a) Line Regulation
Vi(V)
Vo(V)
c) Load Regulation
Load Current (mA)
Load Resistance
% Regulation Vdc(FL) (V)
RL(Ω)
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Graphs: IC 7805
IC 7809
IC7912
% load regulation = VNL - VFL x 100 VFL
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Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Result:
Inferences: Line and load regulation characteristics of fixed positive and negative three terminal voltages are obtained. These voltage regulators are used in regulated power supplies.
Questions & Answers:
1. Mention the IC number for a negative fixed three terminal voltage regulator of 12V.
2. Explain the significance of IC regulators in power supply
3. What is drop-out voltage?
4. What is the role of C1 and C2? 4. What are C1 and C2 called?
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15. 4-BIT DAC USING OP AMP Aim: To design 1) weighted resistor DAC 2) R-2R ladder Network DAC
Apparatus required:
S.No
Equipment/Component
Specifications/Value
Quantity
name 1
741 IC
Refer page no 2
1
2
Resistors
1KΩ,2KΩ,4KΩ,
Each one
8KΩ 3
Regulated Power supply
0-30 V , 1A
1
4
Multimeter(DMM)
3 ½ digit display
1
5
connecting wires
6
Digital trainer Board
1
Theory: Digital systems are used in ever more applications, because of their increasingly efficient, reliable, and economical operation with the development of the microprocessor, data processing has become an integral part of various systems Data processing involves transfer of data to and from the micro computer via input/output devices. Since digital systems such as micro computers use a binary system of ones and zeros, the data to be put into the micro computer must be converted from analog to digital form. On the other hand, a digital-to-analog converter is used when a binary output from a digital system must be converted to some equivalent analog voltage or current. The function of DAC is exactly opposite to that of an ADC.
A DAC in its simplest form uses an op-amp and either binary weighted resistors or R2R ladder resistors. In binary-weighted resistor op-amp is connected in the inverting mode, it can also be connected in the non inverting mode. Since the number of inputs used is four, the converter is called a 4-bit binary digital converter.
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Circuit Diagrams:
Fig 1: Binary weighted resistor DAC
Fig 2: R – 2R Ladder DAC
Design: 1. Weighted Resistor DAC
b b b b Vo = -Rf A B c D 8R 4 R 2 R R
For input 1111, Rf = R = 4.7KΩ Vo = -
Rf 1 1 1 1 x5 8 4 2 R
Vo = - 9.375 V
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2.R-2R Ladder Network:
b b b b Vo = -Rf A B c D 16 R 8R 4 R 2 R
X5
For input 1111, Rf = R= 1KΩ
Procedure: 1. Connect the circuit as shown in Fig 1. 2. Vary the inputs A, B, C, D from the digital trainer board and note down the output at pin 6. For logic ‘1’, 5 V is applied and for logic ‘0’, 0 V is applied. 3. Repeat the above two steps for R – 2R ladder DAC shown in Fig 2.
Observations: Weighted resistor DAC S.No
D
C
B
A
Theoretical
Practical Voltage(V)
Voltage(V)
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R-2R Ladder Network: S.No
D
C
B
A
Theoretical
Practical Voltage(V)
Voltage(V)
Model Graph: Decimal Equivalent of Binary inputs
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Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Results:
Inferences: Different types of digital-to-analog converters are designed.
Questions & Answers:
1. How do you obtain a positive staircase waveform?
2. What are the drawbacks of binary weighted resistor DAC?
3. What is the effect of number of bits on output ?
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OTHER EXPERIMENTS 16. VOLTAGE- TO- CURRENT CONVERTER
Aim: To design voltage to current converter with floating load and grounded load using op amp
Apparatus required:
S.No
Equipment/Component
Specifications/Value Quantity
name 1
741 IC
Refer page no 2
1
2
Resistors
10 KΩ
5
1KΩ
1
3
Regulated Power supply
(0-30V),1A
1
4
Multimeter
3 ½ digit display
1
5
Ammeter
(0 – 30) μA
1
6
Digital trainer Board
1
Theory:In many applications we must convert the given voltage into current. The two types of voltage to current converters are 1. V to I converters with floating load 2. V to I converters with grounded load. Floating load V – I converters are used as low voltage ac and dc voltmeters, diode match finders, light emitting diodes and zener diode testers. V to I converters Grounded load are used in testing such devices as zeners and LEDs forming a ground load.
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Circuit Diagrams:-
Fig 1: V – I converter with floating load
Fig 2: V – I converter with grounded load
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Design: V – I converter with floating load Vin = Vid + Vf where Vid is input difference voltage and Vf is the feedback voltage But Vid = 0 Vin = Vf = R1RL IL = Vin/RL V – I converter with grounded load I1+I2=IL (Vin-V1)/R+(Vo-V1)/R=IL Vin+Vo-2Vi=ILR Since op-amp is non inverting Gain=1+(R/R)=2 Vo=2Vi Vin=Vo-Vo+ILR IL=Vin/R
Procedure:V – I converter with floating load 1. Connect the circuit as per the circuit diagram in Fig 1. 2. Apply input voltage to the non-inverting terminal of 741. 3. Observe the output from CRO and note down the ammeter reading for various values of input voltage. V – I converter with grounded load 1. Connect the circuit as per the circuit diagram shown in Fig 2. 2. Set ac input to any desired value. 3. Switch on the dual trace supply and note down the readings of ammeter 4. Repeat the above procedure for varies values input voltages.
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Sample readings: V – I converter with floating load
Vin(V)
Current (mA) RL=1KΩ
RL=10KΩ
V – I converter with grounded load
Vin
Current(mA)
Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
Results:
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Inferences: Different types of V-I converters are designed.
Questions & Answers:
1. What is the effect of RL on the output current in V-to-I converter with
floating load?
2. What is the effect of R on the output current in V-to-I converter with
grounded load?
3. For what ranges of currents the circuits are useful?
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17. PRECISION RECTIFIER Aim: To obtain a precision rectifier (half wave rectifier using IC 741).
Apparatus required:
S.No
Equipment/Component
Specifications/Value
Quantity
name 1
741 IC
Refer page no 2
1
2
Resistors
10 KΩ
5
1KΩ
1
3
Regulated Power supply
(0-30V),1A
1
5
Cathode Ray Oscilloscope
(0-20MHz)
1
6
Digital trainer Board
1
Theory: There are two types of half wave rectifiers. One is inverting half wave rectifier and second one is non-inverting half wave rectifier. The below circuit show the non-inverting half wave rectifier with diode (0A79) in the feed back loop of an op-amp.
Circuit diagram:
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Procedure: 1. Connect the circuit as per the circuit diagram. 2. Give the sinusoidal input of 100mVp-p, 1 KHz from function generator. 3. Switch on the dual power supply of + 15V. 4. Note down the output from CRO.
Model Graphs:
Fig.a) Input waveform to the half wave rectifier b ) Output to (a)
Sample readings: Parameter
Input
Output
Amplitude (V),Vp-p Time period (ms)
Precautions: Check the connections before giving the power supply. Readings should be taken carefully.
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Results:
Inferences: Precision half-wave rectifier is obtained by using IC 741.
Questions & Answers:
1. What is the output if the diode is reversed?
2. What is a super diode?
3. What is precision rectifier?
4. What modifications you suggest to get negative half cycles at output?
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18. CLIPPER CIRCUITS USING IC 741
Aim: To obtain the clipped waveforms of the input using IC741.
Apparatus required:
S.No
Equipment/Component
Specifications/Value Quantity
name 1
741 IC
Refer page no 2
1
2
Resistors
10 KΩ
1
3
Regulated Power supply
(0-30V),1A
1
4
Function generator
(0-1MHz)
1
5
Diode
0A79
1
6
Cathode Ray Oscilloscope
(0-20MHz)
1
Theory: A positive clipper is a circuit that removes positive parts of the input signal. In this circuit the op-amp is basically used as a voltage follower with a diode in the feed back path. The clipping level is determined by the reference voltage Vref which should be less than input voltage range of op-amp. Additionally since Vref is derived from the positive supply voltage, dc supply voltage is well regulated.
During the positive half cycle of the input, the diode(IN4007) conducts only until Vin =Vref. This happens because Vin < V ref the voltage Vref at ‘-‘ve input is higher than that at the ‘+’ve input. Hence the output voltage Vo’ the op-amp become sufficiently negative to drive D1 into conducting. When D1 conducts it closes the feed back loop and opamp operates as a voltage follower i.e. output Vo follows input Vin until Vin =Vref.
Circuit diagrams:
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Fig 1: Positive Clipper
Fig 2: Negative Clipper
Procedure:
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Positive clipper 1. Connect the circuit as per the circuit diagram shown in Fig 1. 2. Apply the reference voltage of 1V. 3. Apply a 6Vp-p of sine wave as input. 4. Note down the output waveform as shown in Fig 3(a) and 3(b). Negative clipper 1. Connect the circuit as per the circuit diagram shown in Fig 2. 2. Apply the reference voltage of 1V. 3. Apply a 6Vp-p of sine wave as input. 4. Note down the output waveform as shown in Fig 3(c) and 3(d).
Waveforms:
Positive clipper
Fig 3 (a) : Input wave form (b) : output wave form
Negative clipper
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Fig 3 (c): Input 3 (d): output Sample readings:
a) Positive clipper Parameter
Input Voltage
Output Voltage
Input Voltage
Output Voltage
Amplitude (V),Vp-p Time period (ms)
b) Negative clipper Parameter Amplitude (V), Vp-p Time period (ms)
Precautions: 1.Check the connections before giving the power supply. 2. Readings should be taken carefully.
Result:
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Inferences: The application of IC 741 as a clipper is observed.
Questions & Answers:
1. What is the effect of Vref on the output?
2. How do you change a positive clipper into negative clipper?
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APPENDIX-A IC723
Pin Configuration:
Specifications of 723:
Power dissipation
:
1W
Input Voltage
:
9.5 to 40V
Output Voltage
:
2 to 37V
Output Current
:
150mA for Vin-Vo = 3V 10mA for Vin-Vo = 38V
Load regulation
:
0.6% Vo
Line regulation
:
0.5% Vo
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APPENDIX-B
Pin Configurations:
78XX
79XX
Plastic package Typical parameters at 25oC:
Parameter
LM 7805
LM 7809
LM 7912
Vout,V
5
9
-12
Imax,A
1.5
1.5
1.5
Load Reg,mV
10
12
12
Line Reg,mV
3
6
4
Ripple Rej,dB
80
72
72
Dropout
2
2
2
Rout,mΩ
8
16
18
ISL,A
2.1
0.45
1.5
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REFERENCES
1. D.Roy Choudhury and Shail B.Jain, Linear Integrated Circuits, 2nd edition, New Age International. 2. James M. Fiore, Operational Amplifiers and Linear Integrated Circuits: Theory and Application, WEST. 3. Malvino, Electronic Principles, 6th edition, TMH 4. Ramakant A. Gayakwad, Operational and Linear Integrated Circuits,4th edition, PHI. 5. Roy Mancini, OPAMPs for Everyone, 2nd edition, Newnes. 6. S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd edition, TMH. 7. William D. Stanley, Operational Amplifiers with Linear Integrated Circuits, 4th edition, Pearson. 8. www.analog.com
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