Computer Organization I Lecture 3: von Neumann Architecture (Part II)
von Neumann Architecture
Overview
Last Lecture (Part I of von Neumann Computer) Basic Principle of von Neumann computer Structure and Operation of Memory Subsystem This Lecture (Part II of von Neumann Computer) Machine Language Instruction Instruction Processing
Objectives
Familiar with von Neumann instruction set
Familiar with von Neumann instruction processing
Be able to write a simple program using von Neumann machine language instruction set
von Neumann Architecture - what is control unit subsystem? Machine Language Instructions (cont.) • A machine language instruction = Opcode + Operands • For Example: ADD X, Y, in which ADD is Opcode, X and Y is Operands • Opcode “ADD” tell the ALU to execute the add function • X and Y is the address of memory cell • So, execute “ADD X,Y” means “ADD content of memory locations X and Y, and store back in memory location Y”.
von Neumann Architecture - what is control unit subsystem? Machine Language Instructions (cont.) • suppose X=4 and Y=6, con(X) = 6 and con (Y) =2 • After execute the instruction ADD X,Y… before execute instruction
X Y
000 001 010 011 100 101 110 111
0000 0000 0000 0000 0000 0000 0000 0000 0000 0110 0000 0000 0000 0010 0000 0000
after execute instruction
Content of address X is 6 Content of address Y is 2
von Neumann Architecture - what is control unit subsystem? Instruction Set Design – Reduced Instruction Set Computers (RISC) • Instruction set as small and simple as possible. • Minimizes amount of circuitry --> faster computers – Complex Instruction Set Computers (CISC) • More instructions, many very complex • Each instruction can do more work, but require more circuitry.
von Neumann Architecture - what is control unit subsystem? Typical Machine Instructions • Notation: – We use X, Y, Z to denote address of RAM cells – Assume only one register R (for simplicity) – Use English-like descriptions (should be binary) • Data Transfer Instructions – LOAD X Read content of memory location X to R – STORE X Write content of R to memory location X – MOVE X, Y Copy content of memory location X to location Y
von Neumann Architecture - what is control unit subsystem? Typical Machine Instructions (cont.) For example: LOAD X means read the content of memory location X to register R Suppose X=2, and memory with address 4 is assigned as R memory space
X
register R
000 001 010 011 100 101
0000 0000 0000 0110 0011 0000 0000 0000 0000 0000 0000 0000
after execute instruction
000 001 010 011 100 101
0000 0000 0000 0110 0011 0000 0000 0000 0011 0000 0000 0000
von Neumann Architecture - what is control unit subsystem? Typical Machine Instructions (cont.) • Arithmetic – ADD X, Y, Z CON(Z) = CON(X) + CON(Y) – ADD X, Y CON(Y) = CON(X) + CON(Y) – ADD X R = CON(X) + R – similar instructions for other operators, e.g. SUBTR,OR, ... • Compare – COMPARE X, Y Compare the content of memory cell X to the content of memory cell Y and set the condition codes (CCR) accordingly.
von Neumann Architecture - what is control unit subsystem? Typical Machine Instructions (cont.) For example: Compare X, Y means “compare the content of memory cell X to the content of memory cell Y and then set the condition codes (CCR) accordingly.
Suppose X=2, Y=4, and address 5 is assigned as CCR memory space
X
Y CCR
000 001 010 011 100 101
0000 0000 0000 0110 0000 1000 0000 0000 0000 0000 0000 0000
after execute instruction
con(X)=8,con(Y)=0,and the logic result of compare instruction is true, the second bit in CCR is the flag of “greater than”, it set to 1 if greater than is true
101
0000 0010
von Neumann Architecture - what is control unit subsystem? Typical Machine Instructions (cont.) • Branch – JUMP X
Load next instruction from memory location X – JUMPGT X Load next instruction from memory location X only if GT flag in CCR is set, otherwise load statement from next sequence location as usual – JUMPEQ, JUMPLT, JUMPGE, JUMPLE,JUMPNEQ
• Control – HALT
Stop program execution.
von Neumann Architecture - what is control unit subsystem? An Example using Machine Instruction • Pseudo-code: Set A to B + C • Assuming variable: – A stored in memory cell 1, B stored in memory cell 2, C stored in memory cell 3, and address 4 is assigned to register R – How to use machine 000 language instruction 001 A to implement “set A 010 B to B + C”? 011 C LOAD 2 register R 100 0000 0000 ADD 3 101 STORE 1
von Neumann Architecture - what is control unit subsystem? An Example using Machine Instruction (cont.) 000 001
register R
010 011 100 101
000 001
A B C 0000 0000
LOAD 2
010 011 100 101
A B C B
von Neumann Architecture - what is control unit subsystem? An Example using Machine Instruction (cont.) 000 001
register R
010 011 100 101
000 001
A B C B
ADD 3
010 011 100 101
A B C B+C
von Neumann Architecture - what is control unit subsystem? An Example using Machine Instruction (cont.) 000 001
register R
010 011 100 101
– STORE X
A B C B+C
000 001 010 STORE 1 011 100 101
B+C B C B+C
Load content of R to memory location X
von Neumann Architecture - what is structure of control unit subsystem? • PC (Program Counter): – stores the address of next instruction to fetch • IR (Instruction Register): – stores the instruction fetched from memory • Instruction Decoder: – Decodes instruction and activates necessary circuitry
PC +1
IR
Instruction Decoder
von Neumann Architecture - what is structure of control unit subsystem? An Example about PC Register and IR register Suppose address 4 is assigned to PC register and address 5 is assigned to IR register 1111 0000 0001 0001
PC Register IR Register
0000 0000 0000 0001
0000 0000 0000 0110
0000 0010 0000 0011 0000 0100 0000 0101
0011 0000 0000 0010 1111 0000 0001 0001
Binary code of instruction e.g. LOAD X means instruction LOAD X
von Neumann Architecture - what is control unit subsystem? Instruction Processing Fetch instruction from memory Decode instruction Evaluate address Fetch operands from memory Execute operation Store result
von Neumann Architecture - what is control unit subsystem? Example: Instruction Processing of ADD X,Y • ADD X,Y means “add content of memory locations X and Y, and store back in memory location Y”. • Instruction ADD X,Y stored in memory as: 0000100100110100 ADD
X
Y
0000 1001
0011
0100
von Neumann Architecture - what is control unit subsystem? • suppose address 4 is assigned to MAR (memory address register), address 5 is assigned to MDR (memory data register), address 6 is assigned to IR (instruction register) and address 63 is assigned to PC (program counter) register MA R
0000 0100
MD R
0000 0101
IR
0000 0110
PC
0011 1111
0000 0000 0000 0110 0000 0000 0000 0000 0000 0000 0000 1001 0000 0000 1111 1111
Location of instruction program ADD X,Y
0000 0000 1111 1111
00001001 00110100
von Neumann Architecture - what is control unit subsystem? Instruction Processing: FETCH • Load next instruction ADD (at address stored in PC) from memory into Instruction Register (IR) MA R
0000 0100
MD R
0000 0101
IR PC
0000 0000 0110 0110 0011 1111
0000 0000 0000 1111 0000 1111 0000 0000 1001 0000 0100 0000 0011 0000 0000 1001 0000 0011 0000 0100 1001 0000 0001 0000 0000 1111 0000 1111
1. Load contents of PC into MAR. 2. Copy the content of memory cell with specified address “11111111” into MDR 3. Read the content of MDR to IR 4. increment PC to PC+1 to point the next instruction in sequence.
von Neumann Architecture - what is control unit subsystem? Instruction Processing: DECODE FF
• First identify the opcode in IR, e.g. the first 8 bits 0000 1001 means ADD under the defined instruction set ADD
X
Y
0000 1001
0011
0100
D D
EA EA
OP OP
• Depending on opcode, identify other opreands from the remaining bits, e.g. the address of X is 0011 the address of Y is 0100
EX EX
S S
von Neumann Architecture - what is control unit subsystem? Instruction Processing: Evaluate Address FF
• For instructions that require memory access, compute address used for access no address evaluation (calculation) for ADD since we know the result will be stored in Y Y
0000 0011 0000 0100 0000 1001 0011 1111
0000 0000 0000 0000 0000 0000 0000 0000
D D
EA EA
OP OP
EX EX
S S
von Neumann Architecture - what is control unit subsystem? Instruction Processing: FETCH OPERANDS FF
• Obtain source operands needed to perform ADD operation
D D
e.g. read the content of X and Y to MDR EA EA
X Y
MD R
0000 0011 0000 0100 0000 1001 1100 0000
0000 0000 0000 0000 0000 0000 0000 0000
OP OP
EX EX
S S
von Neumann Architecture - what is control unit subsystem? Instruction Processing: EXECUTE FF
• Perform the operation using the source operands e.g. Obtain the content of MDR and then send them to ALU for calculation
D D
EA EA
OP OP
EX EX
S S
von Neumann Architecture - what is control unit subsystem? Instruction Processing: STORE FF
• Write results to destination (register or memory) e.g. result of ADD X,Y will be placed in destination Y
D D
EA EA
X Y
0000 0011 0000 0100 0000 1001 1100 0000
0000 0000 0000 0000 0000 0000 0000 0000
OP OP
EX EX
S S
von Neumann Architecture
von Neumann Architecture - instruction set of von Neumann machine? Opcode 0000 0001 0010 0011 0100 0101 0101
Operation LOAD X STORE X CLEAR X ADD X INCREMENT X SUBTRACT X DECREMENT X COMPARE X
Meaning CON(X) --> R R --> CON(X) 0 --> CON(X) R + CON(X) --> R CON(X) + 1 --> CON(X) R - CON(X) --> R CON(X) - 1 --> CON(X)
JUMP X JUMPGT X JUMPxx X IN X OUT X HALT
Get next instruction from memory location X Get next instruction from memory loc. X if GT=1 xx = LT / EQ / NEQ Input an integer value and store in X Output, in decimal notation, content of mem. loc. X Stop program execution
0111 1000 1001 ... 1101 1110 1111
If CON(X) > R then GT = 1 else 0 If CON(X) = R then EQ = 1 else 0 If CON(X) < R then LT = 1 else 0
Summary
• Principle of von Neumann Computer • Basics of Machine Language Instruction Set • Instruction Processing of von Neumann Computer
Thank you Q&A
