ovon-neumann Architecture oinstruction execution in Von Neumann Architecture ovon Neumann Architecture s limitation oharvard Architecture

oVon-Neumann Architecture oInstruction execution in Von Neumann Architecture oVon Neumann Architecture’s limitation oHarvard Architecture Muhammad Am...
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oVon-Neumann Architecture oInstruction execution in Von Neumann Architecture oVon Neumann Architecture’s limitation oHarvard Architecture

Muhammad Amir Yousaf

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VON NEUMANN ARCHITECTURE Von Neumann, a mathematician and early computer scientist described a design architecture for electronic digital computer.

He was the first to spell out the requirements for a general purpose electronic computer. The architecture is still alive in the basis of modern computers

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VON NEUMANN ARCHITECTURE To Von Neumann, the key to building a general purpose device was in its ability to store the instructions (along with data and temporary results) in it. In a special purpose machine the computational procedure could be part of the hardware. In General purpose computers instructions must be changeable. Instruction are encoded into numeric form and stored in memory

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VON NEUMANN ARCHITECTURE Major organs of Von Neumann architecture: Memory o The arithmetic logic unit o The control unit o The memory o The input-output devices

Control Unit

ALU

Input / Output

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VON NEUMANN ARCHITECTURE Von Neumann general purpose computer is a programmable machine that:

o Store a set of coded instruction along with data in its memory. o Respond to instructions in a well defined manner(sequential or told otherwise).

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INSTRUCTION AND PROGRAM o Set of instruction is called program. o Memory can be loaded with new programs.

An instruction is a binary coded command to perform a specific task:

o Arithmetic and Logic Instruction. o Looping and decision making. o Transfer of data. o Transfer of control.

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EXECUTION OF INSTRUCTION Instruction execution in Von Neumann computer oGet the coded instruction. oDecode the instruction. oGet the operand. oPerform the desired operation. oCommunicate the results back.

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COMPONENTS OF VON NEUMANN COMPUTER o Memory: to store program and data. o Program Counter: to execute instructions in order. oInstruction Decoder: to decode the binary coded instructions.

oArithmetic Logic Unit: to perform logical and arithmetic operations.

Instruction Decoder

Program counter

Memory Input / Outputs ALU

oInputs/Outputs: to give the results back i. Respond Store a set toof instructions coded instruction in a well along with defined manner(sequential data in its memory. or told oRegisters: Temporary data storage otherwise).

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INSTRUCTION FORMAT Instruction Format

Opcode 0

Operand1 3

Operand2

4

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Instruction: Add with register Opcode : 0011 or 3 Operand : address of memory location, register or constant Muhammad Amir Yousaf

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VON NEUMANN ARCHITECTURE CPU Execution unit

Memory

ALU Both data and instructions at the same system bus

Registers

BU IR

PC

IO units

Controller Control unit

System bus

EXECUTION UNIT The number of bits in the execution unit usually denotes the processor’s size For example an 8-bit processor stores 8-bits in registers and performs 8-bit operations in the ALU.

The execution unit comprise: - ALU Aritmethic Logic Unit Performs arithmetic (+-*/) and logical calculations - Registers Intermediate storing of results

Processor

Execution unit ALU

Registers

BU IR PC Controller Controller unit

2N is the number of adressable memory positions

Bus unit Processor Execution unit

Address (N-1:0) Data (M-1:0)

ALU

Registers

Control BU IR Request Acknowlege Read/Write Etc.

PC System bus Unique signals for

each processor bus

Controller Control unit

CONTROL UNIT, REGISTERS Processor The control unit comprise of:

Execution unit

- IR, the instruction register stores the instruction that is executed - PC, the program counter stores the adress to the executing instruction - Controller, controls the other parts (registers, bus unit och execution unit

ALU

Registers

BE IR PC

Controller Control unit

INSTRUCTION EXECUTION ADD $23,reg1

Processor

Data (opcode) 0011 (03) from memory, equalizes the instruction ADD

Execution unit

Memory 10: 0|0|1|1| 0|0|0|0| 0|0|0|1| 0|1|1|1| … 03 $23,reg1 23: $55

Set the address bus to 10, the control bus to read

ALU BU

IO units Read data from address 10 of program space. Fetch instruction

Registers

IR:03

PC: 10 Controller Control unit

INSTRUCTION EXECUTION ADD $23,reg1

Processor

Execution unit

Memory 10: 0|0|1|1| 0|0|0|0| 0|0|0|1| 0|1|1|1| … 03 $23,reg1 23: $55

ADD $23,reg1 is the instruction that is to be executed

ALU BU

Registers

Decode the machine code 3 to an instruction

IR: 03… PC: 10

IO units

Controller ADD $23,reg1

Instruction decoder

Control unit Fetch instr.

Decode instr.

$3

INSTRUCTION EXECUTION ADD $23,reg1

Value from reg1

Processor

Data ($55) from memory

Execution unit

Memory 10: 0|0|1|1| 0|0|0|0| 0|0|0|1| 0|1|1|1| … 03 $23,reg1 23: $55

ALU

Registers

BU Set the address bus to $23, the control bus to read

IR PC: 10

IO units Read data from address $23 Fetch instr.

Decode instr.

Fetch operand

Controller Control unit ADD $23,reg1

INSTRUCTION EXECUTION

The content in memory position ($23)=55 is added with the content in reg1: reg1 +$55

ADD $23,reg1

Processor

Exekveringsenhet

Memory 10: 0|0|1|1| 0|0|0|0| 0|0|0|1| 0|1|1|1| … 03 $23,reg1 23: $55

ALU

Registers

BU IR PC: 10

IO units Add reg1 and value from memory Fetch instr.

Decode instr.

Fetch operand

Controller Control unit Execute

INSTRUCTION EXECUTION

The result of the addition is written to register reg1 reg1 +$55 => reg1 Processor

ADD $23,reg1

Exececution unit

Memory 10: 0|0|1|1| 0|0|0|0| 0|0|0|1| 0|1|1|1| … 03 $23,reg1 23: $55

ALU

Registers

BU IR PC: 10

IO units Save the result in register reg1 Fetch instr.

Decode instr.

Fetch operand

Controller Control unit Execute

Write result

INSTRUCTION EXECUTION Processor

ADD $23,reg1

Execution unit

Memory 10: $73 (ADD $23,reg1) … 23: $55

ALU

Registers

BU IR PC: 10

IO units

Controller Control unit Fetch instr.

Decode instr.

Fetch operand

Execute

Write result

VON NEUMANN LIMITATION The shared bus between the program memory and data memory leads to the Von Neumann bottleneck.  Because program memory and data memory cannot be accessed at the same time, throughput is much smaller than the rate at which the CPU can work. The CPU is continuously forced to wait for needed data to be transferred to or from memory. For example if we try to read an operand at the same time as we try to read an instruction. This is not possible in the von Neumann architecture since we only have one system bus and cannot address two memory positions simultaneously.

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Other Architectures

HARVARD ARCHITECTURE In the Harvard architecture this is solved by having two separate system buses: oOne for instructions oOne for data oData and instructions can be loaded simultaneously, which improves the efficiency.

Program Memory

Program system Bus

CPU

Computer Memory

Data system Bus

Means more I/O signals. oMore expensive processor. oUses more power. Is used internally in modern 32-bit microprocessors and RISC processors.

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IOs

MICROPROCESSOR SYSTEM DESIGN General Purpose Computer e.g PC A general-purpose computer, such as a personal computer (PC), is designed to be flexible and to meet a wide range of end-user needs.

Embedded Systems An embedded system is designed and optimized to perform a specific task very efficiently.

They are different in: o Resources o Real time. o Robustness o Outer world interaction (IOs) o Program structure

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MICROPROCESSOR SYSTEM DESIGN Embedded Systems

Microprocessor based systems:

An embedded system is designed and optimized to perform a specific task very efficiently.

A microprocessor is an integrated implementation of central processing unit portion (CPU). Use separate integrated circuits for memory and peripherals.

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MICROPROCESSOR SYSTEM DESIGN Embedded Systems

Microcontroller based systems:

An embedded system is designed and optimized to perform a specific task very efficiently.

A microcontroller brings together a microprocessor core and a rich collection of peripherals and IO capability into single integrated circuit. Reduces cost and size. Timers, ADC, DAC, DIO, serial and parallel communication channels, DMA Muhammad Amir Yousaf

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INSTRUCTION ADDRESSING MODES Instruction Architecture

Opcode 0

Operand1 3

Operand2

4

Instruction: Add with register Opcode : 0011 or 3 Operand : address of memory location, register or constant

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RISC vs CISC Addressing modes

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Components in a microprocessor system

PROCESSOR TYPES: CISC (Complex Instruction Set Computer) oThe primary goal of CISC architecture is to complete a task in as few lines of assembly as possible. oThis is achieved by building processor hardware that is capable of understanding and executing a series of operations. o"MULT“. When executed, this instruction loads the two values into separate registers, multiplies the operands in the execution unit, and then stores the product in the appropriate register. Thus, the entire task of multiplying two numbers can be completed with one instruction: oMULT 2:3, 5:2 Muhammad Amir Yousaf

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Components in a microprocessor system

REDUCED INSTRUCTION SET COMPUTING RISC (Reduced Instruction Set Computer) oRISC processors only use simple instructions that can be executed within one clock cycle. o Thus, the "MULT" command described above could be divided into three separate commands: oLOAD, which moves data from the memory bank to a register, oPROD, which finds the product of two operands located within the registers. oSTORE, which moves data from a register to the memory banks. oA programmer would need to code four lines of assembly: LOAD A, 2:3 LOAD B, 5:2 PROD A, B STORE 2:3, A

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Components in a microprocessor system

MEMORY:  To store data or instructions the computer system uses a socalled primary memory The executable program code and data is stored in main memory. The primary memory is divided in two main parts

The memory can be seen as a number of post boxes

o RAM o ROM

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Von Neumann Architecture

MICROCONTROLLERS What does a computer system comprise: oProcessor (CPU, Central Processing Unit) oMemory oPeripheral units, I/O oSystem bus, to communicate with peripheral units

If we have a chip that comprise all this it is often called a ‘Micro Controller’

Muhammad Amir Yousaf

Primary Memory

RAM

CPU ROM I/O unit

The outer world/ The user

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Components in a microprocessor system

PROCESSOR SYSTEM BUS  Data bus oCommunication channel to move data to and from CPU and peripheral units.

 Address bus oUsed to point out which memory position or IO port that is to be read or written.

 Control signals o Used to signal when a data transaction starts and stops. o For example signals if a transaction is a read or write operation.

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REFERENCES Lecture slides: Benny Thörnberg, Mattias O’ Nils Video Lecture: Prof. Anshul Kumar http://www.computersciencelab.com/ComputerHistory/History.htm Webopedia http://www.world-war-2-planes.com/american-world-war-2-planes.html (slide 12) http://www.anvari.org/cols/Typewritter_ASCII_Art/Steam_Engine_Number_3.html (slide 10)

http://www.old-computers.com/history/detail.asp?n=61 (slide 15) http://www.freewebs.com/computingstudies/S1_UT_Systems/S1UTSystems_07.ht m http://www.computer-museum.org/index.html http://www.ucdsb.on.ca/school/sla/aboutus/Pages/ExamSchedule.aspx http://www.youtube.com/watch?v=AqbyMRs3ocs Camera Pills Use MEMS Micro Reed Sensors to Activate the Battery http://en.wikipedia.org/wiki http://www-cs-faculty.stanford.edu/~eroberts/courses/soco/projects/risc/risccisc/

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