CHENNAI INSTITUTE OF TECHNOLOGY DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

LAB MANUAL

CS6412 MICROPROCESSOR AND MICROCONTROLLER

Programs 8-Bit Addition

loop-1:

MOV MOV MOV ADD JNC INC MOV MOV HLT

AL, [1100H] BL, [1101H] CL, 00H AL, BL loop-1 CL [1200H], AL [1201H], CL

8-Bit Subtraction

loop-1:

MOV MOV MOV SUB JNC INC MOV MOV HLT

AL, [1100H] BL, [1101H] CL, 00H AL, BL loop-1 CL [1200H], AL [1201H], CL

8-Bit Multiplication MOV MOV MOV MUL MOV HLT

AL, [1100H] BL, [1101H] AH, 00H BL [1200H], AX

MOV MOV MOV DIV MOV HLT

AL, [1100H] BL, [1101H] AH, 00H BL [1200H], AX

8-Bit Division

CS6412

MPMC Lab

Ex. No. 1 Date: Aim:

8-BIT ARITHMETIC OPERATIONS

To write an assembly language program to perform an addition, subtraction, multiplication and division of two 8-bit numbers using 8086 microprocessor kit.

Algorithm Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7:

8-Bit Addition Get two 8-bit data from the input memory locations to AL and BL registers. Clear CL register to store the carry condition. Add the contents of BL to AL register and store the result in AL. Check carry flog, If CF = 0 then go to step 6. Increment CL register by 1. Store the contents of sum and carry to output memory locations. Stop the execution.

Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7:

8-Bit Subtraction Get two 8-bit data from the input memory locations to AL and BL registers. Clear CL register to store the carry condition. Subtract the contents of AL from BL register and store the result in AL. Check carry flog, If CF = 0 then go to step 6. Increment CL register by 1. Store the contents of sum and carry to output memory locations. Stop the execution.

Step 1: Step 2: Step 3: Step 4: Step 5:

8-Bit Multiplication Get two 8-bit data from the input memory locations to AL and BL registers. Clear AH register to store the higher order product. Multiply the contents of BL with AL register and store the product in AX. Store the contents of product to output memory locations. Stop the execution.

Step 1: Step 2: Step 3: Step 4: Step 5:

8-Bit Division Get two 8-bit data from the input memory locations to AL and BL registers. Clear AH register to store the reminder. Divided the contents of BL from AL register and store thequiescentin AX. Store the contents of reminder and quiescent to output memory locations. Stop the execution.

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MPMC Lab

CS6412

Program with opcode 8-Bit Addition Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H

Label

Mnemonics MOV AL, [1100 H] MOV BL, [1101H]

MOV CL, 00H ADD AL, BL JNC loop-1 INC CL loop-1

MOV [1200 H], AL MOV [1201H], CL

HLT

Opcodes A0 00 11 8A 1E 01 11 B1 00 02 C3 73 02 FE C1 A2 00 12 88 0E 01 12 F4

Comments (AL)  [1100 H]

Opcodes

Comments

(BL)  [1101H]

(CL)  00H (AL)  (AL) + (BL) If CF=0, then go to loop-1 (CL) (CL) + 1 [1200 H](AL) [1201H](CL)

Stop the execution

8-Bit Subtraction Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H

2

Label

Mnemonics MOV AL, [1100 H]

MOV BL, [1101H]

MOV CL, 00H SUB AL, BL JNC loop-1 INC CL loop-1

MOV [1200 H], AL

MOV [1201H], CL

HLT

A0 00 11 8A 1E 01 11 B1 00 2A C3 73 02 FE C1 A2 00 12 88 0E 01 12 F4

(AL)  [1100 H]

(BL)  [1101H]

(CL)  00H (AL)  (AL) - (BL) If CF=0, then go to loop-1 (CL) (CL) + 1 [1200 H](AL)

[1201H](CL)

Stop the execution

CS6412

MPMC Lab

8-Bit Multiplication Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H

Label

Mnemonics MOV AL, [1100 H] MOV BL, [1101H]

MOV AH, 00H MUL BL MOV [1200 H], AX HLT

Opcodes A0 00 11 8A 1E 01 11 B4 00 F6 E3 A3 00 12 F4

Comments (AL)[ 1100 H]

Opcodes A0 00 11 8A 1E 01 11 B4 00 F6 F3 A3 00 12 F4

Comments (AL)[ 1100 H]

(BL)[ 1101H]

(AH)00H (AX)(AL) * (BL) [1200 H] (AX) Stop the execution

8-Bit Division Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H

Label

Mnemonics MOV AL, [1100 H] MOV BL, [1101H]

MOV AH, 00H DIV BL MOV [1200 H], AX HLT

(BL)[ 1101H]

(AH)00H (AX)(AL) / (BL) [1200 H] (AX) Stop the execution

3

MPMC Lab

CS6412

8-Bit Addition Input Address 1100H 1101H

Output Data

1100H 1101H

Address 1200H 1201H

Data

1200H 1201H

8-Bit Subtraction Input Address 1100H 1101H

Output Data

1100H 1101H

Address 1200H 1201H

Data

1200H 1201H

8-Bit Multiplication Input Address 1100H 1101H

Output Data

1100H 1101H

Address 1200H 1201H

Data

1200H 1201H

8-Bit Division Input Address 1100H 1101H 1100H 1101H

4

Output Data

Address 1200H 1201H 1200H 1201H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

5

MPMC Lab

Programs 16-Bit Addition

loop-1:

MOV MOV MOV ADD JNC INC MOV MOV HLT

AX, [1100H] BX, [1102H] CL, 00H AX, BX loop-1 CL [1200H], AX [1202H], CL

16-Bit Subtraction

loop-1:

MOV MOV MOV SUB JNC INC MOV MOV HLT

AX, [1100H] BX, [1102H] CL, 00H AX, BX loop-1 CL [1200H], AX [1202H], CL

16-Bit Multiplication MOV MOV MOV MUL MOV MOV HLT

AX, [1100H] BX, [1102H] DX, 0000H BX [1200H], AX [1202H], DX

MOV MOV MOV DIV MOV MOV HLT

AX, [1100H] BX, [1102H] DX, 0000H BX [1200H], AX [1202H], DX

16-Bit Division

6

CS6412

CS6412

MPMC Lab

Ex. No. 2 Date: Aim:

16-BIT ARITHMETIC OPERATIONS

To write an assembly language program to perform an addition, subtraction, multiplication and division of two 16-bit numbers using 8086 microprocessor kit.

Algorithm Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 1: Step 2: Step 3: Step 4: Step 5: Step 1: Step 2: Step 3: Step 4: Step 5:

16-Bit Addition Get two 16-bit data from the input memory locations to AX and BX registers. Clear CL register to store the carry condition. Add the contents of BX to AX register and store the result in AX. Check carry flog, If CF = 0 then go to step 6. Increment CL register by 1. Store the contents of sum and carry to output memory locations. Stop the execution. 16-Bit Subtraction Get two 16-bit data from the input memory locations to AX and BX registers. Clear CL register to store the carry condition. Subtract the contents of AX from BX register and store the result in AX. Check carry flog, If CF = 0 then go to step 6. Increment CL register by 1. Store the contents of sum and carry to output memory locations. Stop the execution. 16-Bit Multiplication Get two 16-bit data from the input memory locations to AX and BX registers. Clear DX register to store the higher order product. Multiply the contents of BX with AX register and store the product in DX and AX. Store the contents of product to output memory locations. Stop the execution. 16-Bit Division Get two 16-bit data from the input memory locations to AX and BX registers. Clear DX register to store the reminder. Divided the contents of BX from AX register and store thequiescentin AX. Store the contents of reminder and quiescent to output memory locations. Stop the execution.

7

MPMC Lab

CS6412

Program with opcode 16-Bit Addition Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H

Label

Mnemonics MOV AX, [1100 H] MOV BX, [1102 H]

MOV CL, 00H ADD AX, BX JNC loop-1 INC CL loop-1

MOV [1200 H], AX MOV [1202 H], CL

HLT

Opcodes A1 00 11 8B 1E 02 11 B1 00 03 C3 73 02 FE C1 A3 00 12 88 0E 02 12 F4

Comments (AX)  [1100 H]

Opcodes A1 00 11 8B 1E 02 11 B1 00 2B C3 73 02 FE C1 A3 00 12 88 0E 02 12 F4

Comments (AX)  [1100 H]

(BX)  [1102 H]

(CL)  00H (AX)  (AX) + (BX) If CF=0, then go to loop-1 (CL) (CL) + 1 [1200 H](AX) [1202 H](CL)

Stop the execution

16-Bit Subtraction Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H

8

Label

Mnemonics MOV AX, [1100 H]

MOV BX, [1102 H]

MOV CL, 00H SUB AX, BX JNC loop-1 INC CL loop-1

MOV [1200 H], AX

MOV [1202 H], CL

HLT

(BX)  [1102 H]

(CL)  00H (AX)  (AX) - (BX) If CF=0, then go to loop-1 (CL) (CL) + 1 [1200 H](AX)

[1202 H](CL)

Stop the execution

CS6412

MPMC Lab

16-Bit Multiplication Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H

Label

Mnemonics MOV AX, [1100 H] MOV BX, [1102 H]

MOV DX, 0000H MUL BX MOV [1200 H], AX MOV [1202 H],DX

HLT

Opcodes A1 00 11 8B 1E 02 11 BA 00 00 F7 E3 A3 00 12 89 16 02 12 F4

Comments (AX)[ 1100 H]

Opcodes A1 00 11 8B 1E 02 11 BA 00 00 F7 F3 A3 00 12 89 16 02 12 F4

Comments (AX)[ 1100 H]

(BX)[ 1102 H]

(DX)0000H (DX:AX)(AX) * (BX) [1200 H] (AX) [1202 H] (DX)

Stop the execution

16-Bit Division Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H

Label

Mnemonics MOV AX, [1100 H ] MOV BX, [1102 H]

MOV DX, 0000H DIV BX MOV [1200 H], AX MOV [1202 H],DX

HLT

(BX)[ 1102 H]

(DX)0000H (DX:AX)(AX) / (BX) [1200 H] (AX) [1202 H] (DX)

Stop the execution

9

MPMC Lab

CS6412

16-Bit Addition Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

Output Data

Address 1200H 1201H 1202H

Data

1200H 1201H 1202H

16-Bit Subtraction Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

Output Data

Address 1200H 1201H 1202H

Data

1200H 1201H 1202H

16-Bit Multiplication Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

Output Data

Address 1200H 1201H 1202H 1203H 1200H 1201H 1202H 1203H

Data

16-Bit Division Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

10

Output Data

Address 1200H 1201H 1202H 1203H 1200H 1201H 1202H 1203H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

Programs

11

MPMC Lab

8-Bit AND Operation MOV MOV AND MOV HLT

AL, [1100H] BL, [1101H] AL, BL [1200H], AL

8-Bit OR Operation MOV AL, [1100H] MOV BL, [1101H] OR AL, BL MOV [1200H], AL HLT 8-Bit XOR Operation MOV MOV XOR MOV HLT

AL, [1100H] BL, [1101H] AL, BL [1200H], AL

8-Bit NOT Operation MOV AL, [1100H] NOT AL MOV [1200H], AL HLT

12

CS6412

CS6412

MPMC Lab

Ex. No. 3 Date: Aim:

8-BIT LOGICAL OPERATIONS

To write an assembly language program to perform an AND, OR, XOR and NOT operations using 8086 microprocessor kit.

Algorithm 8-Bit AND operation Step 1: Step 2: Step 3: Step 4:

Get two 8-bit data from the input memory locations to AL and BL registers. The contents of BL is AND with AL register and store the result in AL. Store the contents of AL to output memory location. Stop the execution. 8-Bit OR operation

Step 1: Step 2: Step 3: Step 4:

Get two 8-bit data from the input memory locations to AL and BL registers. The contents of BL is OR with AL register and store the result in AL. Store the contents of AL to output memory location. Stop the execution. 8-Bit XOR operation

Step 1: Step 2: Step 3: Step 4:

Get two 8-bit data from the input memory locations to AL and BL registers. The contents of BL is XOR with AL register and store the result in AL. Store the contents of AL to output memory location. Stop the execution. 8-Bit NOT operation

Step 1: Step 2: Step 3: Step 4:

Get an8-bit data from the input memory location to AL register. The content of AL is complimented with NOT operation and result is stored in AL register. Store the contents of AL to output memory location. Stop the execution.

13

MPMC Lab

CS6412

Program with opcode 8-Bit AND operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H

Label

Mnemonics MOV AL, [1100 H] MOV BL, [1101H]

AND AL, BL MOV [1200 H], AL HLT

Opcodes A0 00 11 8A 1E 01 11 22 C3 A2 00 12 F4

Comments (AL)  [1100 H]

Opcodes A0 00 11 8A 1E 01 11 0A C3 A2 00 12 F4

Comments (AL)  [1100 H]

(BL)  [1101H]

(AL)  (AL) ANDed (BL) [1200 H](AL) Stop the execution

8-Bit OR operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H

14

Label

Mnemonics MOV AL, [1100 H] MOV BL, [1101H]

OR AL, BL MOV [1200 H], AL HLT

(BL)  [1101H]

(AL)  (AL) ORed (BL) [1200 H](AL) Stop the execution

CS6412

MPMC Lab

8-Bit XOR operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H

Label

Mnemonics MOV AL, [1100 H] MOV BL, [1101H]

XOR AL, BL MOV [1200 H], AL HLT

Opcodes A0 00 11 8A 1E 01 11 32 C3 A2 00 12 F4

Comments (AL)  [1100 H]

Opcodes A0 00 11 F6 D0 A2 00 12 F4

Comments (AL)  [1100 H]

(BL)  [1101H]

(AL)  (AL) XORed (BL) [1200 H](AL) Stop the execution

8-Bit XOR operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H

Label

Mnemonics MOV AL, [1100 H] NOT AL MOV [1200 H], AL HLT

(AL) 1’s compliment of AL [1200 H](AL) Stop the execution

15

MPMC Lab

CS6412

8-Bit AND operation Input Address 1100H 1101H

Output Data

1100H 1101H

Address 1200H

Data

1200H

8-Bit OR operation Input Address 1100H 1101H

Output Data

1100H 1101H

Address 1200H

Data

1200H

8-Bit XOR operation Input Address 1100H 1101H

Output Data

1100H 1101H

Address 1200H

Data

1200H

8-Bit NOT operation Input Address 1100H 1100H

16

Output Data

Address 1200H 1200H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

17

MPMC Lab

Programs 16-Bit AND Operation MOV MOV AND MOV HLT

AX, [1100H] BX, [1102H] AX, BX [1200H], AX

16-Bit OR Operation MOV AX, [1100H] MOV BX, [1102H] OR AX, BX MOV [1200H], AX HLT 16-Bit XOR Operation MOV MOV XOR MOV HLT

AX, [1100H] BX, [1102H] AX, BX [1200H], AX

16-Bit NOT Operation MOV AX, [1100H] NOT AX MOV [1200H], AX HLT

18

CS6412

CS6412

MPMC Lab

Ex. No. 4 Date: Aim:

16-BIT LOGICAL OPERATIONS

To write an assembly language program to perform an AND, OR, XOR and NOT operations using 8086 microprocessor kit.

Algorithm 16-Bit AND operation Step 1: Step 2: Step 3: Step 4:

Get two 16-bit data from the input memory locations to AX and BX registers. The contents of BX is AND with AX register and store the result in AX. Store the contents of AX to output memory location. Stop the execution. 16-Bit OR operation

Step 1: Step 2: Step 3: Step 4:

Get two 16-bit data from the input memory locations to AX and BX registers. The contents of BX is OR with AX register and store the result in AX. Store the contents of AX to output memory location. Stop the execution. 16-Bit XOR operation

Step 1: Step 2: Step 3: Step 4:

Get two 16-bit data from the input memory locations to AX and BX registers. The contents of BX is XOR with AX register and store the result in AX. Store the contents of AX to output memory location. Stop the execution. 16-Bit NOT operation

Step 1: Step 2: Step 3: Step 4:

Get an8-bit data from the input memory location to AX register. The content of AX is complimented with NOT operation and result is stored in AX register. Store the contents of AX to output memory location. Stop the execution.

19

MPMC Lab

CS6412

Program with opcode 16-Bit AND operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H

Label

Mnemonics MOV AX, [1100 H] MOV BX, [1102H]

AND AX, BX MOV [1200 H], AX HLT

Opcodes A1 00 11 8B 1E 02 11 23 C3 A3 00 12 F4

Comments (AX)  [1100 H]

Opcodes A1 00 11 8B 1E 02 11 0B C3 A3 00 12 F4

Comments (AX)  [1100 H]

(BX)  [1102H]

(AX)  (AX) ANDed (BX) [1200 H](AX) Stop the execution

16-Bit OR operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H

20

Label

Mnemonics MOV AX, [1100 H] MOV BX, [1102H]

OR AX, BX MOV [1200 H], AX HLT

(BX)  [1102H]

(AX)  (AX) ORed (BX) [1200 H](AX) Stop the execution

CS6412

MPMC Lab

16-Bit XOR operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H

Label

Mnemonics MOV AX, [1100 H] MOV BX, [1102H]

XOR AX, BX MOV [1200 H], AX HLT

Opcodes A1 00 11 8B 1E 02 11 33 C3 A3 00 12 F4

Comments (AX)  [1100 H]

Opcodes A1 00 11 F7 D0 A3 00 12 F4

Comments (AX)  [1100 H]

(BX)  [1102H]

(AX)  (AX) XORed (BX) [1200 H](AX) Stop the execution

16-Bit NOT operation Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H

Label

Mnemonics MOV AX, [1100 H] NOT AX MOV [1200 H], AX HLT

(AX) 1’s compliment of AX [1200 H](AX) Stop the execution

21

MPMC Lab

CS6412

16-Bit AND operation Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

Output Data

Address 1200H 1201H

Data

1200H 1201H

16-Bit OR operation Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

Output Data

Address 1200H 1201H

Data

1200H 1201H

16-Bit XOR operation Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H 1103H

Output Data

Address 1200H 1201H

Data

1200H 1201H

16-Bit NOT operation Input Address 1100H 1101H 1102H 1103H 1100H 1101H 1102H

22

Output Data

Address 1200H 1201H 1200H 1201H

Data

CS6412

MPMC Lab

1103H

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

23

MPMC Lab

Programs

8-Bit Smallest Number MOV CL, 04H MOV SI, 1100H MOV AL, [SI] loop-2: INC SI MOV BL, [SI] CMP AL, BL JC loop-1 MOV AL, BL loop-1: DEC CL JNZloop-2 MOV [1200H], AL HLT

8-Bit Largest Number MOV CL, 04H MOV SI, 1100H MOV AL, [SI] loop-2: INC SI MOV BL, [SI] CMP AL, BL JNC loop-1 MOV AL, BL loop-1: DEC CL JNZloop-2 MOV [1200H], AL HLT

24

CS6412

CS6412

MPMC Lab

Ex. No. 5 Date: Aim:

8-BIT SMALLEST AND LARGEST NUMBER

To write an assembly language program to find a smallest and largest number out of five 8-bit numbers using 8086 microprocessor kit.

Algorithm 8-Bit smallest Number Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL register to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the first data from the array to AL register. Increment CL register by 2 and get next data from the array to BL register. Compare AL with BL and If CF=1, then go to step – 7. Copy the contents of BL to AL register Decrement the CL register by 1 and If ZF=0, then go to step – 4. Store the contents of smallest number to output memory location (1200H). Stop the execution.

8-Bit largest Number Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL register to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the first data from the array to AL register. Increment CL register by 2 and get next data from the array to BL register. Compare AL with BL and If CF=0, then go to step – 7. Copy the contents of BL to AL register Decrement the CL register by 1 and If ZF=0, then go to step – 4. Store the contents of smallest number to output memory location (1200H). Stop the execution.

25

MPMC Lab

CS6412

Program with opcode 8-Bit Smallest Number Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H

26

Label

Mnemonics MOV CL, 04H MOV SI, 1100H MOV AL, [SI]

loop-2

INC SI MOV BL, [SI] CMP AL, BL JC loop-1 MOV AL, BL

loop-1

DEC CL JNZ loop-2 MOV [1200H ], AL HLT

Opcodes B1 04 BE 00 11 8A 04 46 8A 1C 39 D8 72 03 88 D8 FE C9 75 F2 A3 00 12 F4

Comments (CL)  04H (SI)  1100 H (AL)((SI)) (SI) (SI) + 1 (BL)((SI)) Compare AL and BL If CF=1, then go to loop-1 (AL)(BL) (CL) (CL) - 1 If ZF=0, then go to loop-2 [1200H](AL) Stop the execution

CS6412

MPMC Lab

8-Bit Largest Number Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H

Label

Mnemonics MOV CL, 04H MOV SI, 1100H MOV AL, [SI]

loop-2

INC SI MOV BL, [SI] CMP AL, BL JNC loop-1 MOV AL, BL

loop-1

DEC CL JNZ loop-2 MOV [1200H ], AL HLT

Opcodes B1 04 BE 00 11 8A 04 46 8A 1C 39 D8 72 03 88 D8 FE C9 75 F2 A3 00 12 F4

Comments (CL)  04H (SI)  1100 H (AL)((SI)) (SI) (SI) + 1 (BL)((SI)) Compare AL and BL If CF=0, then go to loop-1 (AL)(BL) (CL) (CL) - 1 If ZF=0, then go to loop-2 [1200H](AL) Stop the execution

27

MPMC Lab

CS6412

16-Bit Smallest Number Input Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Output Data

Address 1200H

Data

1200H

16-Bit Largest Number Input Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

28

Output Data

Address 1200H

1200H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

29

MPMC Lab

Programs

16-Bit Smallest Number MOV CL, 04H MOV SI, 1100H MOV AX, [SI] loop-2: INC SI INC SI MOV BX, [SI] CMP AX, BX JC loop-1 MOV AX, BX loop-1: DEC CL JNZloop-2 MOV [1200H], AX HLT

16-Bit Largest Number MOV CL, 04H MOV SI, 1100H MOV AX, [SI] loop-2: INC SI INC SI MOV BX, [SI] CMP AX, BX JNC loop-1 MOV AX, BX loop-1: DEC CL JNZloop-2 MOV [1200H], AX HLT

30

CS6412

CS6412

MPMC Lab

Ex. No. 6 Date: Aim:

16-BIT SMALLEST AND LARGEST NUMBER

To write an assembly language program to find a smallest and largest number out of five 16-bit numbers using 8086 microprocessor kit.

Algorithm 16-Bit smallest Number Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL register to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the first data from the array to AX register. Increment CL register by 2 and get next data from the array to BX register. Compare AX with BX and If CF=1, then go to step – 7. Copy the contents of BX to AX register Decrement the CL register by 1 and If ZF=0, then go to step – 4. Store the contents of smallest number to output memory location (1200H). Stop the execution.

16-Bit largest Number Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL register to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the first data from the array to AX register. Increment CL register by 2 and get next data from the array to BX register. Compare AX with BX and If CF=0, then go to step – 7. Copy the contents of BX to AX register Decrement the CL register by 1 and If ZF=0, then go to step – 4. Store the contents of smallest number to output memory location (1200H). Stop the execution.

31

MPMC Lab

CS6412

Program with opcode 16-Bit Smallest Number Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H 1018 H

32

Label

Mnemonics MOV CL, 04H MOV SI, 1100H MOV AX, [SI]

loop-2

INC SI INC SI MOV BX, [SI] CMP AX, BX JC loop-1 MOV AX, BX

loop-1

DEC CL JNZ loop-2 MOV [1200H ], AX HLT

Opcodes B1 04 BE 00 11 8B 04 46 46 8B 1C 39 D8 72 03 89 D8 FE C9 75 F2 A3 00 12 F4

Comments (CL)  04H (SI)  1100 H (AX)((SI)) (SI) (SI) + 1 (SI) (SI) + 1 (BX)((SI)) Compare AX and BX If CF=1, then go to loop-1 (AX)(BX) (CL) (CL) - 1 If ZF=0, then go to loop-2 [1200H](AX) Stop the execution

CS6412

MPMC Lab

16-Bit Largest Number Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H 1018 H

Label

Mnemonics MOV CL, 04H MOV SI, 1100H MOV AX, [SI]

loop-2

INC SI INC SI MOV BX, [SI] CMP AX, BX JNC loop-1 MOV AX, BX

loop-1

DEC CL JNZ loop-2 MOV [1200H ], AX HLT

Opcodes B1 04 BE 00 11 8B 04 46 46 8B 1C 39 D8 72 03 89 D8 FE C9 75 F2 A3 00 12 F4

Comments (CL)  04H (SI)  1100 H (AX)((SI)) (SI) (SI) + 1 (SI) (SI) + 1 (BX)((SI)) Compare AX and BX If CF=0, then go to loop-1 (AX)(BX) (CL) (CL) - 1 If ZF=0, then go to loop-2 [1200H](AX) Stop the execution

33

MPMC Lab

CS6412

16-Bit Smallest Number Input Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Output Data

Address 1200H 1201H

Data

1200H 1201H

16-Bit Largest Number Input Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

34

Output Data

Address 1200H 1201H

1200H 1201H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

35

MPMC Lab

Programs

8-Bit Ascending order

8-Bit Descending order

MOV CL, 04H loop-3: MOV CH, 04H MOV SI, 1100H loop-2: MOV AL, [SI] INC SI MOV BL, [SI] CMP AL, BL JC loop-1 MOV [SI], AL DEC SI MOV [SI], BL INC SI loop-1: DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

MOV CL, 04H loop-3: MOV CH, 04H MOV SI, 1100H loop-2: MOV AL, [SI] INC SI MOV BL, [SI] CMP AL, BL JNC loop-1 MOV [SI], AL DEC SI MOV [SI], BL INC SI loop-1: DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

36

CS6412

CS6412

MPMC Lab

Ex. No. 7 Date: Aim:

8-BIT ASCENDING AND DESCENDING ORDER

To write an assembly language program to sort an array in ascending and descending order using 8086 microprocessor kit (Array size is 05H ).

Algorithm 8-Bit Ascending order Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL registers to number of times rearrange array (04H). Initialize CH registers to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the data from the array to AL & BL registers. Compare AL with BL and If CF=1, then go to step – 7. Exchange the contents between two memory locations. Decrement the CH register by 1 and If ZF=0, then go to step – 4. Decrement the CL register by 1 and If ZF=0, then go to step – 2. Stop the execution.

8-Bit Descending order Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL registers to number of rearrangement required (04H). Initialize CH registers to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the data from the array to AL & BL registers. Compare AL with BL and If CF=0, then go to step – 7. Exchange the contents between two memory locations. Decrement the CH register by 1 and If ZF=0, then go to step – 4. Decrement the CL register by 1 and If ZF=0, then go to step – 2. Stop the execution.

1

MPMC Lab

CS6412

Program with opcode 8-Bit Ascending order Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H 1018 H 1019 H 101A H 101B H 101C H 101D H 101E H

2

Label

loop-3

Mnemonics MOV CL, 04H MOV CH, 04H MOV SI, 1100H

loop-2

MOV AL, [SI] INC SI MOV BL, [SI] CMP AL, BL JC loop-1 MOV [SI], AL DEC SI MOV [SI], BL

loop-1

INC SI DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

Opcodes B1 04 B5 04 BE 00 11 8A 04 46 8A 1C 38 D8 72 06 88 04 4E 8A 1C 46 FE CD 75 ED FE C9 75 E4 F4

Comments (CL)  04H (CH)  04H (SI)  1100 H (AL)((SI)) (SI) (SI) + 1 (BL)((SI)) Compare AL and BL If CF=1, then go to loop-1 ((SI))(AL) (SI) (SI) - 1 ((SI))(BL) (SI) (SI) + 1 (CH) (CH) - 1 If ZF=0, then go to loop-2 (CL) (CL) - 1 If ZF=0, then go to loop-3 Stop the execution

CS6412

MPMC Lab

16-Bit Descending order Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H 1018 H 1019 H 101A H 101B H 101C H 101D H 101E H

Label

loop-3

Mnemonics MOV CL, 04H MOV CH, 04H MOV SI, 1100H

loop-2

MOV AL, [SI] INC SI MOV BL, [SI] CMP AL, BL JNC loop-1 MOV [SI], AL DEC SI MOV [SI], BL

loop-1

INC SI DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

Opcodes B1 04 B5 04 BE 00 11 8A 04 46 8A 1C 38 D8 73 06 88 04 4E 8A 1C 46 FE CD 75 ED FE C9 75 E4 F4

Comments (CL)  04H (CH)  04H (SI)  1100 H (AL)((SI)) (SI) (SI) + 1 (BL)((SI)) Compare AL and BL If CF=0, then go to loop-1 ((SI))(AL) (SI) (SI) - 1 ((SI))(BL) (SI) (SI) + 1 (CH) (CH) - 1 If ZF=0, then go to loop-2 (CL) (CL) - 1 If ZF=0, then go to loop-3 Stop the execution

3

MPMC Lab

CS6412

8-Bit Ascending order Input Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Data

8-Bit Largest Number Input Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

4

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

5

MPMC Lab

Programs

16-Bit Ascending order MOV CL, 04H loop-3: MOV CH, 04H MOV SI, 1100H loop-2: MOV AX, [SI] INC SI INC SI MOV BX, [SI] CMP AX, BX JC loop-1 MOV [SI], AX DEC SI DEC SI MOV [SI], BX INC SI INC SI loop-1: DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

6

16-Bit Descending order MOV CL, 04H loop-3: MOV CH, 04H MOV SI, 1100H loop-2: MOV AX, [SI] INC SI INC SI MOV BX, [SI] CMP AX, BX JNC loop-1 MOV [SI], AX DEC SI DEC SI MOV [SI], BX INC SI INC SI loop-1: DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

CS6412

CS6412

MPMC Lab

Ex. No. 8 Date: Aim:

16-BIT ASCENDING AND DESCENDING ORDER

To write an assembly language program to sortan array in ascending and descending order using 8086 microprocessor kit (Array size is 05H ).

Algorithm 16-Bit Ascending order Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL registers to number of times rearrange array (04H). Initialize CH registers to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the data from the array to AX & BX registers. Compare AX with BX and If CF=1, then go to step – 7. Exchange the contents between two memory locations. Decrement the CH register by 1 and If ZF=0, then go to step – 4. Decrement the CL register by 1 and If ZF=0, then go to step – 2. Stop the execution.

16-Bit Descending order Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Step 9:

Initialize CL registers to number of rearrangement required (04H). Initialize CH registers to number of comparison required (04H). initialize SI register to starting address of the array (1100H). Get the data from the array to AX & BX registers. Compare AX with BX and If CF=0, then go to step – 7. Exchange the contents between two memory locations. Decrement the CH register by 1 and If ZF=0, then go to step – 4. Decrement the CL register by 1 and If ZF=0, then go to step – 2. Stop the execution.

17

MPMC Lab

CS6412

Program with opcode 16-Bit Ascending order Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H 1018 H 1019 H 101A H 101B H 101C H 101D H 101E H 101F H 1020 H 1021 H

18

Label

loop-3

Mnemonics MOV CL, 04H MOV CH, 04H MOV SI, 1100H

loop-2

MOV AX, [SI] INC SI INC SI MOV BX, [SI] CMP AX, BX JC loop-1 MOV [SI], AX DEC SI DEC SI MOV [SI], BX

loop-1

INC SI INC SI DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

Opcodes B1 04 B5 04 BE 00 11 8B 04 46 46 8B 1C 39 D8 72 08 89 04 4E 4E 89 1C 46 46 FE CD 75 EA FE C9 75 E1 F4

Comments (CL)  04H (CH)  04H (SI)  1100 H (AX)((SI)) (SI) (SI) + 1 (SI) (SI) + 1 (BX)((SI)) Compare AX and BX If CF=1, then go to loop-1 ((SI))(AX) (SI) (SI) - 1 (SI) (SI) - 1 ((SI))(BX) (SI) (SI) + 1 (SI) (SI) + 1 (CH) (CH) - 1 If ZF=0, then go to loop-2 (CL) (CL) - 1 If ZF=0, then go to loop-3 Stop the execution

CS6412

MPMC Lab

16-Bit Descending order Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H 1014 H 1015 H 1016 H 1017 H 1018 H 1019 H 101A H 101B H 101C H 101D H 101E H 101F H 1020 H 1021 H

Label

loop-3

Mnemonics MOV CL, 04H MOV CH, 04H MOV SI, 1100H

loop-2

MOV AX, [SI] INC SI INC SI MOV BX, [SI] CMP AX, BX JNC loop-1 MOV [SI], AX DEC SI DEC SI MOV [SI], BX

loop-1

INC SI INC SI DEC CH JNZ loop-2 DEC CL JNZ loop-3 HLT

Opcodes B1 04 B5 04 BE 00 11 8B 04 46 46 8B 1C 39 D8 73 08 89 04 4E 4E 89 1C 46 46 FE CD 75 EA FE C9 75 E1 F4

Comments (CL)  04H (CH)  04H (SI)  1100 H (AX)((SI)) (SI) (SI) + 1 (SI) (SI) + 1 (BX)((SI)) Compare AX and BX If CF=0, then go to loop-1 ((SI))(AX) (SI) (SI) - 1 (SI) (SI) - 1 ((SI))(BX) (SI) (SI) + 1 (SI) (SI) + 1 (CH) (CH) - 1 If ZF=0, then go to loop-2 (CL) (CL) - 1 If ZF=0, then go to loop-3 Stop the execution

19

MPMC Lab

CS6412

16-Bit Ascending order Input Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Data

16-Bit Largest Number Input Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

20

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Data

CS6412

MPMC Lab

Procedure Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Enter ...

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Enter Output Data Address ... SPACE BAR

ENTER KEY

Result: The above programs were successfully executed and results were verified.

21

MPMC Lab

CS6412

Programs

8-Bit String Move MOV SI, 1100H MOV DI, 1200H MOV CX, 0005H REP MOVSB HLT

16-Bit String Move MOV SI, 1100H MOV DI, 1200H MOV CX, 0005H REP MOVSW HLT

8-Bit String Reverse MOV SI, 1100H MOV DI, 1208H MOV CX, 0005H loop-1: LODSB STD STOSB CLD LOOP loop-1 HLT

22

16-Bit String Reverse MOV SI, 1100H MOV DI, 1208H MOV CX, 0005H loop-1: LODSW STD STOSW CLD LOOP loop-1 HLT

MPMC Lab

CS6412

Ex. No. 9 8 & 16-BIT STRING MOVE AND STRING REVERSE Date: Aim: To write an assembly language program for perform string move and string reverse using string manipulation instructions using 8086 microprocessor kit. Algorithm Step 1: Step 2: Step 3: Step 4: Step 1: Step 2: Step 3: Step 4: Step 5: Step 6:

Step 1: Step 2: Step 3: Step 4: Step 1: Step 2: Step 3: Step 4: Step 5: Step 6:

18

8-Bit String Move Initialize SI and DI registers 1100H and 1200H respectively. Initialize CX register 0005H. Copy a string from source memory to destination memory and repeat the same until CX becomes zero. Stop the execution. 8-Bit String Reverse Initialize SI and DI registers 1100H and 1208H respectively. Initialize CX register 0005H. Load a string to AL from source memory and set DF = 1. Store the string from AL to destination memory and Clear DF = 0. Decrement CX register by 1 and If CX ≠ 0 then go to step - 3. Stop the execution. 16-Bit String Move Initialize SI and DI registers 1100H and 1200H respectively. Initialize CX register 0005H. Copy a string from source memory to destination memory and repeat the same until CX becomes zero. Stop the execution. 16-Bit String Reverse Initialize SI and DI registers 1100H and 1208H respectively. Initialize CX register 0005H. Load a string to AX from source memory and set DF = 1. Store the string from AX to destination memory and Clear DF = 0. Decrement CX register by 1 and If CX ≠ 0 then go to step - 3. Stop the execution.

MPMC Lab

CS6412

Program with opcode 8-Bit String Move Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H

Label

Mnemonics MOV SI, 1100H

MOV DI, 1200H MOV CX, 0005H

Opcodes BE 00 11 BF 00 12 B9 05 00

1009 H

REP

F3

100A H 101B H

MOVSB HLT

A4 F4

Comments (SI)  1100 H (DI)  1200 H (CX)  0000H Repeat the next instruction until CX = 0 (DI)  (SI) Stop the execution

8-Bit String Reverse Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H

Label

Mnemonics MOV SI, 1100H

MOV DI, 1208H MOV CX, 0005H loop-1

LODSB STD STOSB CLD LOOP loop-1 HLT

Opcodes BE 00 11 BF 08 12 B9 05 00 AC FD AA FC E2 FA F4

Comments (SI)  1100 H

Opcodes BE 00 11 BF 00 12 B9 05 00

Comments (SI)  1100 H

(DI)  1200 H (CX)  0000H (AX)  (SI) DF = 1 (DI)  (AX) DF = 0 If CX ≠ 0, then go to loop-1 Stop the execution

16-Bit String Move Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H

Label

Mnemonics MOV SI, 1100H

MOV DI, 1200H MOV CX, 0005H

1009 H

REP

F3

100A H

MOVSW

A5

18

(DI)  1200 H (CX)  0000H Repeat the next instruction until CX = 0 (DI)  (SI)

CS6412

MPMC Lab

101B H

HLT

F4

Stop the execution

Opcodes BE 00 11 BF 08 12 B9 05 00 AD FD AB FC E2 FA F4

Comments (SI)  1100 H

16-Bit String Reverse Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H

Label

Mnemonics MOV SI, 1100H

MOV DI, 1208H MOV CX, 0005H loop-1

LODSW STD STOSW CLD LOOP loop-1 HLT

(DI)  1200 H (CX)  0000H (AX)  (SI) DF = 1 (DI)  (AX) DF = 0 If CX ≠ 0, then go to loop-1 Stop the execution

8-Bit String Move Input Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Data

19

MPMC Lab

CS6412

8-Bit String Move Input Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Data

Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Data

16-Bit String Reverse Input Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

20

Output Data

CS6412

MPMC Lab

16-Bit String Reverse Input Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Output Data

Address 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H

Data

21

MPMC Lab

CS6412

Producer Program Entry: Reset M Enter Program Starting Address Opcode SPACE BAR Enter Opcode SPACE BAR

ENTER KEY SPACE BAR

Enter ...

Input Data Entry: Reset M Input Data SPACE BAR

Enter Input Data Address SPACE BAR Input Data

ENTER KEY SPACE BAR

Program Execution: Reset

G

Enter Program Starting Address

ENTER KEY

Enter Output Data Address ... SPACE BAR

ENTER KEY

To Verify Output Data: Reset M SPACE BAR

Result: The above programs were successfully executed and results were verified.

22

Enter ...

CS6412

MPMC Lab

Programs

8-Bit Block Move

loop-1:

MOV CL, 05H MOV SI, 1100H MOV DI, 1200H MOV AL, [SI] MOV [DI], AL INC SI INC DI DEC CL JNZloop-2 HLT

16-Bit Block Move

loop-1:

MOV CL, 05H MOV SI, 1100H MOV DI, 1200H MOV AX, [SI] MOV [DI], AX INC SI INC SI INC DI INC DI DEC CX JNZloop-2 HLT

23

MPMC Lab

Ex. No. 10 Date: Aim:

8 & 16-BIT BLOCK MOVE

To write an assembly language program to block move operation with 8-bit & 16-bit numbers using 8086 microprocessor kit.

Algorithm 8-Bit Block Move Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8:

Initialize CL register to number of data in an array (05H). Initialize SI register to starting address of first array (1100H). Initialize DI register to starting address of second array (1200H). Get the data from the first array to AL register. Copy the data from the AL register to second array. Increment SI and DI registers by 1. Decrement the CL register by 1 and If ZF=0, then go to step – 4. Stop the execution.

16-Bit Block Move Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8:

24

CS6412

Initialize CL register to number of data in an array (05H). Initialize SI register to starting address of first array (1100H). Initialize DI register to starting address of second array (1200H). Get the data from the first array to AX register. Copy the data from the AX register to second array. Increment SI and DI registers by 2. Decrement the CL register by 1 and If ZF=0, then go to step – 4. Stop the execution.

CS6412

MPMC Lab

Program with opcode 8-Bit Block Move Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H

Label

Mnemonics MOV CL, 05H MOV SI, 1100H MOV DI, 1200H

loop-1

MOV AL, [SI] MOV [DI], AL INC SI INC DI DEC CL JNZ loop-1 HLT

Opcodes B1 05 BE 00 11 BF 00 12 8A 04 88 05 46 4F FE C9 75 F2 F4

Comments (CL)  05H (SI)  1100 H (DI)  1200 H (AL)((SI)) ((DI))(AL) (SI) (SI) + 1 (DI) (DI) + 1 (CL) (CL) - 1 If ZF=0, then go to loop-1 Stop the execution

16-Bit Block Move Memory Address 1000 H 1001 H 1002 H 1003 H 1004 H 1005 H 1006 H 1007 H 1008 H 1009 H 100A H 100B H 100C H 100D H 100E H 100F H 1010 H 1011 H 1012 H 1013 H

Label

Mnemonics MOV CL, 05H MOV SI, 1100H MOV DI, 1200H

loop-1

MOV AX, [SI] MOV [DI], AX INC SI INC DI INC DI INC DI DEC CL JNZ loop-1

Opcodes B1 05 BE 00 11 BF 00 12 8B 04 89 05 46 46 4F 4F FE C9 75 F2

Comments (CL)  05H (SI)  1100 H (DI)  1200 H (AX)((SI)) ((DI))(AX) (SI) (SI) + 1 (SI) (SI) + 1 (DI) (DI) + 1 (DI) (DI) + 1 (CL) (CL) - 1 If ZF=0, then go to loop-1

25

MPMC Lab 1014 H

HLT

CS6412 F4

Stop the execution

8-Bit Block Move Input Address

Output Data

1100H 1101H 1102H 1103H 1104H 1100H 1101H 1102H 1103H 1104H

Address

Data

1200H 1201H 1202H 1203H 1204H 1200H 1201H 1202H 1203H 1204H

16-Bit Block Move Input Address

Output Data

1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H 1100H 1101H 1102H 1103H 1104H 1105H 1106H 1107H 1108H 1109H Procedure Program Entry: Reset M SPACE BAR Input Data Entry: Reset M SPACE BAR Program Execution: Reset G

26

Address

Data

1200H 1201H 1202H 1203H 1204H 1205H 1206H 1207H 1208H 1209H 1200H 1201H 1202H 1203H 1204H 1205H 1206H 1207H 1208H 1209H

Enter Program Starting Address Enter Opcode SPACE BAR Enter Input Data Address Input Data SPACE BAR Enter Program Starting Address

ENTER KEY Enter Opcode ... SPACE BAR ENTER KEY ... ENTER KEY

Enter Input Data SPACE BAR

CS6412

MPMC Lab

To Verify Output Data: Reset M ...

Enter Output Data Address SPACE BAR

ENTER KEY

SPACE BAR

Result: The above programs were successfully executed and results were verified.

Programs 8-bit Addition MOV DPTR, #8300H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR MOV R1, #00H ADD A, R0 JNC loop-1 INCR1 loop-1: MOV DPTR, #8400H MOVX @DPTR, A INC DPTR MOV A, R1 MOVX @DPTR, A loop-2: SJMP loop-2

8-bit Subtraction

loop-1:

MOV DPTR, #8300H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR MOV R1, #00H CLR C SUBBA, R0 JNC loop-1 INCR1 MOV DPTR, #8400H MOVX @DPTR, A INC DPTR MOV A, R1 MOVX @DPTR, A

27

MPMC Lab

CS6412

loop-2: SJMP loop-2

Ex. No. 11 Date: Aim:

8-BIT ADDITION AND SUBTRACTION

To write an assembly language program for perform an adding and subtracting of two 8bit numbers using 8051 microcontroller kit.

Algorithm 8-Bit Addition Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7:

Get two 8-bit numbers from the input memory locations to R0 and A registers. Clear R1 register to store the carry condition. Add the contents of R0 to A register and store the result in A. Check carry flog, If CF = 0 then go to step 6. Increment R1 register by 1. Store the contents of Sum and Carry to output memory locations. Stop the execution.

8-Bit Subtraction Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7:

28

Get two 8-bit numbers from the input memory locations to R0 and A registers. Clear R1 register to store the carry condition. Clear carry flag. Subtract the contents of R0 from A register and store the result in A. Check carry flog, If CF = 0 then go to step 6. Increment R1 register by 1. Store the contents of Difference and Borrow to output memory locations. Stop the execution.

CS6412

MPMC Lab

Program with opcode 8-Bit Addition Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H 820E H 820F H 8210 H 8211 H 8212 H 8213 H 8214 H 8215 H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR MOV R1, #00 H ADD A, R0 JNC loop-1

loop-1

INCR1 MOV DPTR, #8400 H

loop-2

MOVX @DPTR, A MOV A, R1 INC DPTR MOVX @DPTR, A SJMP loop-2

Opcodes 90 83 00 E0 F8 A3 E0 79 00 28 50 01 09 90 84 00 F0 E9 A3 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (R0)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (R1)  00H (A)  (A) + (R0) If CF=0, then go to loop-1 (R1) (R1) + 1 (DPTR)  (8400 H) ((DPTR))(A) (8401H)(A) (DPTR) (DPTR) + 1 ((DPTR))(A) Stop the execution

8-Bit Subtraction Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H 820E H 820F H 8210 H 8211 H 8212 H 8213 H 8214 H 8215 H 8216H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR MOV R1, #00 H CLRC C SUBBA, R0 JNC loop-1

loop-1

INCR1 MOV DPTR, #8400 H

loop-2

MOVX @DPTR, A MOV A, R1 INC DPTR MOVX @DPTR, A SJMP loop-2

Opcodes 90 83 00 E0 F8 A3 E0 79 00 C3 98 50 01 09 90 84 00 F0 E9 A3 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (R0)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (R1)  00H (CF)00H (A)  (A) - (R0) If CF=0, then go to loop-1 (R1) (R1) + 1 (DPTR)  (8400 H) ((DPTR))(A) (8401H)(A) (DPTR) (DPTR) + 1 ((DPTR))(A) Stop the execution

29

MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Input Data Entry: Reset ...

Enter Input Data Address INC

ADS

Enter Input Data

INC

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

To Verify Output Data: Reset

Enter Output Data Address

ADS

INC

...

INC

8-Bit Addition Input Address 8300H

Output Data

Address 8400H

8301H

8401H

8300H

8400H

8301H

8401H

Data

8-Bit Subtraction Input Address 8300H

Output Data

Address 8400H

8301H

8401H

8300H

8400H

8301H

8401H

Result: The above programs were successfully executed and results were verified.

30

Data

CS6412

MPMC Lab

Programs 8 – bit Multiplication MOV DPTR, #8300H MOVX A, @DPTR MOV B, A INC DPTR MOVX A, @DPTR MULAB MOV DPTR, #8400H MOVX @DPTR, A INC DPTR MOV A, B MOVX @DPTR, A loop-1: SJMP loop-1

8 – bit Division MOV DPTR, #8300H MOVX A, @DPTR MOV B, A INC DPTR MOVX A, @DPTR DIVAB MOV DPTR, #8400H MOVX @DPTR, A INC DPTR MOV A, B MOVX @DPTR, A loop-1: SJMP loop-1

31

MPMC Lab

Ex. No. 12 Date: Aim:

8-BIT MULTIPLICATION AND DIVISION

To write an assembly language program perform multiplication and division of two 8-bit numbers using 8051 microcontroller kit.

Algorithm 8-Bit Multiplication Step 1: Step 2: Step 3: Step 4:

Get two 8-bit numbers from the input memory locations to B and A registers. Multiply the contents of B with A register and store the product in A&B. Store the contents of product to output memory locations. Stop the execution.

8-Bit Division Step 1: Step 2: Step 3: Step 4:

Get two 8-bit numbers from the input memory locations to B and A registers. Divide the contents of B with A register and store the results in A&B. Store the contents of quotient & remainder to output memory locations. Stop the execution.

Program with opcode

32

CS6412

CS6412

MPMC Lab

8-Bit Multiplication Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H 820E H 820F H 8210 H 8211 H 8212 H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV B, A INC DPTR MOVX A, @DPTR MUL AB MOV DPTR, #8400 H MOVX @DPTR, A MOV A, B

loop-1

INC DPTR MOVX @DPTR, A SJMP loop-1

Opcodes 90 83 00 E0 F5 F0 A3 E0 A4 90 84 00 F0 E5 F0 A3 F0 80 FE

Comments (DPTR)  (8300 H)

Opcodes 90 83 00 E0 F5 F0 A3 E0 84 90 84 00 F0 E5 F0 A3 F0 80 FE

Comments (DPTR)  (8300 H)

(A) ( (DPTR)) (B)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (BA)  (A) * (B) (DPTR)  (8400 H) ((DPTR))(A) (A)  (B) (DPTR) (DPTR) + 1 ((DPTR))(A) Stop the execution

8-Bit Division Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H 820E H 820F H 8210 H 8211 H 8212 H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV B, A INC DPTR MOVX A, @DPTR DIV AB MOV DPTR, #8400 H MOVX @DPTR, A MOV A, B

loop-1

INC DPTR MOVX @DPTR, A SJMP loop-1

(A) ( (DPTR)) (B)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (AB)  (A) / (B) (DPTR)  (8400 H) ((DPTR))(A) (A)  (B) (DPTR) (DPTR) + 1 ((DPTR))(A) Stop the execution

33

MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Input Data Entry: Reset ...

Enter Input Data Address INC

ADS

Enter Input Data

INC

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

To Verify Output Data : Reset

Enter Output Data Address

ADS

. . INC.

INC

8-Bit Multiplication Input Address 8300H

Output Data

Address 8400H

8301H

8401H

8300H

8400H

8301H

8401H

Data

8-Bit Division Input Address 8300H

Output Data

Address 8400H

8301H

8401H

8300H

8400H

8301H

8401H

Result: The above programs were successfully executed and results were verified.

34

Data

CS6412

MPMC Lab

Programs 8 – bit AND Operation MOV DPTR, #8300H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR ANLA, R0 MOV DPTR, #8400H MOVX @DPTR, A loop-1: SJMP loop-1

8 – bit OR Operation MOV DPTR, #8300H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR ORLA, R0 MOV DPTR, #8400H MOVX @DPTR, A loop-1: SJMP loop-1

35

MPMC Lab

Ex. No. 13 Date: Aim:

CS6412

8-BIT AND & OR OPERATION

To write an assembly language program perform AND&OR operation of two 8-bit numbers using 8051 microcontroller kit.

Algorithm 8-Bit AND Operation Step 1: Step 2: Step 3: Step 4:

Get two 8-bit numbers from the input memory locations to R0 and A registers. Perform the AND operation between the contents of R0 with A registers and stores the result in A register. Store the contents of result to output memory locations. Stop the execution.

8-Bit OR Operation Step 1: Step 2: Step 3: Step 4:

36

Get two 8-bit numbers from the input memory locations to R0 and A registers. Perform the OR operation between the contents of R0 with A registers and stores the result in A register. Store the contents of result to output memory locations. Stop the execution.

CS6412

MPMC Lab

Program with opcode 8-Bit AND Operation Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR ANL A, R0 MOV DPTR, #8400 H

loop-1

MOVX @DPTR, A SJMP loop-1

Opcodes 90 83 00 E0 F8 A3 E0 58 90 84 00 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (R0)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (A)  (A) ANDed (R0) (DPTR)  (8400 H) ((DPTR))(A) Stop the execution

8-Bit OR Operation Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR ORL A, R0 MOV DPTR, #8400 H

loop-1

MOVX @DPTR, A SJMP loop-1

Opcodes 90 83 00 E0 F8 A3 E0 48 90 84 00 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (R0)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (A)  (A) ORed (R0) (DPTR)  (8400 H) ((DPTR))(A) Stop the execution

Producer 37

MPMC Lab

CS6412

Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Input Data Entry: Reset ...

Enter Input Data Address INC

ADS

Enter Input Data

INC

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

To Verify Output Data : Reset

Enter Output Data Address

ADS

. . INC.

INC

8-Bit AND Operation Input Address 8300H

Output Data

Address

Data

8400H

8301H 8300H

8400H

8301H 8-Bit OR Operation Input Address 8300H

Output Data

Address 8400H

8301H 8300H

8400H

8301H

Result: The above programs were successfully executed and results were verified.

Programs 38

Data

CS6412

MPMC Lab

8 – bit EX-OR Operation MOV DPTR, #8300H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR XRLA, R0 MOV DPTR, #8400H MOVX @DPTR, A loop-1: SJMP loop-1

8 – bit NOT Operation MOV DPTR, #8300H MOVX A, @DPTR CPLA MOV DPTR, #8400H MOVX @DPTR, A loop-1: SJMP loop-1

39

MPMC Lab

Ex. No. 14 Date: Aim:

CS6412

8-BIT EX-OR & NOT OPERATION

To write an assembly language program perform EX-OR & NOT operations of two 8bit numbers using 8051 microcontroller kit.

Algorithm 8-Bit EX-OR Operation Step 1: Step 2: Step 3: Step 4:

Get two 8-bit numbers from the input memory locations to R0 and A registers. Perform the EX-OR operation between the contents of R0 with A registers and stores the result in A register. Store the contents of result to output memory locations. Stop the execution.

8-Bit NOT Operation Step 1: Step 2: Step 3: Step 4:

40

Get an 8-bit number from the input memory location to Aregister. Perform the NOT operation of on A register and store the result in A register. Store the contents of result to output memory location. Stop the execution.

CS6412

MPMC Lab

Program with opcode 8-Bit EX-OR Operation Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR MOV R0, A INC DPTR MOVX A, @DPTR XRL A, R0 MOV DPTR, #8400 H

loop-1

MOVX @DPTR, A SJMP loop-1

Opcodes 90 83 00 E0 F8 A3 E0 68 90 84 00 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (R0)  (A) (DPTR) (DPTR) + 1 (A) ( (DPTR)) (A)  (A) EX-ORed (R0) (DPTR)  (8400 H) ((DPTR))(A) Stop the execution

8-Bit NOT Operation Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR CPLL A MOV DPTR, #8400 H

loop-1

MOVX @DPTR, A SJMP loop-1

Opcodes 90 83 00 E0 F4 90 84 00 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (A)  (A) ORed (R0) (DPTR)  (8400 H) ((DPTR))(A) Stop the execution

41

MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Input Data Entry: Reset ...

Enter Input Data Address INC

ADS

Enter Input Data

INC

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

To Verify Output Data : Reset

Enter Output Data Address

8-Bit EX-OR Operation Input Address 8300H

ADS

. . INC.

INC

Output Data

Address

Data

8400H

8301H 8300H

8400H

8301H 8-Bit NOT Operation Input Address

Output Data

Address

8300H

8400H

8300H

8400H

Result: The above programs were successfully executed and results were verified.

42

Data

CS6412

MPMC Lab

Programs 8 – bit Bit Manipulation in Acuumulator MOV DPTR, #8300H MOVX A, @DPTR SETB A3 CLR A7 MOV DPTR, #8400H MOVX @DPTR, A loop-1: SJMP loop-1

8 – bit Odd/Even using Bit Manipulation MOV DPTR, #8300H MOVX A, @DPTR JB A0, loop-1 MOV DPTR, #8400H MOV A, #EEH MOVX @DPTR, A loop-2: SJMP loop-2 loop-1: MOV DPTR, #8400H MOV A, #00H MOVX @DPTR, A loop-2: SJMP loop-2

43

MPMC Lab

Ex. No. 15 Date: Aim:

CS6412

8-BIT BIT MANIPULATION PROGRAMS

To write an assembly language program perform bit manipulation of an 8-bit number using 8051 microcontroller kit.

Algorithm 8-Bit Bit Manipulation in Acuumulator Step 1: Step 2: Step 3: Step 4:

Get an 8-bit number from the input memory locationto A register. Set a bit A3 and Clear bit A7 in A register and store the result in A. Store the contents of product to output memory location. Stop the execution.

8 – bit Odd/Even using Bit Manipulation Step 1: Step 2: Step 3: Step 4:

44

Get an 8-bit number from the input memory location to A register. Check whether the bit A0 is binary 1. If A0 = 1, then go to step- 4. Store the status of A register has even number in output memory location.Stop the execution. Store the status of A register has odd number in output memory location.Stop the execution.

CS6412

MPMC Lab

Program with opcode 8-Bit Bit Manipulation in Acuumulator Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR SETB A3 CLR A7 MOV DPTR, #8400 H

loop-1

MOVX @DPTR, A SJMP loop-1

Opcodes 90 83 00 E0 D2 E3 C2 E7 90 84 00 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR)) (A3)  1 (A7)  0 (DPTR)  (8400 H) ((DPTR))(A) Stop the execution

8 – bit Odd/Even using Bit Manipulation Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820C H 820D H 820E H 820F H 8210 H 8211 H 8212 H 8213H 8214H 8215H 8216H

Label

Mnemonics MOV DPTR, #8300 H MOVX A, @DPTR JB A0, loop-1

MOV DPTR, #8400 H MOV A, #EE H loop-2

MOVX @DPTR, A SJMP loop-2

loop-1

MOV DPTR, #8400 H MOV A, #00 H

loop-2

MOVX @DPTR, A SJMP loop-2

Opcodes 90 83 00 E0 20 E0 08 90 84 00 74 EE F0 80 FE 90 84 00 74 00 F0 80 FE

Comments (DPTR)  (8300 H) (A) ( (DPTR))

(DPTR)  (8400 H) (A) EEH ((DPTR))(A) Stop the execution (DPTR)  (8400 H) (A) 00H ((DPTR))(A) Stop the execution

45

MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Input Data Entry: Reset ...

Enter Input Data Address INC

ADS

Enter Input Data

INC

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

To Verify Output Data : Reset

Enter Output Data Address

8-Bit Bit Manipulation in Acuumulator Input Address Data

ADS

Output Address

8300H

8400H

8300H

8400H

8 – bit Odd/Even using Bit Manipulation Input Address Data 8300H 8300H

. . INC.

INC

Data

Output Address 8400H 8400H

Result: The above programs were successfully executed and results were verified.

46

Data

CS6412

MPMC Lab

Programs Saw Tooth Wave Form

Loop-1:

MOV A, #80H MOV DPTR, #A003H MOVX @DPTR, A MVI A, 00H MOV DPTR, #A001H MOVX @DPTR, A INR A SJMP Loop-1

7 6 5 I/O MS1 MS0 1 0 0

4 PA 0

3 PCU 0

2 MS 0

1 PB 0

0 PCL 0

4 PA 0

3 PCU 0

2 MS 0

1 PB 0

0 PCL 0

4 PA 0

3 PCU 0

2 MS 0

1 PB 0

0 PCL 0

CW = 80H

Triangle Wave Form MOV A, #80H MOV DPTR, #A003H MOVX @DPTR, A MVI A, 00H MOV DPTR, #A001H Loop-1: MOVX @DPTR, A INC A CJNE A, #FFH, Loop-1 Loop-2: MOVX @DPTR, A DEC A CJNE A, #00H, Loop-2 SJMP Loop-1 Square Wave Form

Loop-1:

MOV A, #80H MOV DPTR, #A003H MOVX @DPTR, A MVI A, 00H MOV DPTR, #A001H MOVX @DPTR, A LCALL Delay CPL A SJMP Loop-1

7 6 5 I/O MS1 MS0 1 0 0 CW = 80H

7 6 5 I/O MS1 MS0 1 0 0 CW = 80H

Delay: MOV R0, #FFH loop-1: NOP DJNZ loop-1 RET

47

MPMC Lab

CS6412

Ex. No. 16 PROGRAMS USING DAC & 8255 PPI Date: WITH 8051 Aim: To write an assembly language program for to learn the operation of DAC and 8255 PPI interfacing with 8051 microcontroller kit using simple programs. Algorithm Step 1: Step-2: Step-3: Step-4: Step-5: Step-6:

Saw Tooth Wave Form Initialize A register to 80H. Send the content of A register to Control word register. Initialize A register to 00H. Send the content of A register to Port - B. Increment the contents of A register by 1. Jump to step-4.

Triangle Wave Form Step 1: Initialize A register to 80H. Step-2: Send the content of A register to Control word register. Step-3: Initialize A register to 00H. Step-4: Send the content of A register to Port - B. Step-5: Increment the contents of A register by 1. Step-6: Compare the A and Immediate data FFH.If A≠ FFH, then go to step-4. Step-7: Send the content of A register to Port - B. Step-8: Decrement the contents of A register by 1. Step-9: Compare the A and Immediate data 00H.If A≠00H, then go to step-7. Step-10: Jump to step-4.

Step 1: Step-2: Step-3: Step-4: Step-5: Step-6: Step-7:

Square Wave Form Main Program Initialize A register to 80H. Send the content of A register to Control word register. Initialize A register to 00H. Send the content of A register to Port - B. Call the Delay Subroutine Program.

Compliment the A register. Jump to step-4. Subroutine Program

Step 1: Step 2: Step 3: Step 4:

48

Initialize R0 register pair to FFH. Do No operation. Decrement R0 register by 1.If R0 ≠00H, then go to step-2. Return to Main program.

CS6412

MPMC Lab

Program with opcode Saw Tooth Wave Form Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820BH 820CH 820DH 820EH

Label

Mnemonics MOV A, #80H M0V DPTR, #A003H MOVX @DPTR, A MOV A, #00H M0V DPTR, #A001H

loop-1

MOVX @DPTR, A INC A SJMP loop-1

Opcodes 74 80 90 A0 03 F0 74 00 90 A0 01 F0 04 80 FC

Comments (A) 80H (DPTR) A003H ((DPTR))  (A) (A) 00H (DPTR) A001H ((DPTR))  (A) (A)(A) + 1 Go to loop-1

Triangle Wave Form Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820CH 820DH 820EH 820FH 8210H 8211H 8212H 8213H 8214H 8215H 8216H

Label

Mnemonics MOV A, #80H M0V DPTR, #A003H MOVX @DPTR, A MOV A, #00H M0V DPTR, #A001H

loop-1

MOVX @DPTR, A INC A CJNE A, #FFH, loop-1

loop-2

MOVX @DPTR, A DEC A CJNE A, #00H, loop-2 SJMP loop-1

Opcodes 74 80 90 A0 03 F0 74 00 90 A0 01 F0 04 B4 FF FB F0 14 B4 00 FB 80 FC

Comments (A) 80H (DPTR) A003H ((DPTR))  (A) (A) 00H (DPTR) A001H ((DPTR))  (A) (A)(A) + 1 Compare A & FFH&if A ≠FFH then go to loop-1 ((DPTR))  (A) (A)(A) - 1 Compare A & 00H&if A ≠00H then go to loop-2 Go to loop-1

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MPMC Lab

CS6412

Square Wave Form Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820CH 820DH 820EH 820FH 8210H 8211H 8220H 8221H 8222H 8223H 8224H 8225H 8226H 8227H 8228H 8229H

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Label

loop-1

Delay loop-3 loop-2

Mnemonics MOV A, #80H

Opcodes 74 80 M0V DPTR, #A003H 90 A0 03 MOVX @DPTR, A F0 MOV A, #00H 74 00 M0V DPTR, #A001H 90 A0 01 MOVX @DPTR, A F0 LCALL Delay 12 82 20 CPL A F4 SJMP loop-1 80 FA Delay Subroutine Program MOV R0, 20H 78 20 MOV R1, FFH 79 FF NOP 00 DJNZ R1, loop-2 D9 FD DJNZ R0, loop-3 D8 F9 RET 22

Comments (A) 80H (DPTR) A003H ((DPTR))  (A) (A) 00H (DPTR) A001H ((DPTR))  (A) Call delay subroutine program Compliment A register Go to loop-1

(R0)20H (R1)FFH No operation Decrement R1 by 1 and If R1≠0, then go to loop-2 Decrement R1 by 1 and If R1≠0, then go to loop-3 Return to main program

CS6412

MPMC Lab

Saw Tooth Wave Form OUPUT

A(V)

Amplitude: Time: 0

Triangle Wave Form

T(msec)

A(V)

OUPUT Amplitude: Time:

0

Square Wave Form

T(msec)

A(V)

OUPUT Amplitude: Time:

0

T(msec)

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MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

Result: The above programs were successfully executed and results were verified.

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CS6412

MPMC Lab

Programs Stepper Motor

Loop-1:

MOV A, #80H MOV DPTR, #A003H MOVX @DPTR, A MOV DPTR, #A000H MOV A, #33H MOVX @DPTR, A LCALL Delay RR A SJMP Loop-1

7 6 5 I/O MS1 MS0 1 0 0

4 PA 0

3 PCU 0

2 MS 0

1 PB 0

0 PCL 0

CW = 80H

Delay: MOV R0, #20H loop-3: MOV R1, #FFH loop-2: NOP DJNZ R1, loop-2 DJNZ R0, loop-3 RET

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MPMC Lab

CS6412

Ex. No. 17 STEPPER MOTOR INTERFACE WITH 8255 PPI Date: Aim: To write an assembly language program for to demonstrate the operation of stepper motor and 8255 PPI interfacing with 8051 microcontroller kit.

Algorithm

Step-2: Step-3: Step-4: Step-5: Step-6: Step-7:

Stepper motor interface Initialize A register to 80H. Send the content of A register to Control ward register. Initialize A register to 33H. Send the content of A register to Port - A. Call Delay subroutine program. Rotate the contents of A register to right side by 1 bit position. Jump to step-4.

Step 1: Step 2: Step 3: Step 4: Step 5: Step 6:

Initialize R0 register to 20H. Initialize R1 register to FFH. No operation. Decrement R1 register by 1 and go to step-3, if R1≠0. Decrement R0 register by 1 and go to step-3, if R0≠0. Return to Main program.

Step 1:

Subroutine Program

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CS6412

MPMC Lab

Program with opcode Stepper Motor Interface Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820CH 820DH 820EH 820FH 8210H 8211H 8220H 8221H 8222H 8223H 8224H 8225H 8226H 8227H 8228H 8229H

Label

loop-1

Delay loop-3 loop-2

Mnemonics MOV A, #80H

Opcodes 74 80 MOV DPTR, #A003H 90 A0 03 MOVX @DPTR, A F0 MOV A, #33H 74 33 MOV DPTR, #A000H 90 A0 00 MOVX @DPTR, A F0 LCALL Delay 12 82 20 RR A 03 SJMP loop-1 80 F9 Delay Subroutine Program MOV R0, 20H 78 20 MOV R1, FFH 79 FF NOP 00 DJNZ R1, loop-2 D9 FD DJNZ R0, loop-3 D8 F9 RET 22

Comments (A) 80H (DPTR)A003 H ((A003 H))  (A) (A) 33H (DPTR)A000 H ((A000 H))  (A) Call delay subroutine program Rotate Right Accumulator Go to loop-1

(R0)20H (R1)FFH No operation Decrement R1 by 1 and If R1≠0, then go to loop-2 Decrement R1 by 1 and If R1≠0, then go to loop-3 Return to main program

55

MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

Output Instruction RR A RL A

Direction of Rotation Clockwise Rotation Anti-clockwise Rotation

Result: The above programs were successfully executed and results were verified.

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CS6412

MPMC Lab

Programs DC Motor MOV A, #80H MOV DPTR, #A003H MOVX @DPTR, A Loop-2: JB P1.2, Loop-1 MOV DPTR, #A001H MOV A, #04H MOVX @DPTR, A SJMP Loop-2 loop-1: MOV A, #00H MOVX @DPTR, A SJMP Loop-2

7 6 5 I/O MS1 MS0 1 0 0

4 PA 0

3 PCU 0

2 MS 0

1 PB 0

0 PCL 0

CW = 80H

57

MPMC Lab

CS6412

Ex. No. 18 DC MOTOR INTERFACE WITH 8255 PPI Date: Aim: To write an assembly language program for to demonstrate the operation of DC motor and 8255 PPI interfacing with 8051 microcontroller kit.

Algorithm Step 1: Step-2:

Step 3: Step-4: Step-5: Step-6:

Step 7: Step 8: Step 9:

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DC motor interface Initialize A register to 80H. Send the content of A register to Control ward register. If P1.2 bit = 1, then go to step-7. Initialize A register to 04H. Send the content of A register to Port - B. Jump to step-3. Initialize A register to 00H. Send the content of A register to Port - B. Jump to step-3.

CS6412

MPMC Lab

Program with opcode DC Motor Interface Memory Address 8200 H 8201 H 8202 H 8203 H 8204 H 8205 H 8206 H 8207 H 8208 H 8209 H 820A H 820B H 820CH 820DH 820EH 820FH 8210H 8211H 8212H 8213H 8214H 8215H

Label

Mnemonics MOV A, #80H MOV DPTR, #A003H

loop-2

MOVX @DPTR, A JB P1.2, loop-1

MOV A, #04H MOV DPTR, #A001H MOVX @DPTR, A SJMP loop-2 loop-1

MOV A, #00H MOVX @DPTR, A SJMP loop-2

Opcodes 74 80 90 A0 03 F0 20 92 08 74 04 90 A0 01 F0 80 F5 74 00 F0 80 F0

Comments (A) 80H (DPTR)A003 H ((A003 H))  (A) If P1.2 = 1, then go to loop-1

(A) 04H (DPTR)A001 H ((A001 H))  (A) Go to loop-2 (A) 00H ((A001 H))  (A) Go to loop-2

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MPMC Lab

CS6412

Producer Program Entry: Reset INC

Enter Program Starting Address ... INC

ADS

Enter Opcode

Program Execution: Reset

Enter Program Starting Address

ADS

EXEC

Output Switch (SW29) is in ON Switch (SW29) is in OFF

: :

DC Motor starts to rotate. DC Motor stops to rotate.

Result: The above programs were successfully executed and results were verified.

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