High Definition Audio SoundMAX® Codec AD1988A/AD1988B ENHANCED FEATURES

Ten 192 kHz DACs Five independent stereo DAC pairs 7.1 surround sound plus independent headphone Independent 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz sample rates Selectable stereo mixer on outputs 16-, 20-, and 24-bit PCM resolution Six 192 kHz ADCs Three independent stereo ADC pairs Simultaneous record of up to three stereo channels Support for quad microphone arrays plus independent capture channel Independent 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz sample rates 16-, 20-, and 24-bit resolution S/PDIF output 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz sample rates 16-, 20-, and 24-bit data widths PCM, WMA/PRO, Dolby®, AC3, and DTS® formats Digital PCM gain control Digital PCM ADC/stream mixer S/PDIF input 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz sample rates 16-, 20-, and 24-bit data widths PCM, WMA/PRO, Dolby, AC3, and DTS formats Digital PCM gain control Auto synchronizes to source High quality stereo CD input with GND sense MONO_OUT pin for internal speakers or telephony Retasking jack support

Three stereo headphone amps AD1988A: Windows Vista™ Operating System Premium Logo compliant 95 dB outputs 90 dB audio inputs AD1988B: Windows Vista Premium Logo compliant and Dolby Master Studio™ compliant 101 dB outputs 92 dB audio inputs Internal 32-bit arithmetic for greater accuracy Impedance and presence detection on all jacks Analog PCBEEP and digital synthesis BEEP C/LFE channel swap Two general-purpose digital I/O (GPIO) pins 3.3 V analog and digital supplies Reduced support components Advanced power management modes 48-pin LQFP and LFCSP_VQ package options, Pb-free Supports Andrea Active Noise Reduction headphones Hardware volume control Built-in microphone gain amps Adjustable microphone bias pins

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FEATURES

Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.

AD1988A/AD1988B TABLE OF CONTENTS Features .............................................................................................. 1

Pin Configuration and Function Descriptions..............................8

Enhanced Features............................................................................ 1

Clarification of Output Configurations .................................. 11

Revision History ............................................................................... 2

HD Audio Widgets......................................................................... 12

Functional Block Diagram .............................................................. 3

Jack Presence Detection................................................................. 18

Specifications..................................................................................... 4

HD Audio Style Jack Presence Detection ............................... 18

Test Conditions............................................................................. 4

Hardware Volume Control............................................................ 19

Absolute Maximum Ratings............................................................ 7

Outline Dimensions ....................................................................... 20

Thermal Resistance ...................................................................... 7

Ordering Guide .......................................................................... 20

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ESD Caution.................................................................................. 7

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10/06—Revision 0: Initial Version

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REVISION HISTORY

Rev. 0 | Page 2 of 20

AD1988A/AD1988B FUNCTIONAL BLOCK DIAGRAM N ID : 0 7

AVSS

N ID : 1 C

24 bit 32-192 k Hz PCM / D igital S/PDIF R X

+3.3V +/-5% AVDD

Digital GAM

S/PDIF I n / GPIO_1

Input_En

Z

MIC Bias Regulator

GPIO_1

Σ 1 (0 B )

M

Digital AM

Z

-58 .5 to 0 dB

24 bit 192 kHz PCM Σ∆ DAC

Stereo Paths

Po w e r Co ntrol

Mono Paths

N ID : 1 B

24 bit 32-192 kHz PCM / D igital S/PDIF T X

M

MIC_BIAS_FILT

N ID : 3 5

-34 .5 to + 12 dB N ID : 0 2

N ID : 1 D 0 (01 )

VREF

S/PDIF Out

VREF_FILT 101+ dB (AD1988B)

N ID : 2 3 Pow e r Co ntrol

Output_En

DAC _ 4 N ID : 0 A 0 (0 A )

D i g i ta l

A

M

N ID : 2 8 N ID : 2 5

Σ

M

Z

PORT -H

-58 .5 to 0 dB 1 (21 )

Split-Z

M

Surround Center

EN

24 bit 192 kHz PCM Σ∆ DAC

N ID : 1 6

DAC _ 3 N ID : 0 6

BIAS 0 (06 )

D i g i ta l

A

M

Σ

-58 .5 to 0 dB 1 (21 )

24 bit 192 kHz PCM Σ∆ DAC

M

Z

Boost NID: 3B 0 (05 )

A

PORT -F Surround Back

M

DAC _ 2 N ID : 0 5 D i g i ta l

PORT -F MIC BIAS

Z

N ID : 2 A

M

EN

N ID :2 7 N ID : 2 4

Σ

M

S WA P

Z

PORT -G

-58 .5 to 0 dB

24 bit 192 kHz PCM Σ∆ DAC

H D

DAC _ 1 N ID : 0 4

0 (04 )

D i g i ta l

A

DAC _ 0 N ID : 0 3

N ID : 1 9

D i g i ta l

A

-46 .5 to 0 dB

RESET# BITCLK

1 (04 ) 3 :1

M

GAM

N ID : 1 F

GAM

GAM

GAM

3

5

2 (38 – P or t- A )

1 (33 – P or t- C /H /G)

N ID : 3 3

Σ

Boost NID: 3D

Σ 1 (21 )

PORT -D

EN

Z

HP AMP

Z

PORT -A MIC BIAS

PORT -A Headphone

M Boost NID: 38

1 (04 )

0 (36 )

EN

3 :1

M

N ID : 1 E

Σ 1 (21 )

0 (3 A )

N ID : 1 3 N ID : 2 D

2 (06 )

1 (25 )

Σ

A

S te r e o D own-M ix

M

MONO_OUT

M

-46 .5 to 0 dB

N ID : 1 4

1 4

7

GAM

GAM

GAM

4 (34 – P or t- E /H /G)

N ID : 3 4

3 :1

2 (24 ) 1 (25 ) 0 (3 C )

0 (03 ) 1 (04 )

N ID : 3 0

3 :1

0 (30 )

M

Σ 1 (21 )

6 (1 8 - C D )

7 (1 A - P CB e e p)

GAM

BIAS

Z

HP AMP

Z

PORT -B MIC BIAS

N ID : 2 B

2 (06 )

M

PORT -B Microphone

M Boost NID: 39

0 (39 – P or t- B )

EN

N ID : 1 7

0 (0 8 )

1 (0 9 )

2 (0 F)

1 (21 )

BIAS M

D i g i ta l /

Selector 10 :1

0 (05 )

O

GM

BIAS

0 (03 )

ADC SE L_ 0 N ID : 0 C

A na l o g

M

N ID : 3 7

2 (24 )

0

6

24 bit 192 kHz PCM Σ∆ ADC

Z

HP-Front L/R

2 (06 )

N ID : 3 6 3 :1

2

ADC _ 0 N ID : 0 8

M

N ID : 2 2

-34.5 to +12dB

N ID : 0 B

HP AMP

PORT -D MIC BIAS / EAPD

N ID : 1 1

0 (37 )

3 (3 D – P or t- D )

HW Volume Control

Selector 3 :1

Z

M

0 (03 )

5 (3 B – P or t- F)

GPIO_0 / Volume

O

SYNC

NID: 20

GPIO

BS

SDI

N ID : 1 2

BIAS / EAPD

N ID : 2 9

AM

-58 .5 to 0 dB

I N T E R F A C E

M

EN

N ID : 2 1

GPIO_1

SDO

1 (21 )

Mixer Power Control

LE

24 bit 192 kHz PCM Σ∆ DAC

Center / LFE

Σ

-58 .5 to 0 dB

A U D I O

M

TE

1 (21 )

1 (04 )

Σ

N ID : 3 2 2 :1

0 (32 )

PORT -E MIC BIAS

Z

N ID : 2 6

M

S WA P

Z

PORT -E MIC 1/2

M

-58 .5 to + 22 .5 dB

+1.5V + /- 10 % DVIO

(A D 1988L15 )

+3.3V + /- 10 % (A D 1988L33 )

DVDD

+3.3V + /- 10 %

ADC _ 1 N ID : 0 9

24 bit 192 kHz PCM Σ∆ ADC

Boost NID: 3C

N ID : 1 5

1 (21 )

ADC SE L_ 1 N ID : 0 D

D i g i ta l / A na l o g

GM

Selector 10 :1

0 (04 )

N ID : 3 1

1 (0 A )

2 :1

M

+1.8V

BIAS / EAPD

N ID : 2 C

Σ 0 (31 )

M

Z

Z

PORT -C MIC BIAS / EAPD PORT -C

Line In

M

-58 .5 to + 22 .5 dB

DVFILT

EN

Boost NID: 3A

EN

+5% -20 %

PCBeep

9 (20 - M ixe r )

N ID : 1 A

7 (25 – P or t- H )

24 bit 192 kHz PCM Σ∆ ADC

ADC SE L_ 2 N ID : 0 E

D i g i ta l / A na l o g

GM -58 .5 to + 22 .5 dB

3 (3 B – P or t- F)

N ID : 1 0

8 (3 D – P or t- D ) Selector 10 :1

Digital Beep

0 (38 – P or t- A )

AM -45 .0 t o 0 d B 3 d B S tep s

1 (39 – P or t- B ) 4 (3 C – P or t- E ) 2 (3 A – P or t- C )

N ID : 1 8 CD

5 (18 - CD )

D i ff Amp

Figure 1. Block Diagram

Rev. 0 | Page 3 of 20

CD _L CD _GND CD _R

05843-011

ADC _ 2 N ID : 0 F

DVSS

6 (24 – P or t- G)

AD1988A/AD1988B SPECIFICATIONS TEST CONDITIONS Test Conditions for the AD1988A and AD1988B are as follows, unless otherwise noted.

Analog Input/Output Conditions

DAC Conditions

Temperature at 25°C Digital supply (DVDD) at 3.3 V ±10% Analog supply (AVDD) at 3.3 V ±5% MIC_BIAS_FILT at 5.0 V ±5% Sample rate (FS) at 48 kHz Input signal at 1008 Hz Analog output pass band at 20 Hz to 20 kHz

Calibrated Output −3 dB relative to full scale 10 kΩ output load: line out tests 32 Ω output load: headphone tests

ADC Conditions Calibrated 0 db PGA gain Input −3.0 dB relative to full scale

Min

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LINE_IN to Other DIGITAL-TO-ANALOG CONVERTERS Resolution1 Gain Error Interchannel Gain Mismatch Total Out-of-Band Energy 1 DAC Crosstalk1

DAC VOLUMES—PROGRAMMABLE GAIN ATTENUATOR Step Size Output Gain/Attenuation Range ADC VOLUMES—PROGRAMMABLE GAIN AMPLIFIER/ATTENUATOR Step Size PGA Gain/Attenuation Range ANALOG MIXER—PROGRAMMABLE GAIN AMPLIFIER/ATTENUATOR Signal-to-Noise Ratio (SNR)1, 2 Step Size Input Gain/Attenuation Range

Typ AD1988A/ AD1988B Max

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0

0.60 fS 20 0

±0.2

Input L, Ground R, Read R; Input R, Ground L, Read L

±10

Bits %

±0.5 ±5

dB mV

−85 −100

dB −80

dB

±10

Bits %

24 Full-scale span relative to nominal input voltage Difference of gain errors To 100 kHz Input L, Zero R, Read R; Input R, Zero L, Read L

±0.2 −85 −95

DAC_0, DAC_1, DAC_2, DAC_3, DAC_4

ADCSEL_0, ADCSEL_1, ADCSEL_2

Rev. 0 | Page 4 of 20

dB dB

+22.5

dB dB

+12.0

dB dB

95/96 +1.5 −34.5

dB dB dB

0

+1.5 −58.5

Input to output (including CD in) All mixer inputs All mixer inputs

±0.5

+1.5 −58.5

Unit

0.40 fS Hz ±0.005 dB Hz −100 dB 1/fS μs

24

Full-scale span relative to nominal input voltage Difference of gain errors

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Interchannel Gain Mismatch ADC Offset Error ADC Crosstalk1 Line Inputs

Conditions/Comments fS 8 kHz ~ 192 kHz

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Parameter DIGITAL DECIMATION AND INTERPOLATION FILTERS 1 Pass Band Pass-Band Ripple Stop Band Stop Band Rejection Group Delay Group Delay Variation over Pass Band ANALOG-TO-DIGITAL CONVERTERS Resolution1 Gain Error

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Table 1.

AD1988A/AD1988B

Dynamic Range1 ANALOG INPUTS PORT-G, PORT-H, or CD

Min

Line out drive enabled When ports are used as line level outputs

1.0 2.83 300 15 1000 −85/−85 +95/+101

−60 dB reference to fS A-weighted

0 dB boost

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+10 dB boost +20 dB boost +30 dB boost

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Input Impedance1 PCBEEP PORT-G, PORT-H All others (with 0 dB boost) Input Capacitance1 ANALOG INPUT PERFORMANCE Total Harmonic Distortion Plus Noise (THD+N)1 Dynamic Range Signal-to-Noise Ratio (SNR)2 STATIC DIGITAL SPECIFICATIONS Digital I/O (DVIO) VIH VIL VOH VOL

−83/−84 −83/−84 +95/+101

1 2.83

V rms3 V p-p

1 2.83 0.316 0.894 0.1 0.283 0.032 0.089

V rms3 V p-p V rms3 V p-p V rms3 V p-p V rms3 V p-p

23 60 150 5

kΩ kΩ kΩ pF

0.5

32

10 kΩ load 32 Ω load −60 dB reference to fS A-weighted, 10 kΩ or 32 Ω loads When ports are used as inputs

DVIO @ 3.3 V ± 10%

Rev. 0 | Page 5 of 20

15 1000

7.5

−81/−82 +90/+92 +90/+92

−60 dB in reference to fS A-weighted

2.97

Ω kΩ pF pF dB dB V rms3 V p-p Ω Ω pF pF dB dB dB

1.0 2.83

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Output drive enabled When ports are used as outputs

Unit V rms 3 V p-p

10

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Microphone Boost Amplifiers PORT-A, PORT-B, PORT-C, PORT-D, PORT-E, or PORT-F

Conditions/Comments

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Parameter ANALOG LINE LEVEL OUTPUTS Full-Scale Output Voltage PORT-C, PORT-E, PORT-F, PORT-G, PORT-H, and MONO_OUT Output Impedance1 External Total Load Impedance Output Capacitance1 External Load Capacitance1 Total Harmonic Distortion (THD+N)1 Dynamic Range1 ANALOG HP DRIVE OUTPUTS Full-Scale Output Voltage PORT-A, PORT-B, and PORT-D Output Impedance1 External Load Impedance1 Output Capacitance1 External Load Capacitance1 Total Harmonic Distortion (THD+N)1

Typ AD1988A/ AD1988B Max

3.3 2.0 0.8 2.4 0.6

dB dB dB 3.63

V V V V V

AD1988A/AD1988B

Conditions/Comments

Unit

3.13

3.30 155/172 47/52

3.46

V mW mA

2.97

3.30 3.63 247.5/238 75/75

V mW mA

2.97

3.30 3.96 1.20 80

V mW mA dB V

Min

3.3 V ± 5%

3.3 V ± 10%

3.3 V ± 10%

100 mV p-p signal @ 1 kHz

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Parameter POWER SUPPLY Analog (AVDD) Power Supply Range Power Dissipation Supply Current Digital (DVDD) Power Supply Range Power Dissipation Supply Current Digital I/O (DVIO) Power Supply Range Power Dissipation Supply Current Power Supply Rejection1 (AVDD)

Typ AD1988A/ AD1988B Max

1

3.63

Guaranteed, not tested. SNR measurement defined as “the difference in level between a reference output signal and the device output with no signal applied.” This definition is taken from B. Metzler, Audio Measurement Handbook, 1st edition, Audio Precision, Inc., 1993, p. 165. 3 RMS values assume sine wave input.

Comments

Powered down saves (each) Powered down saves (each) Saves Powered down saves Low (active) state

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Parameter POWER-DOWN STATES FUNCTION Node DAC Pair ADC Pair Mixer Power Control (and Associated Amps) MIC_BIAS RESET

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Table 2. Power-Down States

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Rev. 0 | Page 6 of 20

D-State D3 D3 D3 D3 D3

AD1988A/AD1988B DIDD Typ AIDD Typ

Unit

21/20 6/6 5.3/5.4 0/0 0/0 2.9/2.7

mA mA mA mA mA mA

1.2/1.7 5/5.6 3.2/3.1 2.0/2.4 0.5/0.5 3.1/3.4

AD1988A/AD1988B ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE

Parameter Digital (DVDD) Digital I/O (DVIO) Analog (AVDD) Input Current (Except Supply Pins) Analog Input Voltage (Signal Pins) Digital Input Voltage (Signal Pins) Ambient Temperature (Operating) Storage Temperature Range

Rating −0.30 V to +3.65 V −0.30 V to +3.65 V −0.30 V to +3.65 V ±10.0 mA −0.30 V to AVDD + 0.3 V −0.30 V to DVIO + 0.3 V 0°C to +70°C −65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Ambient temperature ratings are as follows: TAMB = TCASE − (PD × θCA) where: TCASE = case temperature in °C. PD = power dissipation in W. θCA = thermal resistance (case-to-ambient). Table 4. Thermal Resistance Package Type LQFP LFCSP_VQ4

θJA1 48 47

θJC2 17 15

θJA = thermal resistance: junction-to-ambient. θJC = thermal resistance: junction-to-case. 3 θCA = thermal resistance: case-to-ambient. 4 VQ = very thin quad. 1

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Table 3.

2

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ESD CAUTION

Rev. 0 | Page 7 of 20

θCA3 31 32

Unit ºC/W ºC/W

AD1988A/AD1988B

I/O O

GPIO_0/VOLUME

2

I/O

DVIO DVSS SDATA_OUT

3 4, 7 5

BIT_CLK SDATA_IN

6 8

O I/O

9

I

SYNC RESET PCBEEP SENSE_A/SRC_B PORT-E_L, PORT-E_R

10 11 12 13 14, 15

I I I I/O I/O

PORT-F_L, PORT-F_R

16, 17

I/O

CD_L, CD_R CD_GND PORT-B_L, PORT-B_R

18, 20 19 21, 22

I I I/O

MIC_BIAS-A

PORT-A_L

MONO_OUT

PORT-A_R

AVSS

PORT-G_L

PORT-G_R

AVDD

32 MIC_BIAS/EAPD-D 31 MIC_BIAS-E

TOP VIEW (Not to Scale)

DVSS 7

30 MIC_BIAS-F

SDATA_IN 8

29 MIC_BIAS/EAPD-C

DVDD 9

28 MIC_BIAS-B

SYNC 10

27 VREF_FILT

RESET 11

26 AVSS

PCBEEP 12

25 AVDD

05843-003

PORT-C_R

PORT-C_L

PORT-B_R

PORT-B_L

CD_R

CD_GND

CD_L

PORT-F_R

PORT-F_L

PORT-E_R

Figure 3. LFQP Pin Configuration

Description Filter Connection for Internal Core Voltage Regulator. This pin must be connected to filter capacitors: 10 μF, 1.0 μF, and 0.1 μF connected in parallel between Pin 1 and DVSS (Pin 4 and Pin 7). General-Purpose Input/Output Pin (Digital I/O). Digital signal used to control external circuitry. Volume Control. When enabled, it can be used as an external volume control Link Digital I/O Voltage Reference. 3.3 V (±10%). Digital Supply Return (Ground). Link Serial Data Output (Digital Interface). AD1988 input stream. Clocked on both edges of the BIT_CLK. Link Bit Clock (Digital Interface). 24.000 MHz serial data clock. Link Serial Data Input (Digital Interface). AD1988 output stream. Clocked only on one edge of BIT_CLK. Digital Supply Voltage 3.3 V ± 10%. This is regulated down to 1.9 V on Pin 1 to supply the internal digital core internal to the AD1988. Link Frame Sync (Digital Interface). 48 kHz frame sync plus SDI stream IDs. Link Reset (Digital Interface). AD1988 master hardware reset. Monaural Input from System for PCBEEP. Line level input. Jack Sense A to Jack Sense D Input/Sense B Drive. Left and Right Rear Panel Stereo Mic In/C/LFE (Analog Input/Output). Input: line level input, supports microphones with MIC_BIAS and boost amplifiers. Output: line level output. Left and Right Rear Panel Stereo Mic In/Surround Rear (Analog Input/Output). Input: line level input, supports microphones with MIC_BIAS and boost amplifiers. Output: line level output only. CD Audio Left Channel, CD Audio Right Channel. CD Audio Analog Ground Reference (for Analog CD Input). Line level input only. Front Panel Stereo Mic In/Front Panel Headphones. Analog input/output. Input: line level input, supports microphones with MIC Bias and boost amplifiers. Output: line level output, capable of driving headphone load and power.

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DVDD

I I I

33 MIC_BIAS_FILT

AD1988A/AD1988B

5

BIT_CLK 6

O

Pin Number 1

DVSS 4 SDATA_OUT

BS

Mnemonic DVCORE

34 SENSE_B/SRC_A

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Table 5. Pin Function Descriptions

05843-001

SENSE_A/SRC_B PORT-E_L PORT-E_R PORT-F_L PORT-F_R CD_L CD_GND CD_R PORT-B_L PORT-B_R PORT-C_L PORT-C_R

Figure 2. LFCSP_VQ Pin Configuration

35 PORT-D_L

DVI/O 3

13 14 15 16 17 18 19 20 21 22 23 24

13 14 15 16 17 18 19 20 21 22 23 24

TOP VIEW (Not to Scale)

PORT-H_L

S/PDIF-OUT

AD1988A/AD1988B

36 PORT-D_R PIN 1

GPIO_0/VOLUME 2

PORT-E_L

DVI/O 3 DVSS 4 SDATA_OUT 5 BIT_CLK 6 DVSS 7 SDATA_IN 8 DVDD 9 SYNC 10 RESET 11 PCBEEP 12

PORT-D_R PORT-D_L SENSE_B/SRC_A MIC_BIAS_FILT MIC_BIAS/EAPD-D MIC_BIAS-E MIC_BIAS-F MIC_BIAS/EAPD-C MIC_BIAS-B VREF_FILT AVSS AVDD

41 40 39 38 37

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36 35 34 33 32 31 30 29 28 27 26 25

PIN 1 INDICATOR

SENSE_A/SRC_B

1 2

PORT-H_R

S/PDIF-OUT S/PDIF-IN/GPIO_1 PORT-H_R PORT-H_L PORT-G_R PORT-G_L AVSS PORT-A_R MONO_OUT PORT-A_L AVDD MIC_BIAS-A 48 47 46 45 44 43 42 41 40 39 38 37

48 47 46 45 44 43 42

DVCORE 1 DVCORE GPIO_0/VOLUME

S/PDIF-IN/GPIO_1

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Rev. 0 | Page 8 of 20

AD1988A/AD1988B

25, 38

I

AVSS

26, 42

I

VREF_FILT

27

O

MIC_BIAS-B

28

O

MIC_BIAS-C MIC_BIAS-F MIC_BIAS-E MIC_BIAS-D MIC_BIAS_FILT

29 30 31 32 33

O O O O I

SENSE_B/SRC_A PORT-D_L, PORT-D_R

34 35, 36

I/O I/O

MIC_BIAS-A PORT-A_L, PORT-A_R

37 39, 41

O I/O

MONO_OUT PORT-G_L, PORT-G_R

40 43, 44

PORT-H_L, PORT-H_R

45, 46

Description Rear Panel Line-In/Surround Back Output. Analog input/output. Input: line level input, supports microphones with MIC Bias and boost amplifiers. Output: line level output only. Analog Supply Voltage. 3.3 V only. Caution: Do not apply 5.0 V to this pin. AVDD supplies should be well regulated and filtered because supply noise degrades audio performance. Analog Supply Return (Ground). AVSS should be connected to DVSS using a conductive trace under, or close to, the AD1988A/AD1988B. Voltage Reference Filter. This pin must be connected to filter capacitors: 1.0 μF and 0.1 μF connected in parallel between Pin 27 and AVSS (Pin 26). Switchable Microphone Bias for PORT-B. Capable of: High-Z, 0 V, 1.65 V, 3.78 V, and 3.95 V (with 5.0 V on Pin 33). High-Z, 0 V, 1.65 V, 2.86 V, and 3.10 V (with 3.3 V on Pin 33). Switchable Microphone Bias for PORT-C. This pin has the same function as MIC_BIAS-B. Switchable Microphone Bias for PORT-F. This pin has the same function as MIC_BIAS-B. Switchable Microphone Bias for PORT-E. This pin has the same function as MIC_BIAS-B. Switchable Microphone Bias for PORT-D. This pin has the same function as MIC_BIAS-B. Filter for Microphone Bias Boost Circuitry. Connect this pin to 5.0 V via a low-pass filter. When connected in this way, the AD1988A/AD1988B are each capable of providing 3.95 V as a microphone bias to all of the MIC_BIAS pins. If 5 V is not available, connect this pin to 3.3 V (AVDD) via a low-pass filter. The AD1988A/AD1988B produce a MIC_BIAS voltage relative to the AVDD supply (typically 3.1 V @ AVDD = 3.3 V). Jack Sense E to Jack Sense H Input/Sense A Drive. Left and Right Rear Panel Headphone (Front Line Out)/Stereo MIC In. Analog input/output. Input: line level input, supports microphones with MIC_BIAS and boost amplifiers. Output: line level output, capable of driving headphone load and power. Switchable Microphone Bias for PORT-A. This pin has the same function as MIC_BIAS-B. Left and Right Front Panel Headphone Output/Stereo MIC In. Analog input/output. Input: line level input, supports microphones with MIC_BIAS and boost amplifiers. Output: line level output, capable of driving headphone load and power. Monaural Output to Internal Speaker or Telephony Subsystem. Line level output only. Left and Right Rear Panel C/LFE Output/Line Input. Input: line level input. Output: line level output. Left and Right Rear Panel Surround Center/Side Output/Line Input. Analog input/output. Input: line level input. Output: line level output. S/PDIF_IN/GPIO Pin. S/PDIF_IN supports S/PDIF input. When enabled, GPIO_1 can be used as a GPIO pin. S/PDIF_OUT. Supports S/PDIF output.

TE

AVDD

BS

I/O I/O

LE

Pin Number 23, 24

O

Mnemonic PORT-C_L, PORT-C_R

O

O

S/PDIF_IN/GPIO_1

47

I/O

S/PDIF_OUT

48

O

Rev. 0 | Page 9 of 20

AD1988A/AD1988B Table 6. Pins Grouped by Function Pin No. 5 6 8 10 11

Mnemonic SDATA_OUT BIT_CLK SDATA_IN SYNC RESET

Digital Input/Output

48 47 2 13 34 1 27 33 28 29 30 31 32 37 9 3 4, 7 25, 38 26, 42 12 14 15 16 17 18 20 21 22 23 24 35 36 39 40 41 43 44 45 46

S/PDIF_OUT S/PDIF_IN/GPIO_1 GPIO_0/VOLUME SENSE_A/SRC_B SENSE_B/SRC_A DVCORE VREF_FILT MIC_BIAS_FILT MIC_BIAS-B MIC_BIAS-C MIC_BIAS-F MIC_BIAS-E MIC_BIAS-D MIC_BIAS-A DVDD DVIO DVSS AVDD AVSS PCBEEP PORT-E_L PORT-E_R PORT-F_L PORT-F_R CD_L CD_R PORT-B_L PORT-B_R PORT-C_L PORT-C_R PORT-D_L PORT-D_R PORT-A_L MONO_OUT PORT-A_R PORT-G_L PORT-G_R PORT-H_L PORT-H_R

Jack Sense Filter/Reference

LE

Microphone Bias

TE

Function Digital Interface

O

Power and Ground

O

BS

Analog Input/Output

Rev. 0 | Page 10 of 20

AD1988A/AD1988B CLARIFICATION OF OUTPUT CONFIGURATIONS DAC, ADC, and port assignments are arbitrary; however, ports are optimized for certain configurations. Use the guidelines in Table 7, Table 8, and Table 9 when selecting ports for particular functions. Note the following for each of these tables:

In desktop applications with shared input/5.1 jacks, assign the ports as listed in Table 8. Table 8. Shared Input/5.1 Jacks Port PORT-A PORT-B PORT-C

•

HP is the output capable of driving headphone load and power

•

MIC is input that supports microphones with MIC Bias and boost amplifiers

PORT-D

• •

LO is the line level output

PORT-E

LI is the line level input

MONO_OUT

In desktop applications with discreet jacks (the default configuration), assign the ports as listed in Table 7.

x x

x x

x x

x x

TE

LI x x x x

MIC x x x

LO x x x

LI x x x

x

x

x

x

x

x

x

x

Table 9. Port PORT-A PORT-B PORT-D PORT-C

LE

x x

LO x x x x

PORT-E/PORT-F

O

MONO_OUT

x

MIC x x x x

x

BS

PORT-G PORT-H

HP x x

O

PORT-E PORT-F

Function Front Panel Headphone Front Panel Microphone Rear Panel Line-In Rear Panel Front/Headphone Rear Panel Microphone Rear Panel Surround-Rear (5.1) Rear Panel C/LFE Rear Panel SurroundCenter/Side (7.1) Internal Mono Speaker (use GPIO as EAPD)

HP x x

In notebook applications, to support fully retasking jacks, assign the ports as listed in Table 9.

Table 7. Discreet Jacks (Default Configuration) Port PORT-A PORT-B PORT-C PORT-D

Function Front Panel Headphone Front Panel Microphone Rear Panel LineIn/Surround-Rear (5.1) Rear Panel Front/Headphone Rear Panel Microphone/C/LFE Internal Mono Speaker (use GPIO as EAPD)

Rev. 0 | Page 11 of 20

Function Headphone Jack Microphone Jack Line-In Jack Internal Stereo Speakers (use GPIO as EAPD) Internal Quad Microphone Array (Optional)

HP x x x

MIC x x x x

LO x x x x

LI x x x x

x

x

x

AD1988A/AD1988B HD AUDIO WIDGETS Table 10.

LE

TE

Description Device identification Designates this device as an audio codec S/PDIF digital stream output interface Stereo headphone channel digital/audio converters Stereo front channel digital/audio converters Stereo C/LFE channel digital/audio converters Stereo surround-back (5.1) channel digital/audio converters S/PDIF digital stream input interface Stereo record Channel 0 audio/digital converters Stereo record Channel 1 audio/digital converters Stereo surround-side (7.1) channel digital/audio converters Selects the ADC to drive the S/PDIF mixer Selects and amplifies/attenuates the input to ADC_0 Selects and amplifies/attenuates the input to ADC_1 Selects and amplifies/attenuates the input to ADC_2 Stereo record Channel 2 audio/digital converters Internal digital PCBEEP signal Front panel headphone jack Rear panel front speaker jack Monaural output pin (internal speakers or telephony system) Front panel microphone jack Rear panel line-in jack Rear panel surround-back (5.1) jack Rear panel microphone jack Analog CD input Powers down the analog mixer and associated amps External analog PCBEEP signal input S/PDIF output pin S/PDIF input pin Mixes the selected ADC with the digital stream to drive S/PDIF out Selects the source that drives the MONO_OUT signal Hardware volume knob Mixes individual gain analog inputs Attenuates the mixer output to drive the port mixers Mixes the DAC_0 and mixer output amps to drive PORT-A Powers down the internal and external VREF circuitry Rear panel C/LFE jack Rear panel surround-side (7.1) jack Mixes the PORT-E selected DAC and mixer output amps to drive PORT-E Mixes the DAC_3 and mixer output amps to drive PORT-G Mixes the DAC_4 and mixer output amps to drive PORT-H Mixes the DAC_1 and mixer output amps to drive PORT-D Mixes the DAC_2 and mixer output amps to drive PORT-F Mixes the PORT-B selected DAC and mixer output amps to drive PORT-B Mixes the PORT-C selected DAC and mixer output amps to drive PORT-C Mixes the stereo L/R channels to drive MONO_OUT Powers down the internal MIC_BIAS_FILT and all MIC_BIAS pins Selects DAC_0, DAC_1, and DAC_3 for PORT-B Selects DAC_2 and DAC_4 for PORT-C Selects DAC_2 and DAC_4 for PORT-E Selects from the PORT-C, PORT-G, and PORT-H inputs to the mixer input

O

Type Root Function Audio output Audio output Audio output Audio output Audio output Audio input Audio input Audio input Audio output Audio selector Audio selector Audio selector Audio selector Audio input Beep generator Pin complex Pin complex Pin complex Pin complex Pin complex Pin complex Pin complex Pin complex Power widget Pin complex Pin complex Pin complex Audio mixer Audio mixer Vendor defined Audio mixer Audio selector Audio mixer Vendor defined Pin complex Pin complex Audio mixer Audio mixer Audio mixer Audio mixer Audio mixer Audio mixer Audio mixer Audio mixer Vendor defined Audio selector Audio selector Audio selector Audio selector

BS

Name ROOT FUNCTION S/PDIF DAC DAC_0 DAC_1 DAC_2 DAC_3 S/PDIF ADC ADC_0 ADC_1 DAC_4 S/PDIF Mix Selector ADC Selector 0 ADC Selector 1 ADC Selector 2 ADC_2 Digital Beep PORT-A PORT-D MONO_OUT PORT-B PORT-C PORT-F PORT-E CD IN Mixer Power-Down Analog PCBEEP S/PDIF Out S/PDIF In S/PDIF Mixer MONO_OUT Mixer Volume Knob Analog Mixer Mixer Output Attenuator PORT-A Mixer VREF Power-Down PORT-G PORT-H PORT-E Mixer PORT-G Mixer PORT-H Mixer PORT-D Mixer PORT-F Mixer PORT-B Mixer PORT-C Mixer Stereo Mix-Down BIAS Power-Down PORT-B Out Selector PORT-C Out Selector PORT-E Out Selector PORT-C In Selector

O

Node ID 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2F 30 31 32 33

Rev. 0 | Page 12 of 20

AD1988A/AD1988B Node ID 34 36 37 38 39 3A 3B 3C 3D

Name PORT-E In Selector MONO_OUT Selector PORT-A Out Selector PORT-A Boost PORT-B Boost PORT-C Boost PORT-F Boost PORT-E Boost PORT-D Boost

Type Audio selector Audio selector Audio selector Audio selector Audio selector Audio selector Audio selector Audio selector Audio selector

Description Selects from the PORT-E, PORT-G, and PORT-H inputs to the mixer input Selects DAC_0, DAC_1, and DAC_3 for MONO_OUT Selects DAC_0, DAC_1, and DAC_3 for PORT-A Microphone boost amp for PORT-A Microphone boost amp for PORT-B Microphone boost amp for PORT-C Microphone boost amp for PORT-F Microphone boost amp for PORT-E Microphone boost amp for PORT-D

Table 11. AD1988A Device Root and Function Node Parameters

Revision ID 1 0x02 00100400

Audio Function Group Capabilities 0x08

GPIO Capabilities 0x11

00000001

00010C0C

40000002

Silicon revision number may change without prior notice. Number shown is current at the publication date of this document.

LE

1

Name ROOT FUNCTION

Vendor ID 0x00 11D41988

Function Group Type 0x05

TE

Node ID 00 01

Sub Node Count 0x04 00010001 0002003C

Table 12. AD1988B Device Root and Function Node Parameters

O Revision ID 1 0x02 00100300

Function Group Type 0x05

Audio Function Group Capabilities 0x08

GPIO Capabilities 0x11

00000001

00010C0C

40000002

Silicon revision number may change without prior notice. Number shown is current at the publication date of this document.

O

1

Name ROOT FUNCTION

Vendor ID 0x00 11D4198B

BS

Node ID 00 01

Sub Node Count 0x04 00010001 0002003C

Rev. 0 | Page 13 of 20

AD1988A/AD1988B

Pin Capabilities 0C

Input Amp Capabilities 0D 80000000

Con. List Length 0E 00000001 00000000 00000000 00000000 00000000 00000001 00000001 00000001 00000000 00000003 00000007 00000007 00000007 00000001 00000000 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000000 00000002 00000000 00000001 00000000 00000002 00000002 00000000 00000008 00000001 00000002 00000008 00000001 00000001 00000002 00000002 00000002 00000002 00000002 00000002 00000002 00000001 00000006 00000003 00000002

Power States 0F 00000009

Output Amp Capabilities 12 00052727

00000009 00000009 00000009 00000009

00052727 00052727 00052727 00052727

00000009 00000009 00000009

00052727

00000001

O

0000373F 0000373F 00000010 0000373F 00003737 00003737 00003737 00000020

00000020 00000010 00000020

80051F17 80000000 80000000 80051F17 80000000

00000037 00000037 80000000 80000000 80000000 80000000 80000000 80000000 80000000

Rev. 0 | Page 14 of 20

Volume Knob Capabilities 13

80053627 80053627 80053627

00000009

LE

000E07FF

Stream Formats 0B 00000001 00000005 00000001 00000001 00000001 00000001 00000005 00000001 00000001 00000001

TE

PCM Size, Rate 0A 000E07FF 000E07E0 000E07FF 000E07FF 000E07FF 000E07FF 000E07E0 000E07FF 000E07FF 000E07FF

BS

X 0 0 0 0 0 1 1 1 0 3 3 3 3 1 7 4 4 4 4 4 4 4 4 5 4 4 4 2 2 6 2 3 2 F 4 4 2 2 2 2 2 2 2 2 F 3 3

Widget Capabilities 09 000004C0 00030311 00000405 00000405 00000405 00000405 00130391 00100501 00100501 00000405 00300301 0030010D 0030010D 0030010D 00100501 0070000C 0040018D 0040018D 0040010C 0040018D 0040018D 0040018D 0040098D 00400001 00500500 00400000 0040030D 0040020B 00200303 00200103 00600080 0020010B 0030010D 00200103 00F00100 0040098D 0040018D 00200103 00200103 00200103 00200103 00200103 00200103 00200103 00200100 00F00100 00300101 00300101

O

Node ID 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2F 30 31

Type ID

Table 13. Widget Parameters

800B0F0F 80000000 80000000 80051F1F 80000000 80000000 80000000 80000000

00000009 80052727

000000BF 80051F1F

80000000 80000000

Stream Formats 0B

Pin Capabilities 0C

Input Amp Capabilities 0D

Con. List Length 0E 00000002 00000003 00000003 00000003 00000003 00000001 00000001 00000001 00000001 00000001 00000001

Power States 0F

O

LE

TE

PCM Size, Rate 0A

BS

3 3 3 3 3 3 3 3 3 3 3

Widget Capabilities 09 00300101 00300101 00300101 00300101 00300101 0030010D 0030010D 0030010D 0030010D 0030010D 0030010D

O

Node ID 32 33 34 36 37 38 39 3A 3B 3C 3D

Type ID

AD1988A/AD1988B

Rev. 0 | Page 15 of 20

Output Amp Capabilities 12

00270300 00270300 00270300 00270300 00270300 00270300

Volume Knob Capabilities 13

AD1988A/AD1988B Table 14. Connection List

00203D25 00203D25 00203D25

00000022 00000029 0000002D 0000002B 0000002C 0000002A 00000026 00002120

00000B01 00002136 3D383339 00000020 00002137 25249811 00000027 00000028 00002132 00002105 0000210A 00002104 00002106 00002130 00002131 0000001E 15141211 00060403 00000A04 00000405 0024253A 0024253C

1 NID

1 1 1

09 3C 3C 3C

1A183B34

2120BD38

00001716

I

2 NID

I

3 NID

I

4 NID

I

5 NID

I

6 NID

I

7 NID

1C 0C 0D 08 38 38 38 0E 22 29 2D 2B 2C 2A 26 20

0F 18 18 18

24 24 24

25 25 25

3D 3D 3D

20 20 20

3B

18

1A

3D

20

21

21

02

BS

00000002

I

TE

000F0908 2418BC38 2418BC38 2418BC38 0000000E

0 NID 1D

LE

0000001C 0000000C 0000000D

Length 1 0 0 0 0 1 1 1 0 3 7 7 7 1 0 1 1 1 1 1 1 1 0 2 0 1 0 2 2 0 8 1 2 8 1 1 2 2 2 2 2 2 2 1 6 3 2 2 3 3

O

Connections 0 to 3 4 to 7 0000001D

O

Node ID 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2F 30 31 32 33 34

01 36

0B 21

39 20 37 11 27 28 32 05 0A 04 06 30 31 1E 11 03 04 05 3A 3C

33

38

3D

34

21 18

24

25

38

14 06

15

16

1

1

21 21 21 21 21 21 21 12 04 0A 04 25 25

24 24

Rev. 0 | Page 16 of 20

17

AD1988A/AD1988B Node ID 36 37 38 39 3A 3B 3C 3D

Connections 0 to 3 4 to 7 00060403 00060403 00000011 00000014 00000015 00000016 00000017 00000012

Length 3 3 1 1 1 1 1 1

0 NID 03 03 11 14 15 16 17 12

I

1 NID 04 04

I

2 NID 06 06

3 NID

I

I

4 NID

I

5 NID

I

6 NID

I

7 NID

Table 15. Default Configuration Bytes1 19 16 Conn Type ⅛” jack ⅛” jack ATAPI ⅛” jack ⅛” jack ⅛” jack ⅛” jack ATAPI ATAPI Optical Optical ⅛” jack ⅛” jack

15 12

TE

23 20 Default Device HP out Line out Speaker Mic in Line in Line out Mic in CD Other S/PDIF out S/PDIF in Line out Line out

LE

Connectivity Jack Jack Fixed Jack Jack Jack Jack Fixed Fixed Jack Jack Jack Jack

27 24 Location Chassis Position External Front External Rear Internal Special 3 External Front External Rear External Rear External Rear Internal Special 3 Internal Special 3 External Rear External Rear External Rear External Rear

O

Value 02214030 01014010 9913011F 02A19040 01813021 01011012 01A19020 9933012E 99F301F0 014511F0 01C511F0 01016011 01012014

29 28

Color Green Green Unknown Pink Blue Black Pink Unknown Unknown Black Black Orange Gray

8 8 Misc JD Ovrrd 0 0 1 0 0 0 0 1 1 1 1 0 0

7 4 Def Assn 3 1 1 4 2 1 2 2 F F F 1 1

Default configuration values are set on codec power-up only. To preserve modifications by BIOS control, default configuration values do not change by reset operations.

O

1

31 30

BS

Node ID 11 12 13 14 15 16 17 18 1A 1B 1C 24 25

MSB LSB

Rev. 0 | Page 17 of 20

3 0 Seq 0 0 F 0 1 2 0 E 0 0 0 1 4

AD1988A/AD1988B JACK PRESENCE DETECTION HD AUDIO STYLE JACK PRESENCE DETECTION

Detect jack presence by using a resistor tree arrangement detailed by the HD audio specification, allowing up to four jacks per sense line. Jacks must have normally open, isolated switches to use this method of jack presence detection.

The AD1988 uses two jack sense pins for presence detection on up to eight audio jacks. This, combined with the device identification engine, enables software to determine if there is a device plugged into the circuit, and the type of device it is. Allowing software to configure jacks and amplifiers, as necessary, ensures proper audio operation.

For proper operation, there must be a 2.67 kΩ 1% resistor connected between SENSE_A and AVDD, and another 2.67 kΩ 1% resistor between SENSE_B and AVDD. The specific resistor values for each jack are listed in Table 16. Use 1% tolerance resistors to ensure accurate detection.

Table 16. Jack Sense Mapping

0x12 0x15 0x14 0x11

Name Pull-up to AVDD SURR_SIDE (7.1) C/LFE SURR_BACK (5.1) REAR_MIC

LE

D C B A

Node ID

SENSE_B Port

TE

SENSE_A Port

BS

O

Name Pull-up to AVDD FRONT LINE IN FRONT_MIC HP_OUT

O

Resistor Value (1% Tolerance) 2.67 kΩ 5.10 kΩ 10.0 kΩ 20.0 kΩ 39.2 kΩ

Rev. 0 | Page 18 of 20

H G F E

Node ID 0x25 0x24 0x16 0x17

AD1988A/AD1988B HARDWARE VOLUME CONTROL VDD

To use the GPIO_0/VOLUME pin (Pin 2) as a GPIO pin, it is recommended to pull it down using a 10 kΩ resistor (Pin 2 to DVSS). In the GPIO configuration, the volume control widget has no effect.

GPIO_0/VOLUME R2 10kΩ

R3 5.1kΩ

R4 3.3kΩ

SW1

SW2

SW3

UP

DOWN

MUTE

05843-008

OPTIONAL

Figure 4 . Volume Control Circuitry

O

BS

O

LE

The AD1988A/AD1988B support external volume control on Pin 2 (GPIO_0/VOLUME). The circuit diagram in Figure 4 allows up/down/mute control using only three switches and four resistors external to the codec. The up/down switches can also be replaced by a center-position-off SPDT toggle switch. The mute switch is optional, but desirable, for a satisfactory user interface.

When the GPIO_0/VOLUME pin (Pin 2) is used as a volume control, pull-up Pin 2 to AVDD. The volume control widget operates the codec volumes only under software control. If one of the buttons is pressed, the control volume setting is incremented (up), decremented (down), or set Bit 7 (mute). The volume control supports 40 steps (other than mute) and uses a range of 0 (0x00, minimum volume) to 63 (0x3F, maximum volume). Pressing the mute switch (or both up and down simultaneously) toggles Bit 7 which indicates mute on/off.

TE

R1 3.3kΩ

Rev. 0 | Page 19 of 20

AD1988A/AD1988B OUTLINE DIMENSIONS 0.75 0.60 0.45

9.00 BSC SQ

1.60 MAX

37

48

36

1 PIN 1

7.00 BSC SQ

TOP VIEW

1.45 1.40 1.35

0.15 0.05

(PINS DOWN)

0.20 0.09 7° 3.5° 0° 0.08 MAX COPLANARITY

SEATING PLANE

25

12 13

24

0.27 0.22 0.17

VIEW A

0.50 BSC LEAD PITCH

VIEW A ROTATED 90° CCW COMPLIANT TO JEDEC STANDARDS MS-026-BBC

7.00 BSC SQ

TE

Figure 5. 48-Lead Low Profile Quad Flat Package [LQFP] (ST-48) Dimension shown in millimeters

0.60 MAX

37 36

TOP VIEW

O

BS 0.50 BSC

5.25 5.10 SQ 4.95

(BOTTOM VIEW)

25 24

0.80 MAX 0.65 TYP

SEATING PLANE

1

EXPOSED PAD

6.75 BSC SQ

0.50 0.40 0.30

12° MAX

PIN 1 INDICATOR

48

LE

PIN 1 INDICATOR

1.00 0.85 0.80

0.30 0.23 0.18

0.60 MAX

12 13

0.25 MIN 5.50 REF

0.05 MAX 0.02 NOM

0.20 REF

COPLANARITY 0.08

COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2

O

Figure 6. 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 7 mm × 7 mm Body, Very Thin Quad (CP-48-1) Dimension shown in millimeters

ORDERING GUIDE Model AD1988AJSTZ1 AD1988AJSTZ-RL1 AD1988AJCPZ1 AD1988AJCPZ-RL1 AD1988BJSTZ1 AD1988BJSTZ-RL1 AD1988BJCPZ1 AD1988BJCPZ-RL1 1

Audio Output Performance 95 dB 95 dB 95 dB 95 dB 101 dB 101 dB 101 dB 101 dB

Temperature Range 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C

Package Description 48-Lead LQFP, Tray 48-Lead LQFP, Reel 48-Lead LFCSP_VQ, Tray 48-Lead LFCSP_VQ, Reel 48-Lead LQFP, Tray 48-Lead LQFP, Reel 48-Lead LFCSP_VQ, Tray 48-Lead LFCSP_VQ, Reel

Package Option ST-48 ST-48 CP-48-1 CP-48-1 ST-48 ST-48 CP-48-1 CP-48-1

Z = Pb-free part.

Dolby and Dolby Master Studio are trademarks of Dolby Laboratories. DTS is a trademark of DTS, Inc. Windows Vista is either a registered trademark or trademark of Microsoft Corporation in the United States and/or other countries. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05843-0-10/06(0)

Rev. 0 | Page 20 of 20