November 2008
USB 101: Part 1 - USB Basics Training PC114 Prepared by: Nathan Lee (Market Segment Engineer) Presented by: Derek Lau (Systems Solutions Engineer) TM
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Objectives
Upon completion, participants will: ►Discover
the usefulness of USB in embedded systems
►Understand ►Learn ►Be
fundamental USB protocol and architecture
the basic terms of USB
aware of important factors in designing a USB application
►Have
an understanding of the available Freescale USB solutions
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Agenda
► Introduction to USB • USB Evolution • Why USB? ► USB Fundamentals • USB Speed Comparison • Topology • Connectors & Physical Interface • USB Transfer Types • USB Frame ► Controller Continuum, • Overview • Quick Demo
• • • •
USB Transactions USB Packets, Descriptors USB Classes Enumeration
USB Solutions
► Questions
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What is the history of USB? Introduction to USB
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USB Evolution ►1994
USB was created by Compaq, Intel, Microsoft, and NEC
►1995
USB Implementers Forum (USB-IF) established
►1996
1.0 USB specification released
•
Full-speed (FS, 12 Mbps)
•
Low-speed (LS, 1.5 Mbps)
►1998
1.1 USB specification released
►2000
2.0 USB specification released
•
High-speed (HS, 480 Mbps) defined
►2001
USB On-The-Go (OTG) supplement added to USB 2.0 specification
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Why USB? Ease of Use
Plug and Play
Low Cost
Flexible
Availability
Reliability
Fast Data Transfers
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Why USB? ►Ease of Use • True Plug and Play – Hot Plug • One connector for data and power • Auto detect and configuration • Limited user intervention required for configuration • THE interface for external peripherals to a PC
Removes serial (COM), parallel (LPT), game/MIDI, etc.
►Fast Data Transfers • Low Speed – 1.5 Mbps (USB 1.1 and 2.0) • Full Speed – 12 Mbps (USB 1.1 and 2.0) • High Speed – 480 Mbps (USB 2.0 only)
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Why USB? ►Reliability
Lossless data transfers • Rigorous compliance testing ensures compatibility •
►Flexible
Wide range of simultaneously accessible peripherals can be attached via USB • Protocol flexibility for multiple transfer types •
►Availability •
PC 2001 System Design Guide created by Intel and Microsoft requires all new PCs to have two user-accessible USB ports
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Why USB? What are some uses for USB in embedded systems? ►Diagnostic • •
Replace old serial interfaces to PC or other data collection devices Faster communications than legacy protocols
►Service • •
data acquisition from embedded systems
Port
Used to upgrade Firmware Download data to USB Drive
►Upgradeable • • • •
Printer Camera Human Interfaces Custom Add On Box
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What are the properties of USB? USB Fundamentals
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USB Speed Comparison
USB Speeds LS USB Low speed
FS USB Full Speed
HS USB High Speed
Ethernet CAN Parallel Port
Serial
500Kb/s
1Mb/s
1.5Mb/s
12Mb/s
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100Mb/s
480Mb/s
1Gb/s
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USB Speed Comparison Spec
Data Rate and Performance
Applications
Notes
USB 1.1 Low-speed USB 2.0 Low-speed
1.5 Mbps 10-100 Kbps
Keyboard, mouse, joystick
Low cost but limited performance; type and number of endpoints are limited
USB 1.1 Full-speed USB 2.0 Full-speed
12 Mbps 5-10 Mbps ~1 Mbytes/sec
Printers, audio devices
Moderate performance; guaranteed latency; guaranteed bandwidth
USB 2.0 High-speed
480 Mbps 25-400 Mbps ~40 Mbytes/sec
Video, storage, imaging
Vast bandwidth improvements
USB 2.0 OTG Full-speed USB 2.0 OTG High-speed
Same as Full and High speed
PDA, Camera, Cell phone
Flexible; bus power is limited
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How is USB structured? USB Fundamentals
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Topology is a single host with multiple devices ► Tiered Star ► Up to 127 devices ► Devices are one of the following:
Host
► USB
Root Hub A A A B
• Hubs
(provide additional attachment points) • Devices (functions) which provide capabilities to the system ► Up
B
2.0 Hub
1.1 Hub
A
B
to 7 tiers
• Can
have up to 5 hubs deep with a max of 5 meters between each hub
1.1 Hub
► USB
device can be no farther than 25M from the host controller
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B
Device
A
A
B
B
Device
Device
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Topology - USB Host Features ►Configuration •
i.e. Device Enumeration
►Transaction • • • •
•
manager
Everything is controlled by the Host Responsible for undertaking all transactions and scheduling bandwidth Schedule guarantees fair access to the shared bus Data can be sent by various transaction methods using a token-based protocol
►Power •
of all devices on the bus
manager
Host provides power that it supplies to buspowered devices Can place devices into low-power mode
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Topology - USB Hub Features ► Hubs •
add additional USB ports
Hub plugs into an upstream port and provides multiple downstream ports
► Help
to isolate low and full-speed devices from the high-speed portions of the bus
► Timing
delays through hubs are accounted for in the spec
► Hubs
handle power management for downstream devices
► USB
Spec allows for up to 5 hubs between the Host and farthest device
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Topology - USB Device Features ►
The device is strictly a slave •
Each interface can be viewed by the host as a separate device utilizing separate host-side device drivers
Device implements one or more functions/interfaces ► Performance is governed by the USB Host due to bandwidth allocations ► Each interface is composed of one or more data pipes/endpoints ►
• •
►
Ultimate data source or sink at the device end Unique address, unidirectional, transfer characteristics
Each device can have up to 16 endpoints • •
Endpoint 0 is always a control endpoint 1 Bidirectional Endpoint = 1 IN and 1 OUT
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Topology - USB On-The-Go (OTG) ► On-The-Go
(OTG) devices do not require a normal USB Host and can communicate directly with each other (peer-to-peer only) ► OTG devices can either be a OTG Host or OTG Device ► OTG Host only required to supply 8mA on the USB bus ► Freescale MCUs/MPUs with OTG modules can operate as a USB Host, USB Device, or USB OTG (Host or peripheral) OTG Product in Peripheral mode
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Same OTG Product in Host mode
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USB Connectors & Receptacles B-connector • Downstream • Device Port
A-connector • Upstream • Host Port • Supplies Power
Receptacles
Connectors
Used with permission: Newnex Technology, 1231 Alderwood Ave., Sunnyvale, CA 94089 (408) 749-1480 voice, (408) 749-1963 fax
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USB Physical Layer and Power ► 5V
Supply voltage ► 4-wire connector cable •
•
D-
Vbus (Pwr)
Power, Ground, D+, D-
► 2-wire •
D+
GND
differential signaling
3.3 V for low- and full-speed 400mV for high-speed
► Non
Return to Zero Inverting (NRZI) Data Encoding coded with bit stuffing
► Devices
may be completely bus-powered or self-powered Suspended State
Operating State
Low Power Device
0.5mA Max (After 3ms)
100mA Max
High Power Device
2.5mA Max (After 3ms)
500mA Max
OTG Bus Power
Minimal 8mA
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USB Compliance What are the steps of becoming USB Compliant? i.e. Displaying the USB Logo ►Must •
be assigned a 16-bit number Vendor ID (VID) by the USB-IF
Two Methods Join the USB-IF ($4,000 yr) Logo licenses ($2,000 for 2yr)
►Pass •
the Compliance Testing
Two Methods “Plug Festa” event… (3 or 4 times a year and spots are limited) Commission an independent test lab
•
~$1,500
For more information: www.usb.org/developers/vendor/
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USB Fundamentals ► How
does USB protocol handle the range of USB products? ► USB products vary from keyboards to disk drives…
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USB Transfer Types ►Multiple transfer types • Control Transfers (Configure and Send Commands) • Bulk Transfers (Burst Data) • Isochronous Transfers (Streaming Data) • Interrupt Transfers ►Device
functions use one or more transfer types to build their applications
►All
data is transferred to or from a device endpoint
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USB Transfer / Endpoint Types ►Control •
• • • • •
Host software-initiated request/response communication Typically used for command/status operations Burst and non-periodic transfers All devices must implement at least one Control pipe on endpoint 0 Used in the enumerate process Bidirectional transfers Most extensive error checking offered by USB Always available to the USB Host
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USB Transfer / Endpoint Types ►Bulk • Used to transfer large amounts of data • Fastest transfer type and most popular • Guaranteed delivery due to error correction protocol • Supports packet sizes of 8, 16, 32, 64, or 512 bytes • Supported in Full Speed and High Speed Devices • All higher priority traffic is given bandwidth first, bulk traffic fills in the remaining gaps in the frame • Common Applications: Printers Scanners Disk Drivers (Mass Storage Device)
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USB Transfer / Endpoint Types ►Isochronous • • • • • •
•
Used for audio and video streams No error checking is performed and the end application must accept some lost pockets Host transmits a start-of-frame indicator so that devices can stay synchronized Packets sizes from 0-1024 bytes Supported in Full Speed and High Speed Devices Host guarantees specific number of packets per (micro-)frame USB 1.1 guarantees one packet USB 2.0 offers up to 3 packets per micro-frame Common Applications Music Videos Streaming Real-time Data Web Cameras
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USB Transfer / Endpoint Types ►Interrupt • • • •
Used for sending status or data on a specific interval Guaranteed Latency Host guarantees the endpoint will be serviced no slower than the requested polling time (e.g. 1 packet every 5 frames) Common Applications Mice Joysticks Keyboards Touch screens
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USB Transfer Types - Summary Transfer Type*
Guaranteed Data Delivery
Guaranteed Packet Size in Latency bytes*
Control LS FS HS
Bulk FS HS
Isochronous x
FS HS
Interrupt LS, FS HS
x
► 8:
LS ► 8, 16, 32, 64: FS ► 64: HS
► 10%
► 8,
Uses unallocated frames
16, 32, 64: FS ► 512: HS
x
x
Frame Allocation
to 1023: FS ► Up to 1024: HS
of Frame ► 20% of MicroFrame
► Up
► Up
to 64: LS, FS ► Up to 1024: HS
► 90%
of Frame ► 80% of MicroFrame
*Low Speed (LS), Full Speed (FS), High Speed (HS)
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USB Transfer Types - Summary Embedded System Control Transfers Bulk Transfers USB Flash Drive USB Host Control Transfers Isochronous Transfers USB Camera Control Transfers Interrupt Transfers USB Touch Screen
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USB Frames Host initiates all transactions ► Peripherals share the USB bandwidth through a host-scheduled, token based protocol ► Bus time is divided into segments called frames (1ms) or micro-frames (high-speed, 125us) ► USB frame scheduling can present problems to embedded systems – minimum timings must be met for the bus to function. You are no longer always in control of your embedded device!
► Remember…
Camera Isochronous
Control
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Control
SOF
One LS or FS USB Frame = 1 msec Touch Screen
Interrupt
Flash Drive Bulk
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USB Fundamentals ► How
does USB communicate? ► Mixing the Software and Hardware
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USB Transactions ► Endpoint
(EP) is an uniquely addressable portion of the peripheral that is the source or receiver of data (USB RAM Buffer)
► Max • •
number of endpoints is 16 according to the USB spec
IN Endpoint – Hosts reads data OUT Endpoint – Hosts writes data
► Allows
isolation of command path from data path(s)
► Endpoints
can be grouped to form a complex device which the OS treats as completely separate devices (i.e. All-in-one Printer)
► Pipes
are logical connections between endpoints on a device and the host controller’s software
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USB Transactions
Endpoints from the Device’s point of view USB Device
FROM Host
TO Host
Control Pipe
Control EP
Data Pipe
OUT EP
Data Pipe
OUT EP
Control Pipe
Control EP
Data Pipe
IN EP
USB Firmware
Application Firmware
Real World
Endpoints are a KEY abstraction Diagram Source: “The EASY Way to Create I/O Devices” Presentation by John Hyde Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
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USB Transactions Transfer = Σ Transactions Transfer Transaction Transaction Transaction
Transfer is a process of carrying out a command from the USB Host (i.e. scan the paper) ► Transaction is the delivery of data to an endpoint ► Host software splits transfers into multiple transactions by allocating transactions to a USB frame ► USB frame can contain several transactions and transfers may span multiple USB frames ►
Transaction 1 msec USB Frame
Diagram Source: Embedded Systems Academy: USB Basics Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
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USB Transactions Transfer = Σ Transactions = Σ Packets Transfer Transaction Transaction Transaction ► Packet
is a block of information
► Transaction
is set up based on the device’s attributes and is a group of packets
Sync
Packet
Packet
Packet
PID Packet Spec Inform CRC EOP
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USB Packets ► Synchronization
(Sync) sequence allows USB device to synchronize to data rate of incoming bits within packet ► Packet Identifier (PID) is a bit pattern which defines the type of packet ► Packet specific information varies (address or data) depending on packet type •
Information may consist of USB device address, frame number, data to be transferred to or from USB device, etc.
► Cyclic
Redundancy Check (CRC) bits are used to verify correct delivery of packet specific information •
Data packets use a 16-bit CRC. All other packets use a 5-bit CRC.
► End
of Packet State (EOP) states the termination of the packet Packet
Sync
PID Packet Spec Inform CRC EOP
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USB Packets ►Four •
Token – Header defining what to expect next
• •
SOF, SETUP, OUT, and IN
Data – Optional and contains information Handshake – Acknowledges the transaction and provides a means of error correction
•
types of packet identifiers (PID)
ACK, NAK, and STALL
Special – Low Speed USB Preamble
Token Packet 8 bits
8 bits
7 bits
4 bits
Sync
PID Device Addr EP #
5 bits
2 bits
Handshake/Special Packet
CRC EOP
Data Packet 8 bits
8 bits
0-1023 bytes
16 bits
2 bits
Sync
PID
Data Field
CRC
EOP
8 bits
8 bits
2 bits
Sync
PID
EOP
Detailed Summary of the USB Packets are located in the backup slides.
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USB Packets
USB Device ►Example
of a Typical Bulk Transaction
IN Token Packet DATA Token Packet ACK Handshake Packet Send me file abc.xyz
Here’s the file
I received the file
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USB Fundamentals ► How
is the USB software structured?
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USB Descriptors ►USB spec defines standard descriptors • Used to identify the device and to describe the device’s capabilities • Descriptors are stored in non-volatile memory on the USB device • Vendors can also define their own descriptors • Standard Descriptors include:
Device Configuration Interface Endpoint String – Optional Interface 0 Descriptor Device Descriptor
Configuration Descriptor Interface 1 Descriptor
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Endpoint x Descriptor Endpoint y Descriptor Endpoint z Descriptor
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USB Descriptors - Device Descriptors ► Who
are you? What driver should be loaded? ► Device descriptor of a USB device represents the entire device ► USB device can only have one device descriptor ► Descriptors specify: • • • •
Supported USB version Maximum packet size Vendor and Product IDs – used to load the proper USB driver Number of possible configurations the device can have Device Descriptor
USB 2.0 64-Byte Max Packet Size Vendor ID = 0xFE01 Product ID = 0x0FEA
Interface 0 Descriptor Configuration Descriptor
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Interface 1 Descriptor
Endpoint x Descriptor Endpoint y Descriptor
Endpoint z Descriptor
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USB Descriptors - Configuration Descriptor ► What
resources do you need? ► USB device can have several different configurations, but only one can be enabled at a time ► Configuration descriptor specifies • • •
Self power or Bus power Maximum power consumption Number of interfaces
► Joystick • •
with multiple configurations
Bus power – Normal mode Self power – Force Feedback
Device Descriptor
Configuration Descriptor Self Powered 100 mA Max Current 2 Interfaces
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Interface 0 Descriptor
Interface 1 Descriptor
Endpoint x Descriptor Endpoint y Descriptor
Endpoint z Descriptor
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USB Descriptors - Interface Descriptor ► What
are your capabilities? ► Interface descriptor is a header or grouping of the endpoints into a functional group performing a single feature of the device ► USB devices can have 1 or more interface descriptors enabled at once ► Example of an User Interface panel with multiple interfaces: • • •
Touch Screen with a smart card interface port Interface descriptor 0 describes the touch screen functions Interface descriptor 1 describes the smart card functions Interface 0 Class Code = 0x0018 4 Endpoints
Device Descriptor
Configuration Descriptor
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Interface 0 Descriptor
Interface 1 Descriptor
Endpoint x Descriptor Endpoint y Descriptor
Endpoint z Descriptor
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USB Descriptors - Endpoint Descriptor ► How
will you transfer data? ► Host will use the information returned from these descriptors to determine the bandwidth requirements of the bus ► Endpoint descriptors are used to describe endpoints other than endpoint 0 ► Endpoint descriptors’ properties Endpoint 1 IN Bulk Transfer Type • Direction (in or out) 64-Byte Max Packet Size • Type of end point Address = 0xFFFE • Maximum packet size Endpoint 1 • Address Device Descriptor
Configuration Descriptor
Interface 0 Descriptor
Interface 1 Descriptor
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Descriptor
Endpoint y Descriptor Endpoint z Descriptor
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USB Descriptors Summary ►Configuration
= Σ Interfaces = Σ Endpoints Application Program I/O Manager
Device Driver 1
OUT EP
Cntrl EP
Interrupt Pipe
IN EP
Control Pipe
Bulk Pipe
Interface 1
OS
Device Driver 2
USB Host USB Device
Config 1
Interface 2 IN EP
OUT EP
OUT EP
Real World
Diagram Source: “The EASY Way to Create I/O Devices” Presentation by John Hyde Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
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USB Classes ►A
USB class is a group of devices (or interfaces) which have certain attributes or services in common ► USB classes were defined to allow manufactures to build products without necessarily having to develop code for the USB Host ► Examples of USB Classes •
HID – Human Interface Device
•
Mass Storage
•
Flash Drive, Hard Drive, DVD, etc.
Communications
•
Mouse, Keyboard, Volume Controls, etc.
ADSL and Cable modems, Ethernet adapters
Smartcards, Audio, etc.
► Current
specifications of class drivers may be found on the USB home page (www.usb.org)
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Base Class
Description
01
Audio
02
Communications and CDC Control
03
HID (Human Interface Device)
05
Physical
06
Image
07
Printer
08
Mass Storage
09
Hub
0A
CDC-Data
0B
Smart Card
0D
Content Security
0E
Video
0F
Personal Healthcare
DC
Diagnostic Device
E0
Wireless Controller
EF
Miscellaneous
FE
Application Specific
FF
Vendor Specific
As of March 2, 2006
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Defined USB Classes
Above is an example of the Mass Storage class specs available on the USB.org website.
www.usb.org/developers/defined_class
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Putting it All Together
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Enumeration
Configuration of a device on the USB is known as Enumeration
1. 2. 3. 4. 5. 6.
Device attaches to the bus Host sees the Device, then waits ~120ms for the device to settle Host sends a reset signal to the Device Host begins Enumeration by requesting (EP0) the new Device’s Device Descriptor and determines if there are enough resources left on the bus Host assigns the Device a unique address, requests the remainder of the Descriptors, and loads the appropriate driver(s) The Device is now configured and is ready to go!
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Freescale Microprocessors with USB Capabilities www.freescale.com/usb Freescale Semiconductor Proprietary Information. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2008.
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Freescale USB Product Families
S08/CF USB Low Cost Solutions
Production - Available NOW Execution - Specification Frozen, High Confidence Schedule Planning - Specification Subject to Change, Tentative Schedule
S12
The JM family is part of the controller continuum Users can easily migrate from an S08 to a V1 core (51JMxx)using the same peripheral and 52223 tool set.
256kB
52221
51JM128
52223
52223
CF MPU
52221
52221
CFV2 MCU
52211
52211
CFV1
52211
Memory kB
128kB
51JM128
Package
51JM96
96kB
52210
51JM64
60kB
S08JW32
51JM64
32kB
S08JM60
S08JM60
S08JM60
16kB
S08JM32
S08JM32
S08JM32
S08JM16
S08JM16
S08JM16
S08JM8
S08JM8
S08JM8
32LQFP
44LQFP
8kB
S08
51JM96
48QFN
52210
51JM64
S12 UF32
For higher performance needs, the V2 core (52xxx) is available in several packages. Pin compatible across the 521x family (a non-USB family) S12 UF32
PIN COMPATIBLE
64LQFP
80LQFP
Freescale Semiconductor Proprietary Information. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.
81BGA
100LQFP
TM
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The Controller Continuum. Only from Freescale.
RS08
S08
ColdFire® V1 ColdFire V2
ColdFire V3
ColdFire V4
8-bit
32-bit MCU: MC9S08JM General Purpose 8-Bit MCU Single chip USB solution
S08 USB device
Full Speed USB Device
V1 CF USB OTG
Full speed USB OTG
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
MCU: MCF51JM General Purpose 32-Bit MCU Single chip USB solution
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MCS08JM60/JM32
►S08
Core 48MHz S08 core 24MHz bus frequency 2.7—5.0V operating range
The Flexis™ Series with USB Device JM Block Diagram
►Memory
Up to 60KB flash Up to 4KBytes SRAM 256Bytes USB RAM
60K/32K Flash
Full Speed USB 2.0 Device
MCG
►Features
2x SCI, I2C, 2x SPI 8 channel KBI 16-bit timers: 1 x 2-ch, 1 x 6-ch 12-bit 12 channel A-to-D converter Analog comparator Up to 51 general purpose I/O Multiple Purpose Clock Generation PLL FLL On-chip oscillator External crystal support
►Complete
USB Solution Integrated USB 2.0 full speed device Complimentary USB SW Stack CodeWarrior for Microcontrollers Processor Expert
2 SCI
4K/2K RAM
Comparator
2 SPI 256Bytes USB RAM
KBI
6-ch., 16-bit Timer
S08 Core
Indep. Clocked COP
2-ch., 16-bit Timer
IIC ICE+BDM
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
RTC
12-ch., 12-bit ADC
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MC9S08JM60/JM32 MCU
At a glance
Part Number
MC9S08JM60
MC9S08JM32
Temp Range
Key Features
Package
-40 to 85
64-pin LQFP USB 2.0 full speed; 12-bit 12 channel 64-pin QFP ADC, 60K Flash, 4K SRAM, operation 48-pin QFN range 2.7V~5.0V 44-pin LQFP
-40 to 85
64-pin LQFP USB 2.0 full speed; 12-bit 12 channel 64-pin QFP ADC, 32K Flash, 2K SRAM, operation 48-pin QFN range 2.7V~5.0V 44-pin LQFP
Speed
Pricing*
48MHz
$ 3.05 $ 3.05 $ 2.95 $ 2.90
48MHz
$ 2.36 $ 2.36 $ 2.29 $ 2.27
*Preliminary Suggested 10K Resale Pricing. Subject to change
Development System
Enhanced Out of Box DVD Code Examples Stacks App. Notes
Demo board
Pricing
DEMOJM
$99
Freescale Semiconductor Proprietary Information. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.
TM
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48MHz S08 or ColdFire V1 core 24MHz bus frequency 2.7—5.0V operating range
Introducing the Flexis™ USB Family S08 and ColdFire® V1 JM
Memory S08 Up to 4KBytes SRAM; Up to 60KB flash ColdFire V1 Up to 16KBytes SRAM; Up to 128KB flash Features 2x SCI, I2C, 2x SPI 8 channel KBI 16-bit timers: 1 x 2-ch, 1 x 6-ch 12-bit 12 channel A-to-D converter Analog comparator Up to 51 general purpose I/O Multiple Purpose Clock Generation PLL On-chip oscillator External crystal support Integrated CAN Module (ColdFire V1 only) Cryptographic Acceleration Unit (ColdFire V1 only) Complete USB Solution Integrated USB device (S08) or USB on-the-go (ColdFire V1) Complimentary USB SW Stack CodeWarrior® for Microcontrollers Processor Expert
Freescale Semiconductor Proprietary Information. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.
S08JM60 Packages 64LQFP, 64QFP 48QFN, 44LQFP ColdFire JM128 Packages 80LQFP, 64LQFP, 64QFP, 44LQFP Temperature Range -40C to 85C
TM
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Software Solutions and Application Notes Complementary Software Solution
USB Lite stack by CMX USB Device Support HID Keyboard
HID Mouse
HID Joystick
CDC to UART
Application Notes available before Launch Number Content AN3564 In-depth understanding for the Freescale USB Stack for S08JM devices AN3561 USB bootloader for HCS08JM60 AN3560 USB device development with JM60/16 (or In-depth understanding JM60/16 USB module) AN3565 USB and Using the CMX USB Stack with the JM devices
Direct interface to CodeWarrior IDE
CodeWarrior® for Microcontrollers
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
TM
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The Controller Continuum. Only from Freescale.
RS08
S08
ColdFire® V1
ColdFire V2
ColdFire V3
8-bit
ColdFire V4
32-bit MCF5221x 64K, 128K Flash USB OTG
MCU: MCF5222x Up to 256K Flash Single chip USB solution
MCF5222x 128K, 256K Flash USB OTG
Full Speed USB OTG MCF5253 USB OTG CAN
High Speed USB OTG
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
MCU: MCF5221x Down to 64K Flash Single chip USB solution
MPU: MCF5253 High performance Flexible Interface Options
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ColdFire®: MCF52210, MCF52211 68K/ColdFire V2 Core • Up to 76 Dhrystone 2.1 MIPS @ 80 MHz • MAC Module and HW Divide • No external bus
Memory • 16K bytes SRAM • Up to 128K bytes Flash • 100K W/E cycles, 10 years data retention
BDM
PLL
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
GPI/O
JTAG
4ch 32-bit Timer
USB OTG
3x UART
4ch 16-bit Timer
QSPI
2 x I2 C
2ch PIT
8-ch 12-bit ADC
4 ch. DMA
Watchdog Timer
8ch PWM
RTC
Key Features
16K SRAM
MAC
• USB 2.0 full-speed Host/Device/On-the-Go Controller with Integrated PHY • Three (3) UARTs • Queued Serial Peripheral Interface (QSPI) 64KBytes Flash • Two (2) I2C bus interface modules • 4 ch. 32-bit timers with DMA support 128KBytes • 2 ch. Periodic Interrupt Timer Flash • 8 ch. PWM timer with enhanced DAC capabilities • 2nd Watchdog timer with independent clock Memory Options • Real Time Clock with 32kHz Oscillator • 8 ch. 12-bit A-to-D converter with Simultaneous Sampling • Up to 56 General-Purpose I/O • Starting from $4.39 at 10k resale with USB • Starting from $3.99 at 10k resale without USB
32kHz Osc.
V2 ColdFire® Core
System Integration
Single 3.3V Power Supply Temp Range: -40°C to +85°C 64 LQFP/QFN, 81 MAPBGA
TM
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V2 ColdFire Core
ColdFire® MCF52212, MCF52213 New USB Devices
• Up to 46 Dhrystone 2.1 MIPS @ 48MHz • MAC Module and HW Divide • No external bus BDM
PLL
32kHz Osc.
GPI/O
JTAG
Memory • Up to 8Kbytes SRAM • Up to 128K bytes flash • 100K W/E cycles, 10 years data retention
4ch 32-bit Timer
USB OTG
3x UART
4ch 16-bit Timer
QSPI
2 x I2 C
Key Features
• • • • • •
8-ch 12-bit USB 2.0 full-speed OTG with integrated PHY 4 ch. DMA 128KBytes 2ch PIT ADC Flash Three (3) UARTs Queued Serial Peripheral Interface (QSPI) 8K Watchdog 8ch SRAM 2 RTC Two (2) I C bus interface modules Timer PWM 4 ch. 32-bit timers with DMA support 64KBytes 2 ch. Periodic Interrupt Timer Flash V2 8 ch. PWM timer with enhanced DAC capabilities and System ColdFire® 8K PCM for enhanced signal quality Integration Core SRAM 2nd Watchdog timer with independent clock Memory Options Real Time Clock (RTC) with 32kHz Oscillator 8 ch. 12-bit A-to-D converter with Simultaneous Sampling Up to 56 General-Purpose I/O Single 3.3V Power Supply Temp Range: -40°C to +85°C; 0°C to +70°C MCF52213 Starting from $3.74 at 10k resale with 128K Flash 64 LQFP MCF52212 Starting from $2.84 at 10k resale with 64K Flash
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
MAC
• • • • • • •
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ColdFire®: MCF5222x
68K/ColdFire V2 Core • Up to 76 Dhrystone 2.1 MIPS @ 80 MHz • MAC Module and HW Divide No external bus
BDM
JTAG
I2C
UART
4ch 16-bit Timer
QSPI
UART
16K SRAM
2ch PIT
8-ch 12-bit ADC
UART
128KBytes Flash
8ch PWM
4ch DMA
• Up to 32K bytes SRAM • Up to 256K bytes Flash • 100K W/E cycles, 10 years data retention
32K SRAM
RTC
256KBytes Flash
MAC
• USB 2.0 full-speed Host/Device/On-the-go Controller with integrated PHY • 3 UARTs • Queued Serial Peripheral Interface (QSPI) • I2C bus interface • 4 ch. 32-bit timers • 4 ch. 16-Bit Capture/Compare/PWM timers • 2 ch. Periodic Interrupt Timer • 8/4 ch. PWM timer • Real Time Clock • 8 ch. 12-bit A-to-D converter • Up to 56 General-Purpose I/O • Prices starting at $5.49 at 10k resale
GPI/O
4ch 32-bit Timer
Memory Options
Key Features
PLL
Memory Options
USB otg
V2 ColdFire ColdFire® Core
Memory Option
System Integration
Single 3.3V Power Supply Temp Range: -40°C to +85°C 64 LQFP/QFN, 81 MAPBGA
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
TM
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68K/ColdFire V2 Core
ColdFire®: MCF5253VM140
• Up to 125 Dhrystone 2.1 MIPS @ 140 MHz • Enhanced MAC Module and HW Divide
• 8K bytes I-Cache • 128K bytes SRAM • SDRAM Controller
Key Features • USB 2.0 Hi-speed Host/Device/On-the-Go Controller with Integrated PHY • Two CAN 2.0B (Controller Area Network) Modules • I2S interface (Rx x2/Tx x3) • Three UARTs (with flow control) • Queued Serial Peripheral Interface (QSPI) (master only) • Two I2C Controllers • Dedicated ATA hard disk interface • SmartMedia interface (including IDE and compact flash) • Flash Media Card interface • Real Time Clock module • Two ch. 16-Bit Capture/Compare/PWM timers • Four ch. DMA controller with 4 DMA channels • Six ch. 12-bit A/D converter • 16-bit non-multiplexed data bus with 4 chip selects • Prices starting at $8.64 at 10k resale.
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.
BDM
PLL
Up to 60 GPIO
JTAG
Hi-speed USB OTG
QSPI
I2S Tx x3 / Rx x2
RTC
CAN x2
UART x3
I2C x2
2ch 16-bit Timer
6ch 12-bit ADC
4ch DMA
ATA/IDE Interface
Flash Media Interface
8K I-Cache
EMAC EMAC
Memory
128K SRAM
V2 V2 ® Cold Cold Fire Fire ® Core Core
System Bus Controller
SDRAM Controller & Chip Selects
140MHz@ 1.2/3.3V, Low Power
