Thermal Design Considerations For System in Package MicroElectronic Packaging & Test Engineering Council
Enabling a Microelectronic World®
Jesse Galloway Ph.D. Applied Engineering & Characterization February 16, 2005
What is a System in Package?
A fully integrated system or sub-system •
One or more semiconductor chips plus:
•
Passive components otherwise integrated on the mother board. — — —
•
Other subsystem components –
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Surface mount discrete passives. Embedded or patterned into substrate. Integrated passive components.
EMI shield, SAW/BAW filters, packaged ICs, connectors, antennas, mechanical housings, etc.
February 16, 2005, JESSG
Product Using SiPs MicroProcessors
Graphic Cards
Cell Phones
Telecom
PDAs http://xcski.com/gallery/cooling/dscn1015
Digital Cameras
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Why Consider System in Package? • System integration • Reduce manufacturing steps at OEM
• Increased electrical performance • Increased packaging/system density
• Reduce overall cost © 2005 Amkor Technology, Inc.
February 16, 2005, JESSG
Package Options Lead Frame
Wire Through ePad
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Standard
Array
Cavity-up
Cavity Down
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Lead Frame
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Plastic Ball Grid Array (MCM)
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Package Stacking •
Higher final test yield because each package in stack is tested before final assembly. CABGA, S-CSP family low cost
•
Easier to integrate die from multiple suppliers.
•
FA is simplified.
•
Ideal for logic plus memory integration.
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February 16, 2005, JESSG
PoP Thermal Analysis
SRAM FLASH Logic
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Stack CSP BASEBAND DRAM
FLASH
DRAM BASEBAND
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FLASH
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CSP Thermal Analysis
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Flip Chip Ball Grid Array System Integration
http://services.e21corp.com/ase_newsletter/tech_focus.htm
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Why Is Controlling Temperature Important?
R.K. Kirschman, “Cold electronics: an overview”, Low Temperature Electronics, Ed. R.K. Kirschman, pp. 9, 10 1986.
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Why Is Controlling Temperature Important?
Electrical performance changes with temperature
Reliability decreases with temperature
Reference: Influence of temperature on microelectronics and system reliability, by Lall, Pecht and Hakim
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Heat Paths ePad
To Application Board
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Heat Paths (Array Style Packages)
Solder Balls Traces Planes
Die
Top of Package
Vias
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Heat Paths Top of Package
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Heat Flow Paths θcaSystem
Package
θba
θjc
System
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θjb
θbrd
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System Vs. Package 7.7mm die Still Air
QFN
2LPBGA TT-01-11
FCBGA + External Heat Sink TT-00-07
Body Size (mm)
12
35
35
Die Size (mm)
8
10.2
9
IO
100
388
680
θ jc
7.5
5.5
0.40
θ jb
6.8
14.0
4.4
θ ja
14.2
25.8
12.0
θ ca
580
68
7.0
θ ba (1s2p JEDEC Board)
13
9
9
Top Heat Flow
2
26
75
Bottom Heat Flow
98
74
25
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February 16, 2005, JESSG
Theta JC Enhancements Plastic Package Designs L
w
Manufacturing Concerns • Wire sweep • Wire shorting • Die contamination • Die stress • Wire bond stress • Adhesion • MRT performance • Mold flow • Warpage control • Cost
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Heat Spreader Designs L
w
Manufacturing Concerns • Die stress • Pump out • Filler size control • Long term stability • Slump • Cost
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Theta JB Enhancements Substrate Style Packages
• Enhanced die attach • Die flag • Open solder mask • Filled vias • Thermal balls
Lead Frame Style Packages
• Enhanced die attach • MRT • Die cracking • Thermal vias on app. Board • Cost
Manufacturing Concerns • Die delamination • Warpage control • Manufacturability • Cost
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February 16, 2005, JESSG
System In Package Thermal Concept
Hot Cold
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Memory
MLF SIP Design Example
Hot
X
• Location of die? • Number of thermal Vias? © 2005 Amkor Technology, Inc.
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JEDEC Thermal Characterization (Current Methods For One Die Only)
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MCM / Stack Models (Multiple Die and Resistances)
Methodology for thermal evaluation of multichip modules By Balwant Lall, Bruce Guenin. IEEE Transactions on components, Packaging and Manufacturing Technology-Part A, Vol. 18, No. 4 1995.
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MCM / Stack Models (Multiple Die and Resistances)
Presented by Li Zhang
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MCM / Stack Models (Multiple Die and Resistances)
Generation of Subassembly Compact Half Models Through Experiment Modeling for Hard Drive Thermal Characterization By Jeff Weiss, Ebyson Thomas and Adesoji Airo 20th ITHERM, March 9 – 11, 2004, San Jose, California © 2005 Amkor Technology, Inc.
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ICEPAK “ACE” Method (FEA Model Reduction)
http://www.icepak.com/prod/icepak/solutions/packages/icepak06.htm
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February 16, 2005, JESSG
Conclusions • SiP will see greater adoption for 2005 – 2006 in wireless, PC and game console markets • Cooling limitations are challenging many higher performance designs • Thermal enhancement options are available through improved design and material selection • MCM style packages require improved thermal characterization methods beyond current JEDEC theta ja methods
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