The University of Texas at Arlington Lecture 12 Communication Peripherals

CSE 3442/5442

PIC Communication Peripherals •  PIC18 family microcontrollers can have several built in peripherals (modules) for serial communication: –  UART/USART/EUSART for asynchronous or synchronous communication, e.g., with computers through COM serial ports –  SPI for 3-wire or 4-wire synchronous communication with peripherals such as external memory or other peripherals –  I2C port for communication with other I2C peripherals (3 wires). •  A specific microcontroller can have more than one such module (e.g., two USART modules) •  Some modules can serve several communication modes (e.g., EUSART, or MSSP – could be SPI or I2C) 2

Serial Communication •  Digital devices that need to communicate can do that through serial or parallel communication •  Serial communication requires less wires (and less pins), and due to crosstalk on long cables, can reach higher total bandwidths. •  Serial communication requires as little as two wires: one for data and one for common ground. •  In order to enable full-duplex communication, we can introduce one more data line, and thus have a unique data line in both directions. •  If clock is not transmitted on a separate wire, then we are talking about asynchronous serial communication 3

Asynchronous Serial Communication •  Most desktops and early laptops used to have so called COM asynchronous serial communication ports (before USB took over entirely). •  Asynchronous serial communication was very important from the beginning for computers to talk to peripherals and thus good standards have been established early (e.g., RS232C-1969). •  Generally, there are three wires needed for RS232-like communication: transmit (TxD), receive (RxD), and common (ground). •  For this type of communication to work, both ends need to be running clocks at the same rate. •  The rate at which bits are transmitted is measured in bps or (as one symbol is transmitted in one clock step) baud. •  Common (standard) baud rates are: 1.2k, 2.4k, 4.8k, 9.6k, 19.2k, 38.4k, 57.6k, 115.2k (but could be any other)

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Async. Serial Communication – Data Framing •  Several bits are transmitted in the same word, but most usually 7,8, or 9. •  The data line has a default high level. •  Transmissions start with one clock cycle worth of 0, a.k.a., start bit •  Then the 7,8, or 9 bits of data follow •  Then an optional parity bit is added (1 if the total number of 1-s in the data are odd). •  Finally, one, or two stop bits follow (stop bits have a value of 1). •  It is of extreme importance that both sides are preset not only with the baud rate, but the number of bits, the number of stop bits and whether to use a parity bit. Otherwise they would miscommunicate.

Overhead? time

LSB

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RS232 Voltage Levels •  What voltage level represents 1’s and 0’s? –  0V, and 5V (TTL levels) were not well established at the creation of this standard, plus they would result in DC level being present on the line –  Logical 1 is represented by a negative voltage between -3V and -25V (-15V being common) –  Logical 0 is represented by a positive voltage between 3V and 25V (15V being common)

•  As microcontrollers usually output 0V for “0” and 1-5V for “1”, external voltage level converters are needed. This requires up conversion. MAX232 is the most common conversion circuit.

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How About Those Other RS232 Pins? •  In addition to RxD, TxD and ground, there are many other signals on RS232 connectors (that are not usually used on microcontrollers) •  They include: shielding, !RTS and !CTS for flow control, DTR and DSR to indicate to the other side that the terminal or the modem is ready, DCD so the modem can tell the computer if a line is available, etc. 7

PIC18 EUSART •  The enhanced universal synchronous, asynchronous receiver transmitter is one peripheral module on the PIC18 that can be used for serial communication. •  Can be configured as: –  ART full duplex –  SRT, master –  SRT, slave

•  Usually associated with PORTC, TRISC has to be thus set appropriately. 8

SFRs •  Six SFRs: –  SPBGR (serial port baud rate generator) –  TXREG (transfer register) (copied to TSR(terminal shift register. Not accessible to the programmer)

–  RCREG (receive register) –  TXSTA (transmit status and control register) –  RCSTA (receive status and control register) –  PIR1 (peripheral interrupt request register1) 9

Baud Rate Generator •  SFR registers are used in the PIC18 to set up the correct baud rate. The Baud rate generator uses these registers. •  BRG is either 8-bit, or 16-bit (changed by BRG16=BAUDCON.3). (BAUDCON is a EUSART feature) •  Depending on BRG16, and BRGH (TXSTA.2), the baud rate is set in different ways. Registers SPBRGH and SPBRG are to set the baud rate (by the user). •  Note, that the baud rate needs to be calculated to be as close to the nominal rate as possible.

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Error in the Baud Rate •  Rarely will the formula provided on the previous page result in an exact baud rate. •  The relative error in the set baud rate can be easily calculated by: relative error[%] = 100*(calculated rate – nominal rate)/ nominal rate

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Error in the Baud Rate (cont’d) •  The data on the Rx pin is sampled three times (each bit) and a majority select circuit decides on its value.

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USART Reception Control Register: RCSTA

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Receiving on UART •  •  •  •  •  •  • 

RX pin needs to be set as input Baud rate has to be set. USART peripheral needs to be enabled (RCSTA.SPEN) Receiving on UART needs to be enabled (RCSTA.CREN) The PIR1.RCIF flag will be raised by the microcontroller if it received a valid byte. The user needs to copy the received byte out of RCREG. This will automatically reset RCIF. Then the microcontroller can receive the next byte without overwriting RCREG (and thus the user loosing data).

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USART Transmission Control Register: TXSTA

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Transmitting on UART •  • 

•  • 

TXREG is an 8-bit register that the user needs to load up with the data to be transmitted. TSR is a shift register that is not user accessible. The program needs to load a byte to be transmitted into TXREG. If TSR is empty this same byte will be loaded into TSR and the TXREG is cleared (to avoid sending the same byte twice). The program can then load another value into the TXREG. After loading the TXREG, the program needs to tell the microcontroller that transmission should start by flipping the TXEN bit in the TXSTA control register. The TXIF (interrupt flag) in PIR1 is set by the microcontroller to notify the program that the last byte has been sent. The program can then load the next byte into TXREG. TXIF cannot be reset from software, it is cleared one instruction cycle after loading the TXREG.

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Transmitting Code Sample #include void main(void) { TXSTA = 0x20; SPBRG = 15; //choose 9.6k baud at 10MHz xtal TXSTAbits.TXEN = 1; //enable transmission RCSTAbits.SPEN = 1; //turn on peripheral while (1) { TXREG=‘Z’; //byte to be transmitted while(PIR1bits.TXIF == 0); //wait until transmitted } }

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UART Reception Sample Code #include void main(void) { TRISB = 0; TRISC = 128; //setting RX bit as input RCSTA = 0x90; //enable serial port and receiver SPBRG = 15; //choose 9.6k baud at 10MHz xtal while (1) { while(PIR1bits.RCIF == 0); //wait to receive PORTB=RCREG; //byte received copied to PORTB } }

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EUSART Synchronous Mode •  Brief description (used rarely) •  Transmission/reception is half-duplex, master needs to set communication direction •  Microcontroller needs to determine if it is a master (generating clock) or a slave (receiving clock) •  Thus scheduling of data transmission between master and slave needs to be handled. •  RX and TX pins become DT (data) and CK (clock) respectively. 19

MSSP Peripheral Module •  PIC18 microcontrollers can have a Master Synchronous Serial Port (MSSP) peripheral. The USART was good for point-to-point connections, the MSSP is good to establish multi-access buses. •  The MSSP can operate in two modes: –  SPI: Serial Peripheral Interface (we have seen this when talking to the DAC) –  I2C: Inter-Integrated Circuit, a popular two-wire, addressable connection bus (proprietary)

•  We are briefly going to cover these two bus technologies without going into detail how they can be used in the PIC18. 20

SPI •  SPI can be either 3-wire or 4-wire (they are not compatible). •  SDI (serial data in), SDO (serial data out), SCLK, and CE (chip enable) make up the 4 signals. 3wire has SDI and SDO connected. •  We have seen the SPI module already with the DAC. •  SPI frame format contains addresses in addition to data 21

Writing to SPI Devices •  Microcontroller assumes the role of a Master and thus generates the clock. •  CE needs to be set high indicating a transaction on SPI. A high bit is clocked out on SDI, indicating a write transaction, followed by a 7-bit address. Then the data that needs to go to that address is clocked out (by multiples of 8 bits, thus address is auto incremented).

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Reading from SPI •  Microcontroller assumes the role of a Master and thus generates the clock for the entire transaction. •  CE needs to be set high indicating a transaction on SPI. A low bit is clocked out by the master on SDI, indicating a read transaction, followed by a 7-bit address. The slave then will respond (clock out) the data stored at that address (by multiples of 8 bits, thus address is auto incremented).

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I2C •  Common bus speeds are 10kbps and 100kbps but can be arbitrary. •  Master node generates clock; four potential modes: master transmits, master receives, slave transmits, slave receives. •  Control to the lines is usually open-collector (open-drain). •  Seven, or ten bits are used for addressing peripheral, then data is transmitted.

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Summary •  Communicating to external peripherals, other microcontrollers, or a computer are must in embedded systems. •  Microcontrollers usually provide several different serial communication methods for the above. •  UART is probably the most common technique used in point-to-point communication, however synchronous communication may be used as well. •  SPI and I2C are two bus standards that allow several microcontrollers or peripheral devices to be connected to the same bus. 25