C248etukansi.kesken.fm Page 1 Tuesday, June 20, 2006 10:41 AM

C 248

OULU 2006

UNIVERSITY OF OULU P.O. Box 7500 FI-90014 UNIVERSITY OF OULU FINLAND

U N I V E R S I TAT I S

S E R I E S

SCIENTIAE RERUM NATURALIUM Professor Mikko Siponen HUMANIORA Professor Harri Mantila

TECHNICA Professor Juha Kostamovaara

MEDICA Professor Olli Vuolteenaho

SCIENTIAE RERUM SOCIALIUM Senior Assistant Timo Latomaa

ACTA

THE DEVELOPMENT OF LASER CHEMICAL VAPOR DEPOSITION AND FOCUSED ION BEAM METHODS FOR PROTOTYPE INTEGRATED CIRCUIT MODIFICATION

SCRIPTA ACADEMICA Communications Officer Elna Stjerna OECONOMICA Senior Lecturer Seppo Eriksson

EDITOR IN CHIEF Professor Olli Vuolteenaho

EDITORIAL SECRETARY Publication Editor Kirsti Nurkkala ISBN 951-42-8139-X (Paperback) ISBN 951-42-8140-3 (PDF) ISSN 0355-3213 (Print) ISSN 1796-2226 (Online)

U N I V E R S I T AT I S O U L U E N S I S

Janne Remes

E D I T O R S

Janne Remes

A B C D E F G

O U L U E N S I S

ACTA

A C TA

C 248

FACULTY OF TECHNOLOGY, DEPARTMENT OF ELECTRICAL ENGINEERING, UNIVERSITY OF OULU

C

TECHNICA

ACTA UNIVERSITATIS OULUENSIS

C Te c h n i c a 2 4 8

JANNE REMES

THE DEVELOPMENT OF LASER CHEMICAL VAPOR DEPOSITION AND FOCUSED ION BEAM METHODS FOR PROTOTYPE INTEGRATED CIRCUIT MODIFICATION Academic Dissertation to be presented with the assent of the Faculty of Technology, University of Oulu, for public discussion in Raahensali (Auditorium L10), Linnanmaa, on August 11th, 2006, at 12 noon

O U L U N Y L I O P I S TO, O U L U 2 0 0 6

Copyright © 2006 Acta Univ. Oul. C 248, 2006

Supervised by Professor Jouko Vähäkangas

Reviewed by Professor Laszlo Nanai Professor Turkka Tuomi

ISBN 951-42-8139-X (Paperback) ISBN 951-42-8140-3 (PDF) http://herkules.oulu.fi/isbn9514281403/ ISSN 0355-3213 (Printed ) ISSN 1796-2226 (Online) http://herkules.oulu.fi/issn03553213/

Cover design Raimo Ahonen

OULU UNIVERSITY PRESS OULU 2006

Remes, Janne, The development of laser chemical vapor deposition and focused ion beam methods for prototype integrated circuit modification Faculty of Technology, University of Oulu, P.O.Box 4000, FI-90014 University of Oulu, Finland, Department of Electrical Engineering, University of Oulu, P.O.Box 4500, FI-90014 University of Oulu, Finland Acta Univ. Oul. C 248, 2006 Oulu, Finland

Abstract In this work the LCVD of copper and nickel from the precursor gases Cu(hfac)tmvs and Ni(CO)4 has been investigated. The in-house constructed LCVD system and processes and the practical utilisation of these in prototype integrated circuit edit work are described. The investigated process parameters include laser power, laser scan speed, precursor partial pressure and the effect of H2 and He carrier gases. The deposited metal conductor lines have been examined by LIMA, AFM, FIB secondary electron/ion micrography, and by electrical measurements. Furthermore, the study of experimental FIB circuit edit processes is carried out and discussed with particular emphasis on ion beam induced ESD damages. It is shown how the LCVD and FIB methods can be combined to create a novel method to carry out successfully circuit edit cases where both methods alone will fail. The combined FIB/LCVD- method is shown to be highly complementary and effective in practical circuit edit work in terms of reduced process time and improved yield. Circuit edit cases where both technologies are successfully used in a complementary way are presented. Selected examples of some special circuit edit cases include RF- circuit editing, a high resolution method for FIB-deposited tungsten conductor line resistance reduction and large area EMI shielding of IC surfaces. Based on the research it was possible for a formal workflow for the combined process to be developed and this approach was applied to 132 circuit edit cases with 85% yield. The combined method was applied to 30% of the total number of edit cases. Finally, the developed process and constructed system was commercialized.

Keywords: circuit edit, Cu(hfac)tmvs, FIB, LCVD, Ni(CO)4

“Much learning does not teach understanding”, On the Universe. Heraclitus, Greek philosopher (540 BC - 480 BC)

To my family

Acknowledgements I wish to thank my supervisor Professor Jouko Vähäkangas for providing me the opportunity to finish my thesis. I am also grateful to Professor emeritus Seppo Leppävuori who was my supervisor during the research projects when most of the experimental work was carried out. I also wish to thank Docent Antti Uusimäki, Docent Krisztian Kordas, Professor Heli Jantunen for valuable comments and support during the writing of the thesis. I also want to thank Professor Laszlo Nanai and Professor Turkka Tuomi for communicating this thesis, and Professor A. E. Hill for the proofreading of the manuscript. This work was carried out in the research projects “Laser chemical vapor deposition in integrated circuit modification (1994-1996)” and “Focused ion beam in integrated circuit prototype series customisation (1998-2000)”. These projects were funded by TEKES and the following companies: Nokia Networks Oyj, Nokia Mobile Phones Oyj, Tellabs Oy, VLSI Solution Oy, Micronas Oy, Fincitec Oy and VTT Electronics. I am indebted to M.Sc. Hannu Moilanen whose outstanding technical skills made it possible to refine the LCVD system to an efficient tool. I am also grateful to everyone in the Microelectronics and Materials Physics Laboratory for the unreserved working atmosphere. Finally, my loving thanks go to my wife Merja whose patience and support was necessary to finish this work. This work was financially supported by Electronic Materials, Packaging and Reliability Group of Infotech Oulu, GETA graduate school, Tauno Tönning Foundation, Oulu University Foundation, Seppo Säynäjäkangas Foundation, all of which are gratefully acknowledged. Thank you all! Oulu, 1st of May, 2006

Janne Remes

List of abbreviations and symbols AMU ABS AFM ASIC BGA BSG CAD CSP CVD EB EDA ESD FA FIB GAE GDS2 hfac I/O IC LCVD LD50 LIMA LMIS MCM MCP MEMS MOS NA P Poly-Si ppm

Atomic mass unit Acrylonitride butadiene styrene Atomic force microscope Application specific integrated circuit Ball grid array Borosilicate glass Computer-aided design Chip scale package Chemical vapor deposition Electron beam Electronic design automation Electrostatic discharge Failure analysis Focused ion beam Gas assisted etching Graphic design system 2 Hexafluoroacetylacetonate Input/output Integrated circuit Laser chemical vapor deposition Lethal dose that is fatal to 50% of test animals Laser ionisation microprobe analysis Liquid metal ion source Multichip module Micro channel plate Micro electro-mechanical system Metal oxide semiconductor Numerical aperture Power Polycrystalline silicon Parts per million

PSG ptot px PVC RTA SEM SoC TEM TMCTS tmvs ToF ULSI

Phosphosilicate glass Total pressure Partial pressure of x Polyvinyl chloride Rapid thermal anneal Scanning electron microscope System on chip Transmission electron microscope Teramethylcyclotetrasiloxane Trimethylvinylsilane Time of flight Ultra large-scale integration

List of original articles This thesis is based on the following articles, which are referred to in the text by their Roman numerals. I

Remes J, Moilanen H & Leppävuori S (1997) Laser-assisted chemical vapor deposition of nickel and laser cutting in integrated circuit restructuring, Physica Scripta, T69, 268-272.

II

Moilanen H, Remes J & Leppävuori S (1997) Low resistivity LCVD direct write Cu conductor lines for IC customisation, Physica Scripta, T69, 237-241.

III Remes J, Moilanen H & Leppävuori S (1997) Fast first-run silicon repair cases by laser chemical vapor deposition of copper from Cu(hfac)tmvs, Proceedings of IPFA'97 Conference, 21-25 July, Singapore, 280-283. IV Remes J, Moilanen H & Leppävuori S (1999) Enhancing IC repairs by combining laser direct-writing of Cu and FIB techniques, Microelectronics Reliability 39, 9971001. V

Remes J, Vähäkangas J & Uusimäki A (2006) Laser chemical vapor deposition of copper as a complementary method to focused ion beam processing of prototype integrated circuits, submitted for publication in IEEE Transactions in Advanced Packaging.

In Paper I the experimental studies of LCVD by Ar+ laser from Ni(CO)4 precursor gas, and the cutting of IC conductor lines and passivation materials by pulsed Nd:YAG- and XeCl- excimer lasers are presented. The effects of Ni(CO)4 precursor pressure, mixture of Ni(CO)4/He, laser power and scan speed on the LCVD characteristics were investigated. The morphology, chemical contents and electrical resistivity of the deposits were examined and the developed process was demonstrated to be successful in integrated circuit edit work. It was concluded that the best quality deposits were achieved in 0.3 mbar Ni(CO)4 diluted in 200 mbar He resulting in 7 μΩcm resistivity of the deposited metal lines. In Paper II the experimental work on the second precursor Cu(hfac)tmvs is reported. It was concluded that the heating of the precursor gas to 36°C and the use of hydrogen as a carrier and reducing gas instead of inert helium were necessary for a reasonable copper

growth rate of 80 μm3/s. The lowest achieved copper resistivity was 3.7 μΩcm and the process was demonstrated to work well in the IC edit work. In Paper III both the developed LCVD processes are demonstrated in practical IC edit work with examples. The examples include large area LCVD deposition for EMI shielding, deposition of new bonding pads and power supply lines and considerations for good step coverage. The developed processes are based on the experimental research presented in Papers I-II. In Paper IV the copper LCVD process is shown to be an effective method when used with FIB (focused ion beam) technology. The combined method is demonstrated to work in circuit edit cases that are beyond the capabilities of the FIB method alone. Also, the two methods are compared in terms of deposition resistivity, resolution and process throughput time. As a practical example, the resistivity reduction of FIB deposited tungsten by subsequent LCVD of copper is presented. In Paper V the various issues of the use of FIB technology in circuit editing are discussed with particular emphasis on FIB induced ESD (electrostatic discharge) damage to MOS transistors. Furthermore, it is shown how the FIB discharge problems can be circumvented by the LCVD process. The novel method for high resolution conductor line deposition introduced in Paper IV is demonstrated in a practical IC edit case. Also, the detailed formal workflow for the IC edit process is developed. The basic ideas of the LCVD circuit edit system based on Ni(CO)4 and Cu(hfac)tmvs precursors and the combination of LCVD with FIB were those of the author. The experimental work in LCVD was carried out in association with the co-authors. The FIB experimental work was carried out by the author. The manuscripts of the papers I, III, IV and V for publications were written by the author with the kind help of the co-authors. The original features of the work are to the best knowledge of the author: 1) The investigation of the LCVD parameters of Ni(CO)4/He mixture and its application in circuit editing 2) First published results of LCVD of copper utilization in circuit edit work 3) The introduction of the high resolution deposition of Cu onto FIB deposited tungsten 4) The combination of the developed LCVD of copper with FIB technology to improve the circuit edit process yield and shorten process time. Papers not included in this work but relevant to the subject are: Leppävuori S, Remes J and Moilanen H (1996) Laser chemical vapor deposition of Cu and Ni in integrated circuit repair, Proceedings of SPIE, 2874, 272-282. Leppävuori S, Remes J and Moilanen H (1999) Utilization of Cu(hfac)tmvs precursor gas in LCVD integrated circuit repair system, Applied Surface Science 138-139, 123-129.

Table of contents Abstract Acknowledgements List of abbreviations and symbols List of original articles Table of contents 1 Introduction ................................................................................................................... 15 1.1 ASIC development..................................................................................................15 1.2 LCVD methods.......................................................................................................17 1.2.1 Pyrolytic LCVD...............................................................................................19 1.2.2 Ni(CO)4 precursor............................................................................................20 1.2.3 Cu(hfac)tmvs precursor ...................................................................................21 1.3 Focused ion beam technology ................................................................................22 1.3.1 Gas assisted FIB processes ..............................................................................23 1.3.2 FIB methods in circuit edit ..............................................................................24 1.4 Objective and outline of this thesis.........................................................................26 2 Experimental ................................................................................................................. 27 2.1 Laser cutting ...........................................................................................................27 2.2 LCVD of Ni from Ni(CO)4 .....................................................................................28 2.2.1 Ni deposition from undiluted Ni(CO)4 ............................................................29 2.2.2 Deposition from Ni(CO)4 / He mixture ...........................................................30 2.3 LCVD of Cu from Cu(hfac)tmvs............................................................................33 2.3.1 Cu deposition with He carrier gas ...................................................................35 2.3.2 Cu deposition with H2 carrier gas....................................................................35 3 Combined LCVD and FIB methods .............................................................................. 40 3.1 FIB circuit edit........................................................................................................41 3.2 Conductor line resistivity reduction........................................................................42 3.3 Demand for circuit edit and economic issues .........................................................48 3.4 Future development ................................................................................................49 Conclusions ...................................................................................................................... 50 References Original articles

1 Introduction 1.1 ASIC development Application specific integrated circuits (ASICs)1 play a major part in the electronics industry. The design of these circuits is complex and can easily take several years to complete from initial requirement specification to high-volume batch manufactured component. Since the end product time-to-market is constantly reducing, the design cycle must be minimized. Any delays in the ASIC development period can have a fatal effect on the revenue of the company if the actual market window for the end product is lost. This is particularly true for consumer electronics products, e.g. cellular phones and computer chips, where new ASIC generations are introduced at an ever quickening pace. In this context any method that can reduce the ASIC design time is of great commercial value. Preceding the mass production, the electrical performance of the ASIC must be verified against the design specifications. This is usually carried out by manufacturing and testing a couple of dozen “prototypes”. If the measurements show deviations or malfunctions a new design layout has to be generated and a new set of prototypes manufactured. If this new set of prototype circuits does not comply with the specifications the “redesign-simulate” cycle is repeated again and again until the specifications are met. These redesign cycles can typically take from 6 weeks to several months causing high direct and indirect losses. The total costs of a new mask set was $5,000-$50,000 (or more) in the late 1990’s depending on the ASIC vendor and the production quantities (Smith 1997). The indirect costs are more difficult to analyze but a simplified estimate can be obtained from the following graph.

1

ASIC circuits can be divided into several subgroups according to the utilised technology, size, price etc. In this thesis, “ASIC” refers to a full-custom ASIC meaning that all the metal layers that form the interconnect structure in the circuit have been designed for the end-user’s specific application. This means that functional changes in the circuit require at least one new lithography mask in the back-end semiconductor manufacturing process.

16

Fig. 1. Profit model for estimating the profit loss due to delayed product introduction to the market (Smith 1997).

Fig.1. shows a simplistic profit model that represents the profit flow during the product lifetime in a typical electronics product with a lifetime of 18 months. It is assumed that the peak sales and end of product life are determined by the market forces independent of when we introduce the product. Also, the slope of the sales after the introduction is constant at 5 M€/3months because the production and sales can be increased only by a fixed rate. The lost sales due to delay in this case is the difference between the areas of the two triangles Snormal and Sdelay which in this case is 30 M€-12.5 M€= 17.5 M€. Various techniques have been developed in order to perform circuit editing and failure analysis (FA) during IC prototyping (Soden & Anderson 1995). Laser assisted cutting based on frequency doubled or tripled Nd:YAG laser pulses was a widely used method in the beginning of the 90’s when typical IC linewidths were still at the micron scale with only a couple of metal interconnect layers. Since the critical dimensions of ICs are constantly shrinking in accordance with the ITRS roadmap (ITRS 2003), the circuit edit work becomes more and more difficult as new IC generations are introduced and the space where the modifications are to be carried out is constrained accordingly. This continuous downscaling has made the focused ion beam (FIB) technology the primary method for multilevel IC modification and failure analysis. FIB etching and deposition is, for the time being, the most powerful and versatile tool for multilevel IC modification and FA but it has serious drawbacks in circuit edit. Particularly, the deposition of long distance conductor lines (longer than 100 μm) with an acceptable electrical resistance is time consuming or practically impossible (Doorselaer 1994, Silverman 1996).

17

1.2 LCVD methods The development of modern microelectronics requires constant improvements in manufacturing technology and materials science. One example is the replacement of aluminium conductor lines by copper for its better conductivity, electromigration resistance and reduced signal propagation delay (Edelstein 1997, Andricacos 1998). Another example is the introduction of low-permittivity dielectric materials for circuit passivation and isolation, and high-permittivity dielectrics for MOS-transistor gate material (Kingon 2000). Chemical vapor deposition (CVD) is one of the most utilized techniques in the manufacture of functional or protective thin films and coatings. In thermally activated CVD the solid thin film is formed by a chemical reaction from the gaseous precursor on the heated wafer surface. Selective area deposition is usually carried out by masking and lithographic methods. These add processing steps and can be difficult or impossible to apply to non-planar substrates. The thermal sensitivity of substrates and preformed structures often limits the usability of CVD for several interesting chemical reactions that require too high a process temperature. Initiating the CVD reaction by the local heating effect of a laser beam can circumvent these drawbacks. Laser-assisted chemical vapor deposition (LCVD)2 is a method which allows the deposition of semiconductors, metals and dielectrics onto various substrate materials. Compared to conventional chemical vapor deposition, LCVD is a selective deposition method with a spatial resolution of a few micrometres, lower thermal load to substrate and no need for mask fabrication and subsequent lithographic processing steps. Furthermore, the laser power induced temperature on the substrate can be varied in a fraction of a second enabling rapid control of the deposited layer morphology. LCVD has been studied for over two decades and has been utilized in many microelectronics, MEMS, optics and coating technology applications (Kar & Mazumder 1996). The principle of LCVD is shown in Fig 2. A focused laser beam is scanned and positioned by a computer-controlled translation stage. The deposition occurs via photolytic, pyrolytic (or both) chemical reactions, which take place in the vicinity of the laser beam (Ehrlich & Tsao 1983). The locally confined reaction zone makes it possible to deposit conductive lines with a few micrometre resolution by scanning a focused laser beam on the substrate surface. In this way it is possible to lay down new electrical connections on a processed IC, which are often required for prototype IC failure analysis.

2 The term laser microchemical deposition has also been used emphasizing the small area where the deposition takes place. The term LCVD is more common in literature and used throughout this thesis.

18

Fig. 2. Schematic principle of LCVD (left) and close-up illustration (right) of the confined reaction zone with surface kinetics.

The LCVD method is a combination of chemistry, laser techniques and optics. All of these different fields must be combined properly to achieve reproducible processing results. Acceptable deposition parameters are quite easily found when the deposition is carried out on a homogenous substrate e.g. a Si-wafer. The situation becomes much more challenging when it is necessary to deposit lines with constant thickness, width and electrical characteristics onto integrated circuits exhibiting corrugated surface topography and with varying materials underneath the ongoing deposition. This is exactly the case when making circuit edit re-wiring depositions on an IC. The resolution and the quality of the deposition is mainly determined by the temperature distribution on the substrate surface, which in turn depends on the size of the focused laser beam waist and the thermal conductivity and absorption coefficient of the substrate material(s). LCVD enables the fabrication of planar and non-planar structures that are difficult or even impossible to carry out by conventional processing methods. A good example of the versatility of LCVD is the fabrication of three-dimensional microsolenoids that has been demonstrated by Westberg (1993). Further applications in microelectronics LCVD are gold deposition for multi-chip module (MCM) conductor line defect repair (Wassick & Economikos 1995) and gold bump deposition on flip-chip circuits (Metzger & Reichl 1997). In LCVD the deposition mechanism is more complicated compared to that of conventional CVD due to the micrometre scale (~5 μm) reaction zone and the complex dependence of the reaction zone temperature induced by the focused laser beam and chemical kinetics such as diffusion, reaction enthalpy and mass transport (Mazumder & Kar 1995). This complex interaction can result in irregular deposition geometry like volcanic shapes or periodic arrays of deposited dots instead of a continuous line. It is essential to avoid this kind of uncontrolled deposition if LCVD is to deposit electrically conductive wires that can be used in practical circuit edit work. LCVD takes place by two primary mechanisms: pyrolytic and photolytic deposition. These relate to how the chemical reaction is driven by the laser beam. In pyrolytic LCVD the molecules in the precursor vapor do not absorb the laser photons but the local heating of the substrate in the focused laser spot initiates the chemical reaction thermally. In photolytic LCVD the photons of the laser beam are directly absorbed by the gas molecules, breaking the chemical bonds. Photolysis takes place by either a single photon

19 or multi-photon process depending on the specific choice of the precursor and photon energy. Preliminary work in LCVD of metals includes photolytic deposition of gold in prototype IC editing but the lowest achieved resistivity was 250 μΩcm; that is unacceptably high (Shaver et al. 1987). Work based on pyrolytic LCVD of tungsten from WF6 has been carried out by Auvert (1993) but the process is not compatible with SiO2 (due to the formation of hydrogen fluoride) which is a common passivation material on integrated circuits). Furthermore, photolytic metal deposition by LCVD often induces a high incorporation of carbon or organic by-products that result in poor electrical and mechanical properties of the deposited film. This is mainly due to the low deposition temperature that results in slow desorption of the reaction by-products. In addition, most of the interesting photolytic metal deposition processes require high-energy photons (UV wavelength) to proceed. This increases the cost and complexity of the system because of the need for an expensive UV-laser and optics. The photolytic LCVD process is more suitable for large area projection lithography deposition on thermally sensitive substrates than in the circuit edit application. LCVD has been the subject of active research and several mathematical models have been formulated to describe the deposition dynamics (Ehrlich & Tsao 1989). Usually, the models describe the deposition occurring from stationary precursor gas (i.e. no gas flow), with either a stationary or moving laser beam. In the case of copper deposition the precursor gas is injected locally near the laser spot to provide continuous replenishment of gas for deposition. This means that there is forced gas flow in the reaction zone and modelling this mathematically can be very challenging. There are also many systems where both pyrolytic and photolytic mechanisms contribute simultaneously to the reaction, although one of them may dominate the deposition process. Due to these considerations the pyrolytic deposition mechanism was chosen to be appropriate for the circuit edit application and both the deposition systems investigated in this thesis rely on this mechanism.

1.2.1 Pyrolytic LCVD The pyrolytic process resembles conventional CVD with the exception that heat is provided locally by the laser beam instead of by global heating of the substrate. It is in principle possible to deposit the same materials by LCVD as in conventional thermal CVD. The major difference is that in CVD the precursor gas flow is typically one dimensional compared to the hemispherical three dimensional LCVD reaction zone. The precursor gas molecule is decomposed by collisional excitation with the heated spot. Since the typical spot size of the focused laser beam is only a few micrometres the heat affected zone on the rest of the substrate remains extremely small. Both the heating rate and the cooling rate are very fast (heating rate 1010 K/s) resulting in low diffusion of the substrate atoms into the depositing film (Allen et al. 1983). Furthermore, the very fast temperature rise in a small laser heated hemispherical volume can introduce new chemical pathways and reaction by-products that are not encountered in CVD (Mazumder & Kar 1995).

20 The surface reaction rate is directly proportional to the concentration of the reactant molecules above the surface and to the diffusion coefficient, and inversely proportional to the mean free path and to the diameter of the heated zone i.e. the laser spot size (Moylan et al. 1986). Under different deposition conditions (total pressure, precursor pressure, laser irradiance and temperature) deposition kinetics can be either diffusion-limited, when many reactant molecules are available nearby but cannot diffuse fast enough into the laser heated zone, or limited by surface kinetic reactions such as adsorption, surface diffusion and desorption of the reaction by-products. Both phenomena affect the overall deposition rate and are also the cause for possible deposition imperfections like the volcano shaped deposition (Skouby & Jensen 1988). Since the first experimental LCVD of carbon deposition on aluminium by Lydtin (1973), a great variety of deposition chemistries and laser sources have been studied. For high deposition rates, infrared lasers like Nd:YAG and CO2 are usually preferred since most gases do not absorb either visible or infrared wavelengths. For high spatial resolution and deposition control, an Ar+ laser emitting at the visible wavelengths is often used. In spite of numerous precursor gas chemistries, only a few of them are suitable for the practical fabrication of metal lines in IC edit work. The key requirements for successful circuit edit work are fast deposition rate, good conductivity and good spatial resolution. The deposition chemistry should also be chemically compatible with the IC surface materials, and particularly with common IC passivation materials such as silicon dioxide, silicon oxynitride, and doped silicate glasses PSG (phosposilicate glass) and BSG (borosilicate glass). Other important features are low toxicity, low cost and ease of use in practical work.

1.2.2 Ni(CO)4 precursor Nickel deposition from Ni(CO)4 was first described by Mond in the late 19th century (Mond 1892). Since then conventional CVD or MOCVD (metal organic CVD) processes based on Ni(CO)4 precursor gas have found applications in coating thermally sensitive materials like polyimides, epoxies, carbon fibres and as a protective coating for electromagnetic waves (Bezuk et al. 1987, Fau-Canillac & Maury 1994). The first LCVD experiment using this precursor and a CO2 -laser at a wavelength of 10.6 μm was carried out by Allen (Allen 1981). The LCVD from nickel tetracarbonyl gas takes place via the following chemical reaction: Ni(CO)4(g) -> Ni(s) + 4 CO(g)

(1)

The nickel tetracarbonyl molecule reduces to solid nickel and gaseous carbon monoxide. The reaction occurs pyrolytically i.e. the local heating provides the energy required for the reaction to take place (Skouby & Jensen 1988, Tonneau et al. 1988). In this process the parameter limiting the deposition rate is not the incident laser beam power but the chemical kinetics and material properties (Tonneau 1988). Pyrolytic deposition of nickel from Ni(CO)4 was chosen as the first system because of its high reported deposition

21 speed, good conductivity and compatibility with different substrate materials (Auvert 1993, Skouby & Jensen 1988).

1.2.3 Cu(hfac)tmvs precursor The introduction of copper metal in semiconductor technology interconnection has required the development of gaseous copper precursors. Since copper does not form volatile carbonyls, complex organometal molecules based on Cu1+ and Cu2+ oxidation states have been synthesized for conventional CVD processes (Chiou et al. 1994, Kim et al. 1993, Parmeter 1993). Cu2+ compound complexes often require high deposition temperatures and hydrogen is needed for the reduction reaction to deposit copper (Kim et al. 1993). Copper from Cu1+ compounds like Cu(hfac)tmvs (copperhexafluoroacetylacetonate trimethylvinylsilane) can be deposited by CVD without hydrogen at low temperatures, thus simplifying the process (Norman 1992, Chiou et al. 1994). Laser assisted Cu deposition has been carried out by using visible and UV laser sources from both aforementioned Cu compounds. Photolytic excimer laser deposition from Cu(hfac)tmvs has been carried out by a large area projection (Meunier et al. 1994, Izquierdo et al. 1995). The first experimental and theoretical studies of pyrolytic LCVD using Cu(hfac)tmvs precursor were carried out by Han & Jensen (1993). The reaction of Cu(hfac)tmvs in conventional CVD takes place via a disproportionation reaction on the substrate where one precursor molecule is reduced to form metallic copper while the other is oxidised to produce volatile Cu2+(hfac) and free tmvs: 0

2+

2 Cu(hfac)(tmvs) → Cu + Cu (hfac)2 + 2 (tmvs)

(2)

In theory this reaction yields only 50% efficiency of copper deposition since the Cu2+(hfac)2 molecule leaves the deposition chamber. Previous studies showed that the deposition rate in LCVD could be enhanced by using hydrogen as a carrier gas instead of helium, due to additional reaction of Cu2+(hfac)2 with hydrogen (Paper II): 2+

0

Cu (hfac)2 + H2 → Cu + 2 H(hfac)

(3) 2+

The copper deposition rate and morphology from Cu (hfac)2 precursor with H2 carrier gas in conventional CVD has been observed to increase with the addition of water. Awaya proposed that the reaction proceeds through the formation of oxidized copper and H(hfac) with subsequent reduction of copper oxide to metallic copper by hydrogen (Awaya & Arita 1993). Marcadal et al. (1997) suggested a model where water acts as a catalytic agent: 2+

Cu (hfac)2 +H2O → CuO2 + 2 H(hfac)

(4)

CuO2 + H2 → 2 Cu0 + H2O

(5)

22 Further evidence of water acting as a catalyst was found by Vezin et al. (2002). In our LCVD experiments the action of water cannot be ruled out since small amounts water can be left in the processing chamber and the piping system even though they are purged with He before every experiment. Selected precursor physical properties are summarized in Table 1. Table 1. The main physical parameters of the precursor gases. Property Physical state

Nickel tetracarbonyl

Cu(hfac)tmvs

Volatile liquid

Pale yellow, volatile liquid

Molecular weight [g/mol]

170.175

370.83

Molecular formula

Ni(CO)4

C10H13CuF6O2Si

Boiling point [°C]

43

40

Freezing point [°C]

-25

5

533.0

1.3

Vapor pressure (at 26 °C) [mbar] Density [g/ cm3]

1.3

1.4

Toxicity LD50 [mg/kg]

39

239

by inhalation [ppm] Water solubility by weight [%]

35

52

0.018

Decomposes in water

The toxicity of organometal compounds requires a proper system to ensure safe handling of the gas. Especially, Ni(CO)4 is highly toxic and carcinogenic having the lowest published lethal concentration of 30 ppm/30 min by inhalation (AEHLAU 1971). The toxicity level of the Cu(hfac)tmvs precursor is comparable to ammonium hydroxide with an LD50 value of 350 mg/kg.

1.3 Focused ion beam technology The development of the focused ion beam technology is based on the demonstration of a liquid metal ion source (LMIS) by Krohn & Ringo (1975) and the introduction of a Ga+ source with high brightness (Seliger et al. 1979). After these breakthroughs several device manufacturers have developed new processes and refined the technology. The operational principle of the FIB system resembles that of a scanning electron microscope (SEM). The structure and principle of the FIB column is shown in Fig 3. The charged particles are Ga+ ions extracted from the LMIS and accelerated by 30-50 kV voltage. The beam is collimated and focused by electrostatic lenses and raster scanned over the sample surface to be imaged. From each raster point the secondary electrons or ions are collected by a micro channel plate (MCP) forming a grey scale image. Since the mass of the Ga+ ion is several orders of magnitude higher than that of an electron (as used in SEM) the energetic Ga+ ions can physically etch (sputter) the area of interest. Furthermore, the introduction of suitable precursor gas in the vicinity of the ion beam (by a nozzle) enables deposition or etching by ion beam activated processes.

23

Fig. 3. Focused ion beam column with the main components.

The applications of focused ion beam technology applications span a wide range from circuit prototyping and debugging to nanotechnology and optoelectronics. In the semiconductor manufacturing industry, FIB has become an invaluable tool in process monitoring and failure analysis (Nikawa et al. 1989, Melngailis et al. 1986). Other applications of FIB are TEM (transmission electron microscope) sample preparation, microfabrication and MEMS components (Daniel et al. 1998, Bell et al. 2003, Dötsch & Wieck 1998). FIB technology has also gained increased attention as a fabrications tool for integrated optics (Schiappelli et al. 2004, Fu 2001), silicon microgratings (Cheng & Steckl 2002) and photonic crystals (Paraire et al. 2004). FIB has also been suggested as a tool for Terabit scale optical memory fabrication with a demonstration of 320 Mbit/cm2 (Chi & Steckl 2001).

1.3.1 Gas assisted FIB processes The FIB gas chemistries include several precursor gases that have been utilized in selective etching and deposition. In early days, the sample was contained in a small box with an aperture for the ion beam to enter the sample surface. The precursor gas atmosphere was locally created in the box while high vacuum (~10-7 mbar) could be maintained in the ion beam column. This approach was clumsy and the small aperture limited the obtainable view and positioning of the sample. A more effective approach is when the precursor gas is introduced by a capillary nozzle a few hundred micrometres away from the ion beam focus on the substrate surface. The injected gas is absorbed by the top few monolayers of the target material’s surface. Energy transfer from the colliding primary Ga+ ion and the subsequent chemical reaction liberates and volatilizes the surface by-product. While system base pressure change in the FIB chamber is relatively small (conventionally held at 10-6 - 10-5 mbar

24 range depending on the specific precursor gas) when the gas is flowing through the capillary, the actual pressure in the etching region immediately below the nozzle is considerably higher. This enables a highly increased etching rate (as high as 100 times for SiO2 and 40 times for Si3N4) of material, assuming a properly selected gas chemistry (Xu et al 1988). Another advantage is the greatly reduced re-deposition of the sputtered material inside and around the etching area, which improves the creation of high aspect ratio holes and vias.

1.3.2 FIB methods in circuit edit In many circuit edit cases a higher conductivity of the new metal line depositions is required than can be accomplished with commonly used FIB deposited tungsten or other metals. Early studies for FIB deposited lower resistivity materials included gold (Blauner 1989) and copper (Della Ratta 1993). Funatsu fabricated selective low resistivity copper depositions by a focused ion beam and heating the deposition area locally by IR-laser (Funatsu et al. 1996). Gu developed a method for deposition in the 106 μΩcm resistivity range for kΩ-MΩ resistance circuit elements in SoC applications debugging (Gu et al. 2003). Common to these deposition procedures is the high carbon content in the film which increases the film resistivity several dozens or hundreds of times compared to the bulk resistivity. The carbon incorporation is usually due to insufficient by-product desorption from the film during the ion beam induced deposition. Heating the sample by heater elements or a laser beam during the deposition can lower the resistivity but in practical IC rework this introduces drift problems due to the thermal gradients making navigation on the sample with the required fraction of a micrometre accuracy very difficult. Another problem is the low speed of deposition, which can make FIB deposition impractical even if the high resistance of the deposited line is acceptable. This constraint is often encountered in digital IC edit work. This is due to the serial processing nature of the FIB method. An ion beam with a minimum of 7 nm diameter must be raster scanned over a vast number of individual dots over and over again to fabricate a conductive metal deposit. The deposition speed is limited by the chosen FIB ion beam aperture size, which must be kept relatively small due to the accumulation of high electrical charge on the IC surface. The charge accumulation is due to the positively charged Ga+ ions that impinge on the sample surface and accumulate positive charge when no dissipation route is available. Furthermore, the Ga+ ions scatter secondary electrons away from the surface, which further increase the positive charge. This twofold positive charging of the substrate has several detrimental effects on the FIB circuit edit work. It can induce electrostatic discharge damage (ESD) to the sensitive active circuit components. Typically, the accumulated charge caused by an ion beam with 99 pA current in an average circuit edit is about 2 nC and can easily cause the breakthrough electric field of SiO2 (~8 MV/cm) to be exceeded. Even using FIB systems with a charge neutralization electron gun (like the one used in this work), there is still a significant risk of destroying the IC by electrical discharge.

25 This problem is encountered particularly on globally planarized ICs with the discharge breaking through the passivation layer into underlying circuit elements. The effect of this discharge to the functionality of the chip depends on the type of circuit structure through which the discharge current passes. Discharge through MOS transistor gate oxide is often fatal to the component, whereas a discharge to grounded conductor lines often leaves the circuit functionality intact. Besides these immediately in situ-observable ESD hard failure effects, the ion beam has other effects on active circuit elements. It has been observed that the 30 kV and 50 kV ion beam induced damage on MOS transistor parameters were primarily related to the sample charging (Campbell et al. 1999). Benbrik suggested Fowler-Nordheim tunnelling through the dielectric to be the principal mechanism by which surface charge dissipates through the oxide and the surface potential is saturated to a finite value (Benbrik et al. 1998). Tunnelling electrons generate oxide and interface trapped charges resulting in a shift in Vt. Chen found further evidence for this charging model and that these shifts in MOS threshold voltage (Vt) can be recovered within 10 mV by subsequent thermal annealing at 400-450°C. Furthermore, they confirmed that if the gate is connected to the drain of the prior MOS transistor (which is the usual case in digital logic circuits) the shift in threshold voltage was negligible (Chen et al. 2003). While these studies provide an understanding of the ion beam induced damage to active circuit elements, thermal annealing cannot be used on packaged devices and the remaining 10 mV difference in Vt can be a problem in transistor-matched analogue circuits. Apart from charge pile-up related ESD damage, Lugstein found strong evidence for ion beam related long-range cascade damage during FIB milling into the MOS-transistor gate stack. This phenomenon begins to affect the charge carrier mobility due to scattering effects in the channel as the damage cascade range reaches the channel region (Lugstein et al. 2002). The ESD induced damage was fully recovered by RTA (rapid thermal anneal) (600°C) in forming gas (5% H2/ 95% N2), while partial recovery of ion irradiation damage was achieved depending on the milling depth (and thus the distance to the gate oxide and bulk Si channel) into the poly-Si gate stack. The ESD damage can be avoided by connecting the transistor terminals to a current sink. The problem is that if there is not an assigned pin in circuit the I/O that provides a somewhat direct route to the transistor gate to be milled, the gate line has to be exposed by the FIB etching. Fortunately, as mentioned above, in digital chips the gates are usually connected to the drains of the preceding logic stage and thus provide a current path. The mixed signal (digital/analogue) and analogue chips tend to be very sensitive to FIB charging, and even small deviations in transistor parameters (e.g. in the case of matched transistor pairs) can be detrimental to proper functioning. Flooding the sample surface by low-energy electrons, grounding with conductive tape or depositing a conductive shield on the area of interest can minimize this charging effect. Also, the sample can be globally coated with a carbon layer that is subsequently removed by plasma ashing after the FIB work is done (Hooghan et al. 1999). This however adds two additional stages to the FIB rework process and can induce discharge damages during the plasma-ash unless the grounding is not properly carried out. Lowering the FIB acceleration voltage from 30-50 kV to 5 kV has also been found to reduce charge damages to interconnects and MOS transistors (Miura et al. 2003) but this also reduces the resolution of the FIB etching and deposition.

26 This discussion can be summarized in the following issues, all of which will be addressed and improved in the developed LCVD process: 1. High resistivity (~200 μΩcm) of the metal deposit with current precursor chemistries 2. Low speed of deposition of metal lines. 3. Accumulated charge induced damage to the active circuit elements (particularly MOStransistors).

1.4 Objective and outline of this thesis The objective of this thesis was to develop methods to circumvent the time-consuming redesign and manufacture stage and thus accelerate the prototyping phase of the IC design cycle. The specific need was first to gain scientific understanding of the LCVD process of the selected precursors and, based on that knowledge, construct a system that can make new re-wirings and cuts in the prototype circuit electrical signal lines. This provides the circuit designer with a means to test and measure the effect of the electrical design changes on a real functional circuit vs. simulation data. Also, the edited circuits can be inserted in the end product and subsequent higher-level tests (e.g. software tests) can be run in a real circuit. These working prototypes are dubbed as “golden devices” after their significance in the ASIC development. The problems of low conductivity of the ion-beam deposited tungsten and the induced discharge problems discussed in previous chapter need to be solved. Finally, these two different methods should be combined to create a successful procedure in terms of speed and electrical conductivity in circuit editing and failure analysis. Since the material parameters and the surface topography differ from circuit to circuit the computational simulations of the deposition processes are of limited value and not included in this thesis. Numerical modelling of LCVD processes can be found in articles by Arnold (1997) and Han (1994). The approach was to find appropriate LCVD process parameters that can be utilized routinely for good quality metal deposition onto various ASIC surface passivation materials and validate these processes through actual circuit edit cases delivered by the participating companies. The outline of this thesis is as follows: The experimental laser cutting and LCVD deposition studies with two selected precursor gases, Ni(CO)4 and Cu(hfac)tmvs, are investigated in Chapter 2. The experimental work and discussion of the FIB method in circuit edit and the combined LCVD/FIB process are described in Chapter 3.

2 Experimental 2.1 Laser cutting The linewidths on integrated circuits and particularly for ASICs were a few micrometres in the beginning of the 1990s. Thus laser cutting could be effectively used in prototype circuit debugging. Of course, at that time the most advanced ICs such as processors and high-density memories were beyond the grasp of laser technology and were debugged by other means (like FIB). The cutting of IC conductor lines is an integral part of the IC edit process. IC laser cutting involves the local evaporation of a conductor line due to heat absorption from a laser pulse. Reliable and repeatable laser cuttings of lower metal layer signal lines with better than 1 μm resolution were difficult to achieve and were processed by the FIB system. Nevertheless, there are many cases with highly complex circuits that can be processed much faster with traditional laser cutting than with an FIB system e.g. the disconnection of wide and thick power supply lines. Because of this the laser cutting method was never abandoned as obsolete but used in special cases where it reduced the total throughput time for a circuit edit by many hours. Practically all ICs have a global dielectric passivation layer to isolate the circuit interconnections and protect the circuit from environmental stress and contamination. This passivation layer is typically 1-3 μm thick and consists of sandwiched SiO2, silicon oxynitrides, PSG, BSG, polyimide, etc., depending on the specific semiconductor manufacturing process. Furthermore, prior to the LCVD metal line process, contact windows must be opened in the passivation layer to enable a contact to the underlying circuit interconnect lines and the deposited line. The contact resistance between the new deposited copper line and the pre-existing conductor line in the circuit must be as low as possible for a successful IC edit. It was found that reliable, low-resistivity contacts to conductor lines could be realised by short laser pulses (Paper I). The laser pulse is focused through the transparent passivation layer into the conductor line material that is evaporated and blows a hole through the passivation making an electrical isolation. Si3N4, PSG, BSG and polyimide passivation layers can be removed neatly by pulsed UV lasers (e.g. XeCl excimer laser at 308 nm) whereas the removal of SiO2 is more

28 inefficient due to UV transmission at this wavelength. For SiO2 passivated Al the contacts were made almost exclusively by blowing a hole in the passivation by a Nd:YAG laser pulse at 1064 nm or at its second harmonic, 532 nm. The practical process of passivation removal by laser depends on the underlying material properties. This means that the laser parameters (power, wavelength, laser spot diameter and pulse duration) must be empirically adjusted for every single circuit edit case. The achieved cutting resolution of circuit conductor lines was about 1 μm for a relatively low number of metal layers (2-4 metal interconnect layers). It was essential to use short laser pulses in order to achieve a neat cut without debris. The minimum pulse length that could be achieved with the Nd:YAG laser was 40 ns, which is still at least two orders of magnitude too long to eliminate the undesired heat effects. The possibility to use femtosecond pulse widths would have enabled much better cut quality and yield than was possible with the utilised XeCl excimer laser or frequency doubled Nd:YAG laser. Too long a pulse affects thermally the surrounding circuit structures. Also, the electric properties of the circuit may be altered due to thermally induced effects such as dopant atom redistribution in the active devices. The situation is better at UV wavelengths since the removal of material is photolytic with little thermal damage introduced to the surroundings.

2.2 LCVD of Ni from Ni(CO)4 The deposition of Ni conductor lines from Ni(CO)4 was investigated as a first system for LCVD metal deposition for circuit edit applications. The investigated parameters were the volumetric growth rate, morphology and resistivity as a function of laser power and precursor partial pressure. In these experiments only static gas pressure without precursor gas flow was studied. After loading the IC into the chamber it was evacuated to 10-4 mbar by a turbomolecular pump. The precursor gas was delivered into the processing chamber through electropolished stainless steel piping and in-house constructed pneumatically operated valves with an electronic control and monitoring system. After the deposition process, the remaining Ni(CO)4 gas was neutralized by feeding it through the scrubber by a rotary pump. The piping and the chamber were purged with He several times after the deposition to ensure that all the remaining Ni(CO)4 was removed. The chamber pressure was monitored by a pressure meter (Piezovac, Leybold Vacuum, Germany) with 0.1 mbar accuracy. The chemical contents of the Ni deposits were characterised by laser ionisation microprobe analysis (LIMA) capable of detecting all the elements, as well as some molecular compounds, down to a few ppm (parts per million) level. In LIMA a submicron depth of the sample surface is vaporized by a focused frequency quadrupled (266 nm) Nd:YAG- laser pulse, creating ionized species which are then fed to a time-offlight (ToF) spectrometer for analysis. The lateral resolution of LIMA is about one micrometer and a suitable location on the sample surface (in this case the deposited metal line) can be sought by optical microscopy. The material composition as a function of

29 depth was acquired by a sequence of laser pulses, each one vaporizing a small fraction of the metal surface layer at the same location. The schematic of the in-house constructed LCVD system is shown in Fig. 4. The processing system consists of lasers, optics, gas circulation and precursor gases. The laser beam can be either scanned by acousto-optical deflection or by moving the beam by translation stage over the statically mounted deposition chamber. By this construction, unintended vibrations during the process are minimised which is essential in actual circuit repair with a micrometre resolution. Another important feature is the video monitoring of the deposition for accurate feedback and control of the deposition process in real time.

Fig. 4. Schematic of the Ni deposition gas system (Paper I).

2.2.1 Ni deposition from undiluted Ni(CO)4 Experiments with pure Ni(CO)4 were carried out in the 0.2-2.2 mbar pressure range on SiO2 passivated ICs. The Ni volumetric growth rate from pure Ni(CO)4 as a function of laser power is presented in Fig. 5. The depositions were carried out in the 50-150 mW laser power range. Ni lines were deposited with a Gaussian-intensity profile laser beam with a calculated 3 µm focus spot diameter. The laser beam scan speed was always maintained at a constant 80 µm/s. Below 0.5 mbar Ni(CO)4 partial pressure the deposition rate is practically independent of the laser power. At higher pressures the growth rate increases rapidly with increasing laser power. The highest obtained growth rate was 4500 μm3/s at 2.2 mbar Ni(CO)4 pressure. Ni(CO)4 pressure above 2.2 mbar and laser power above 150 mW resulted in

30 uncontrolled deposition with an irregular shape which exhibited poor adhesion to the passivation layer. The deposited layers were detached, presumably due to the high internal stress between SiO2 and deposited Ni layers during the cooling of the stripe. Increasing the precursor pressure to its ambient vapor pressure, 250 mbar, resulted in totally uncontrolled deposition. Immediately after switching on the laser thin Ni whiskers emerged upwards from the laser spot throughout the chamber and fine Ni powder contaminated the IC surface.

Fig. 5. Ni volumetric growth rate as a function of pure Ni(CO)4 partial pressure and laser power (Paper I).

According to our experiments it was difficult to deposit conductor lines suitable for circuit edit work by using solely Ni(CO)4 precursor. For this reason, the effect on the deposition characteristics of Ni(CO)4 dilution in inert He gas was investigated.

2.2.2 Deposition from Ni(CO)4 / He mixture The effect of Ni(CO)4 dilution in N2 has been studied previously in the pressure range of 1 to 200 mbar (Boughaba & Auvert 1994). In our experiments the effect of He as a carrier gas was studied in the 200-800 mbar pressure range. The volumetric growth rate as a function of the total pressure and Ni(CO)4 partial pressure is presented in Fig. 6. Introduction of He into the chamber profoundly improved the deposition characteristics compared to those of pure Ni(CO)4. A typical Ni(CO)4 partial pressure for high quality deposition on IC was 0.3 mbar diluted in 200 mbar He. At higher Ni(CO)4 partial pressure the pyrolytic reaction became difficult to control and the deposited line geometry was dependent upon the underlying circuit topography. Due to the lower laser-induced temperature on the IC surface, the deposition speed was slower

31 above the SiO2 passivated Al-layer than over the SiO2 passivated Si-layer on the IC surface. The growth rate difference with various Ni(CO)4/He pressures was significant at low total pressures (200 < ptot< 500 mbar) and high Ni(CO)4 partial pressures (2.2 mbar). The difference reduces when Ni(CO)4 partial pressure and total pressure are lower. According to these data and that previously published by Auvert (1993), the limiting step of the process is the mass transfer of the nickel carbonyl molecules. Also, at 800 mbar total pressure the deposition rate is almost independent of the precursor pressure. It has been explained that the limiting step in this case is the desorption of the CO molecules from the surface (Tonneau et al. 1988). The growth rate saturates to about 200 μm3/s when the total pressure approaches 800 mbar.

Fig. 6. The volumetric growth rate of Ni as a function of chamber total pressure and Ni(CO)4 partial pressure. Laser scan speed 80 µm/s. Laser power 100 mW (Paper I).

The best quality depositions were achieved at 0.3 mbar Ni(CO)4 partial pressure diluted in 200 mbar He. Under these process parameters the deposits have a well-defined “flat top” geometry and morphology suitable for making electrical connections. A typical AFM surface profile measurement of a deposited Ni line on the top of a SiO2 passivated IC surface is shown in Fig. 7. From the measurement it was possible to conclude that there was good step coverage over the corrugated IC surface. Deposited linewidths were 10-30 μm and thickness 0.5 μm. It was essential to keep line thickness below 1 μm to achieve proper adhesion to the IC passivation surface. The resistivity of the deposited Ni line was found by four point probe measurement to be on average 8 μΩcm

32

Fig. 7. AFM scan of the deposited Ni conductor line. The deposition was carried out on a SiO2 passivated IC. Laser power 100 mW, laser scan speed 24 μm/s. Precursor and He gas partial pressure 0.3 and 200 mbar, respectively (Paper I).

The chemical contents of the Ni deposits were characterized by LIMA measurement which is shown in Fig. 8. The deposited Ni line showed only traces of impurities and no carbon or oxygen contamination, from which it was concluded that the pyrolytic reaction was complete and Ni(CO)4 was reduced to metallic Ni.

Fig. 8. Typical LIMA measurement of the deposited Ni line. Laser power 100 mW, Ni(CO)4 partial pressure 0.3 mbar diluted in 200 mbar He (Paper I).

33 The developed process was confirmed to work in several circuit edit cases. Another application was the deposition of Ni inductors on polyimide films (Reyntjens 1996). One case where two metal conductors have been connected by a LCVD Ni line is shown in Fig. 9.

Fig. 9. Circuit edit carried out by XeCl-excimer laser. Mo line cut and subsequent Ni deposition between two signal lines (Paper I).

2.3 LCVD of Cu from Cu(hfac)tmvs The circuit edit process based on Ni(CO)4 had inherent drawbacks. The main concern in the case of the Ni LCVD process was the high safety risks in handling the gas. It was also expected that better conductivity could be achieved with copper precursor because copper has a lower bulk resistivity than nickel (1.7 μΩcm vs. 7.4 μΩcm, respectively). For these reasons, the deposition of Cu from Cu(hfac)tmvs by LCVD process was investigated. The aforementioned precursor was introduced by Norman (1992) and it was quickly adapted to the manufacture of IC copper interconnections by CVD process. Since this copper precursor is liquid with a low vapor pressure at room temperature it can be quite easily and safely handled. The experiments were carried out with two carrier gases, He and H2. The morphology and chemical contents of the deposited interconnection microstructures were examined by atomic force microscopy (AFM), optical microscopy, LIMA and electrical measurements. The schematic of the copper LCVD system is shown in Fig. 10. The gas handling system delivered a controlled flow of the organometal precursor and carrier gas into the reaction chamber. The precursor gases were fed into the chamber by steel injection needles located in the close vicinity of the top surface of the chip. It was found that this assembly gave much better deposition quality compared to static (i.e. no flow) conditions because fresh precursor flowed continuously to the heated laser spot. The ICs were

34 assembled in a jig inside the chamber before the deposition process. The chamber also had electrical feedthroughs so it was possible in some circuit edit cases to measure the success of the actual metal deposition connection of signal lines during the process. Prior to the deposition the chamber was evacuated to 10-4 mbar by a turbomolecular pump. During Cu deposition the liquid Cu(hfac)tmvs precursor container was heated to 36°C to increase the vapor pressure to 0.33 mbar. To avoid possible downstream condensation, the gas delivery pipes and the reaction chamber were heated to 38°C and 40°C, respectively. The precursor and carrier gas (He or H2) flow was controlled by mass flow controllers (Bronkhorst BV, Netherlands) and set to 2 cm3/min constant flow. The unreacted precursor gas and the LCVD reaction by-products were combusted in a high temperature oven.

Fig. 10. Schematic of the constructed gas delivery system for copper deposition (Paper II).

An Ar+ laser (Coherent Innova, Spectra-Physics, USA) at 488 and 515 nm wavelengths was used as a laser source in all experiments. The laser beam was 5x expanded (MellesGriot, USA) and collimated before reaching the microscope objective (M-Plan APO10, Mitutoyo Inc, Japan) with focal length (f) = 20 mm and numerical aperture (NA) = 0.28. The beam was spatially filtered (with 5 μm aperture) to give a smooth Gaussian-intensity beam profile. The beam entered a computer controlled acousto-optic deflector (AG Electro-optique, France), which enabled the beam deflection in the x-y direction. The laser beam collimation and focus on the substrate surface was checked by a shear plate (Melles-Griot Inc, USA). Subsequently the converging beam passed through a quartz window into the reaction chamber. The focused minimum spot size on the substrate was about 3 μm by calculation. The LCVD process was monitored in real time through a coaxial video system and digital image processor (DEI 470, Optronics Engineering Inc, USA).

35

2.3.1 Cu deposition with He carrier gas The first Cu depositions were carried out with He as a carrier gas. Cu metal lines deposited by this process often exhibited irregular shapes such as volcano shaped cross sections, which were observed at high laser power densities. Spatially periodic structures were observed with several combinations of writing speed and laser power. With low Cu(hfac)tmvs partial pressure (i.e. the precursor source was not heated) and total pressure (less than 1 mbar) a large area of the substrate was easily covered with thin copper film. At a precursor vapor pressure of 0.08 mbar depositions could be made only at very low scanning speeds from 1 to 4 μm/s. It was also noticed that with a precursor partial pressure of 0.33 mbar the total pressure should be at least 1 mbar to avoid global deposition over the whole circuit surface (Paper II). After the process the substrate surface (SiO2) was found to be covered all over with a thin reddish film. The hypothesis was that this thin film was a compound containing condensed solid Cu(hfac)2. Since this compound can be reduced by the addition of a reducing agent, new experiments with H2 as a carrier were carried out.

2.3.2 Cu deposition with H2 carrier gas The experiments with H2 carrier gas were carried out with the same processing system. It was observed that better quality depositions were achieved with H2 as a carrier gas and this process was chosen for the further development in the actual circuit edit work. The Cu thickness as a function of the number of the deposited layers is shown in Fig. 11. These depositions were performed with a scanning speed of 24 μm/s on to the IC surface with a 2 μm thick SiO2 top layer. The laser beam was focused to a 4 μm spot size and the laser power was varied between 65, 130 and 240 mW. The precursor gas was carried by H2 into the chamber yielding a partial pressure of 0.33 mbar, the total pressure being 10 mbar after adjustment with the downstream pressure control valve. It was observed that all the induced powers started at nearly the same film thickness after the first deposit. After the fourth deposit the underlying copper film decreases the growth rate more rapidly in the low power Cu stripe. This can be explained by the increased volume of the deposited Cu, which decreases the deposition temperature in the reaction zone due to thermal conduction along the growing line.

36

Fig. 11. Cu-film thickness as a function of the number of deposited layers. Process parameters: H2 carrier gas, Pp = 0.33 mbar, Ptot = 10 mbar, beam spot size = 4 μm, laser power P= 65, 130 and 240 mW, laser scan speed=24 μm/s (Paper II). The insets show the measured cross sections of the deposited lines.

LIMA measurement data of a Cu line deposited with a scan speed of 24 μm/s, a laser power of 40 mW and a total pressure of 5 mbar are shown in Fig. 12. A strong Cu signal and typical semiconductor process contaminants potassium and sodium are observed on the plot. Unassigned spikes from the a.m.u. range 150 to 230 are due to complex byproducts adsorbed on the surface. The exact chemical formula of these by-products could not be identified. The LIMA analysis revealed that the deposited copper surface was contaminated with these by-products but the contamination level decreased deeper inside the deposited line. It cannot be ruled out that these Na and K traces are due to mishandling (sweat) of the samples. A resistivity of 3.7 μΩcm (bulk value 1.67 μΩcm) was obtained for the Cu lines deposited from H2 buffered Cu(hfac)tmvs on SiO2 passivated ICs. Measurements were carried out by the four-point probe method (Paper II). Also, it was found out that when the laser beam was focused on the Si3N4 surface instead of SiO2, the laser-induced temperature in the deposition zone invariably melted the passivation, resulting in highly resistive copper lines not suitable for circuit edit work. The maximum irradiance threshold value for the deposition without the deformation of the nitride layer was found to be 4x109 W/m2. Furthermore, it was found that successful deposition on silicon nitride required the focusing of the laser beam slightly above the circuit surface. This means that the incoming laser beam is already diverging when it hits the surface resulting in a smoother temperature profile. This was coined as 'out of focus' deposition, i.e. the laser hot spot is not located on the passivation surface but 15 µm above it. This was accomplished by moving the microscope objective upwards using the z-axis motor. This results in the best deposition morphology and enables multiple

37 successive layer depositions (increased thickness) for one conductor line to be carried out. The beam is scanned several times on top of the deposited line yielding a gradually nucleating deposit with increasing thickness. It should be stressed here that this approach for deposition on silicon nitride was essential for successful IC edit work since at the time of the research silicon nitride was the most commonly encountered IC passivation material.

Fig. 12. LIMA analysis of a Cu line on a SiO2 passivated IC. Conditions: He carrier, pp= 0.33 mbar, ptot= 5 mbar, beam spot size= 4 μm, P= 40 mW, scanning speed= 24 μm/s (Paper II).

38

Fig. 13. Cu film thickness as a function of the number of the deposited layers for He and H2 carriers. Deposition parameters: pp= 0.33 mbar, ptot= 10 mbar, laser beam spot size = 17 μm, P= 660 mW, scanning speed = 80 μm/s (Paper II).

Fig. 14. AFM measurement from He buffered Cu deposition on SiO2. Conditions: P= 1.2 W, scanning speed= 160 μm/s, beam spot size= 33 μm, four layers and pp= 0.33 mbar and ptot= 5 mbar (Paper II).

39 In Fig. 13. an interesting difference between H2 and He carrier gas deposition is revealed. The nucleation starts more rapidly with He carrier than with H2 carrier. After the deposited metal line has reached 150 nm thickness the laser generated heat is conducted more efficiently along the deposited line. When the line thickness reaches 250 nm the increased deposition rate with H2 carrier becomes more dominant and results in a thicker line. It can be seen that the increase in metal line thickness with He carrier gas saturates sooner than with H2, even if the second deposition results in thicker stripe thickness (100 nm). However, the total effect on the increased deposition rate of using hydrogen as the reducing element for the Cu(hfac) cannot be seen from this picture because there is also a change in the width of deposit. After ten subsequent depositions the final widths were 25 and 21 μm for H2 and He buffered gas mixtures, respectively. The calculated volumetric growth rate for the hydrogen buffered Cu deposition was 80 μm3/s at a film thickness of 200 nm. After the most suitable process parameters had been determined the constructed system was used in 132 circuit edit cases. As mentioned before, every single circuit edit case is unique due to the variations of i) different semiconductor processes ii) the topography of the specific location, where the deposition is to be carried out. The thermal conductivities, reflection and absorption coefficients and surface corrugation (in unplanarised ICs) vary from one part of the IC to another. One selected case where only laser cutting and copper deposition were used is presented in Fig 15. This was a simple 2 metal layer ASIC with Mo as the 1st metal and Al as the 2nd metal layer (from bottom) with global SiO2 passivation. In this optical micrograph both metal layer conductor lines can be seen clearly. The cuts and contact points in the conductor lines were carried out by 40 ns XeCl- excimer laser pulses. After this, two copper line re-wires were deposited to interconnect the required lines.

Fig. 15. IC repair carried out by copper LCVD. Mo lines can be seen as vertical brown and Al as shiny horizontal ones. The width of the deposited copper re-wires is ~12 μm.

3 Combined LCVD and FIB methods The FIB experimental research was carried out using a Micrion 2500 (Micrion Inc., Peabody, USA) with gas assisted etching with XeF2, Cl2 and dielectric SiO2 deposition from tetramethylcyclotetrasiloxane (TMCTS)/H2O and tungsten deposition from W(CO)6. The achievable aspect ratio and resolution of the FIB GAE processing was determined by etching small square holes in a Si3N4 dielectric thin film layer. This was carried out by a XeF2 assisted GAE process. Fig. 16. shows how the achievable aspect ratio depends on the size of the hole. This is caused by the diffusion of the precursor gas into, and the diffusion of the etching reaction byproducts out of, the hole bottom. The achievable depth for the 0.25 x 0.25 µm2 hole began to saturate to about 2.25 µm so the aspect ratio was about 10. Neither the resolution nor the reproducibility of the FIB processing could be achieved by the laser cutting presented in Chapter 2.

41

Fig. 16. GAE etching depth as a function of ion dose and the square hole dimension. The depth of the holes was determined by FIB cross sectioning and measurement.

3.1 FIB circuit edit In the course of FIB circuit edit work the electron flood gun was mainly utilized as a charge neutralizer. It was noticed that the sensitivity of the chip to charge buildup and subsequent discharge varied greatly between chips manufactured by different semiconductor processes. This variation in discharge sensitivity was also shown on different areas of the chip and related to underlying circuit blocks and wirings. Particularly, any electrically floating transistors were susceptible to discharge since no charge dissipation route was available. In this case, the local deposition of a thin tungsten film of several square micrometres was carried out and connected to the conductor line to provide a dissipation route for the ion beam generated charge. One example of FIB processing for circuit edit is shown in Fig 17.

42

Fig. 17. FIB circuit edit with gas assisted etching with XeF2 and deposition from W(CO)6. Ion dose 2 nC/μm2 for XeF2 etch and 3 nC/μm2 for tungsten line depositions. The aluminium line cuts were carried out with 1 nC/μm2 Cl2 assisted FIB etch.

3.2 Conductor line resistivity reduction Resistivity reduction is based on the simple idea of using the FIB deposited tungsten as a platform where the subsequent copper LCVD is thermally confined. For the experiments the LCVD process parameters were the same as those found to work in Chapter 2. Fig. 18 shows the four-point probe test pattern and deposition of FIB tungsten and LCVD of copper deposited partially on top of it in order to decrease the resistance of the FIB deposited tungsten line. Before the copper deposition the resistivity of the FIB deposited tungsten was found to be of the order of 400 μΩcm. Subsequent LCVD copper deposition resulted in a significant decrease in the line resistance (from 90 Ω to 40 Ω). The resistivity of the laser deposited Cu was found to be 16 μΩcm. Later FIB cross sectioning showed that the original tungsten thickness was 400 nm and the copper deposition 500 nm. The line widths were 5.9 μm and 4.4 μm for tungsten and copper, respectively (Paper IV).

43

Fig. 18. A FIB secondary electron micrograph of the selective LCVD copper deposition on top of the FIB deposited tungsten line (Paper IV).

This method was used in several later circuit edit cases. One particular example is an RFcircuit edit shown in Fig. 19. In this case, much lower resistivity than that achievable by FIB deposited tungsten was required. After the tungsten deposition subsequent LCVD was carried out on top of the tungsten lines. Since the copper deposition is first initiated by nucleation on the surface the FIB deposited tungsten surface acts as a nucleation site and the copper deposition takes place on the preceding tungsten deposit. By carefully controlling the laser power it was possible to induce copper deposition only on the top of the tungsten deposit thus greatly enhancing the deposition resolution for copper while the high resistivity of the tungsten line was reduced to an acceptable level for successful circuit edit in this particular case.

44

Fig. 19. FIB secondary electron micrograph of a RF-circuit edit that has been carried out by combined LCVD and FIB processing (Paper V).

During the work it was found out that the most effective repair strategy was to use gas assisted (XeF2) FIB etching for the via formation in the SiO2/Si3N4 passivation layer and then fill the via with FIB deposited tungsten. On top of the via a 4 x 4 μm2 sized tungsten pad is grown by FIB, where the LCVD copper line can be contacted reliably with a low contact resistance. In Table 2 the comparison of FIB and LCVD technologies in circuit edit is summarised. Typical FIB tungsten deposition of 200 μm long, 5 μm wide and 350 nm thick takes about 45 min to carry out. Higher deposition rates can be achieved by increasing the aperture and thus the ion current but then the risk for beam induced transistor parameter drift and ESD increases.

45 Table 2. Comparison of the FIB and LCVD technologies. Typical parameters for:

FIB

Minimum beam spot diameter [nm] Cutting (process)

Laser methods

~5

~1000

XeF2 GAE milling

One laser pulse

(oxide removal)

(both oxide and metal)

Total time consumption for a 3 μm Cut by ion milling (metal cut)

Cut by one 1 μJ energy laser pulse

wide 1 μm thick Al-line on top metal layer with 1.1 μm oxide passivation Total time consumption [s]

300

~1

Ion beam deposition

LCVD deposition

Metal deposition 200 μm long, 2 μm wide and 0.35 μm thick metal line Deposited metal

tungsten

copper

Specific resistivity [μΩcm]

~ 200

~ 20

Resistance [Ω]

< 230

< 23

Total time consumption [s]

2700

16

With LCVD this time is reduced to 16 s and the resulting resistance of the deposited wire is reduced from 230 Ω to 23 Ω (Paper V). However, the minimum spot size (limiting the ultimate resolution) is 5 nm with FIB compared to 1 μm with laser and it is clear that laser is much inferior to FIB in cutting or contact hole opening in circuit edit work. Also, it is practically impossible by laser to reveal lower metal layers when they are stacked on top of each other. By FIB [Cl2 (for Al) and XeF2 (for SiO2 and Si3N4)] assisted etching the layers can be peeled away one by one until the desired lower metal line is exposed.

Fig. 20. A circuit edit where the copper “guard ring” has been deposited before FIB work (Paper V).

46 LCVD can be also used for the quick deposition of a grounded “guard ring” prior to FIB work that gives the accumulating charge a dissipation route. The high deposition speed makes it feasible to connect a copper line to, for example, a grounded bonding pad and thus protect the sensitive circuit elements from forthcoming FIB operations. One special case where the FIB operations were carried out in the vicinity of LCVD copper deposition is shown in Fig. 20.

Fig. 21. Circuit edit carried out by combined FIB and LCVD copper process (Paper IV).

In this case the copper line could also be used as a re-wire to another circuit block afterwards so it was connected by FIB tungsten deposition. Naturally, LCVD does not induce any charging problems that would occur if the guard ring were deposited by FIB. Furthermore, the low speed of FIB deposition often prevents the direct connection to the bonding pads (Paper V). The developed circuit edit procedure is shown in Fig. 22 (Paper V).

47 Circuit edit case

Plastic package decapsulation

Only conductor line cuts required ?

yes

no yes

LCVD guard ring deposition

Circuit sensitive to discharge ?

High resolution 100 μm deposition required ?

no FIB tungsten line deposition from W(CO)6 Circuit electrical tests

Tests accepted

yes Case closed

Fig. 22. Fig. 22. Flowchart of the combined LCVD and FIB process in prototype circuit edit (Paper V).

The process begins with the decapsulation of the plastic IC package with boiling sulphuric acid or fuming nitric acid to expose the IC chip surface. If only low resolution cuts are required (> 1 μm) they are simply carried out with a focused Nd:YAG laser or with XeCl- excimer laser pulses. High resolution cuts and contact hole openings to lower metal layers are carried out with the XeF2 assisted FIB process as well as contact tungsten plugs (from circuit lines to IC surface). Depending on the length and required

48 resistance the metal deposition is then carried out by FIB tungsten or LCVD of copper. Cl2 assisted FIB etching can be used for Al line cuts to further speed up the process. In the case of discharge sensitive ICs, an LCVD guard ring can be used for protection of the circuit. The functionality of the edited circuit is then verified and the cycle is repeated until the required information is gathered or a functional circuit realised.

3.3 Demand for circuit edit and economic issues The demand for the circuit edit process in the participating companies was recorded during the two year period and is shown in Fig 23. In the chart legend the circuit edit cases mean the specific ASIC under development and modification cases mean how many different circuit edits were carried out for these ASICs. The total number of circuit edits was 132 for these companies, so the need for this kind of service was quite strong. If these numbers are reflected upon the potential direct and indirect costs discussed in introduction part of this work, the savings to the companies have been quite significant.

Fig. 23. The total number of the edited ASICs during the 2 year research period.

49

3.4 Future development During later work it was found out that the addition of water significantly improves the deposition rate for the copper LCVD process. This is currently suggested to be due to the catalytic action of water molecules in the process, as in conventional CVD. Also, new copper precursors have been developed and may be even more suitable for the LCVD than the precursor utilised in this work. The development of compact diode-pumped solid state lasers working in visible wavelengths has made it possible to reduce the size of the system from one requiring an entire room to that of a tabletop version. Also, the evolution of FIB systems has lead to dual-beam systems where the actual process of FIB milling can be observed by an attached scanning electron microscope, greatly enhancing the controllability of the process.

Conclusions In this work a LCVD processing system based on Ni(CO)4 and Cu(hfac)tmvs precursor gases was designed, constructed and investigated in practical applications. The suitability of this system for prototype stage ASIC modification was evaluated in several hundreds of ASIC circuit edit cases provided by the industry. These included signal line re-wiring, test probe pad deposition, EMI shielding and supply voltage line deposition. LCVD and laser cutting was found to be an effective method in IC repair and restructuring work, especially when long distance re-wirings are required. The LCVD of Ni from Ni(CO)4 precursor was investigated as a function of partial pressure and Ni(CO)4/He dilution ratio. It was found that He dilution enhanced the morphology of the deposited conductor lines in practical IC repair work. The resistivity of the deposited Ni lines was close to the nickel bulk resistivity. LCVD of copper from Cu(hfac)tmvs for practical IC repair work was presented and it was shown that the heating of the precursor gas and hydrogen participation in the reaction are the most critical requirements for a reasonable deposition rate and low resistivity of the deposited line. The lower toxicity of Cu(hfac)tmvs and the improved conductor line deposition morphology compared to Ni(CO)4 makes it more feasible in practical IC circuit edit work. It was necessary to adjust the deposition parameters according to the topography of the IC because every LCVD process onto a particular IC is unique. This approach resulted in the appropriate “processing parameters window” that was found suitable for most of the IC edit cases. The circuit edit cases where the developed LCVD process was found to be most efficient can be summarised as follows: 1. The re-wiring of high current carrying conductor lines. Typically, this kind of circuit edit is required when the power supply lines must be re-wired to other locations or circuit blocks. 2. The deposition of over 100 μm long conductor lines. 3. The deposition of bonding and probing pads for electrical measurements of the circuit elements. 4. Large area deposition (several square millimetres) of copper. One example is the local EMI shielding of a light sensitive part of an IC. 5. The reduction of charge induced damage in the FIB circuit edit process.

51 On the other hand, the FIB process is superior to laser processing in: 1. High resolution (< 1 μm) conductor line cuts and cuts in lower IC metal layers. 2. The fabrication of contacts and cuts in stacked aluminium metal layers 3. Selective removal of Si3N4 and SiO2 passivation layers Furthermore, it was demonstrated how to utilize LCVD deposited copper for special IC repair cases in combination with the FIB technique. The main applications where LCVD was found to be invaluable are the fabrication of low resistivity and long distance depositions. Also, analogue and mixed digital/analogue IC repairs may require LCVD deposited copper instead of FIB deposited tungsten. However, it should be pointed out that in some circuit edit cases the laser cutting technology can be more effective than FIB etching. Examples are the cutting of thick power supply lines or particular circuit technologies with thick interconnect metal and wide linewidths, such as RF-circuits in the cellular phone industry. In this context the LCVD and FIB technologies can be seen as highly complementary, each benefiting from the special features of the other, as was demonstrated in this work. Based on the technical and scientific knowledge generated during the research work the developed LCVD circuit edit system was further refined and commercialized by Laser Probe LP Oy.

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Original articles I

Remes J, Moilanen H & Leppävuori S (1997) Laser-assisted chemical vapor deposition of nickel and laser cutting in integrated circuit restructuring, Physica Scripta, T69, 268-272.

II

Moilanen H, Remes J & Leppävuori S (1997) Low resistivity LCVD direct write Cu conductor lines for IC customisation, Physica Scripta, T69, 237-241.

III Remes J, Moilanen H & Leppävuori S (1997) Fast first-run silicon repair cases by laser chemical vapor deposition of copper from Cu(hfac)tmvs, Proceedings of IPFA'97 Conference, 21-25 July, Singapore, 280-283. IV Remes J, Moilanen H & Leppävuori S (1999) Enhancing IC repairs by combining laser direct-writing of Cu and FIB techniques, Microelectronics Reliability 39, 9971001. V

Remes J, Vähäkangas J & Uusimäki A (2006) Laser chemical vapor deposition of copper as a complementary method to focused ion beam processing of prototype integrated circuits, submitted for publication in IEEE Transactions in Advanced Packaging.

Reprinted, with permission of I and II Royal Swedish Academy of Sciences III ©1997 IEEE IV Elsevier Original publications are not included in the electronic version of the dissertation.

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