Synthesizing a Representative Critical Path for Post-Silicon Delay Prediction
Synthesizing a Representative Critical Path for Post-Silicon Delay Prediction Qunzeng Liu and Sachin S. Sapatnekar Department of Electrical and Comput...
Synthesizing a Representative Critical Path for Post-Silicon Delay Prediction Qunzeng Liu and Sachin S. Sapatnekar Department of Electrical and Computer Engineering University of Minnesota
Variations in Digital Circuits Variations in nanoscale technologies
Limitations of Critical Path Replica (CPR) • Only the nominal critical path is replicated • Numerous near-critical paths in modern VLSI circuits • Nominal critical path not necessarily critical in the manufactured die (process variations)
•Representative Critical Path (RCP) •Always predicts the worst case delay
7
Outline
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Problem Formulation Circuit with Gaussian process parameter variations Original Circuit
dc
RCP
dp
Representative Critical Path (RCP) should be related to the original circuit
Build the RCP to reveal most information about the original circuit. 9
Mathematical Formulation From SSTA (Pre-Silicon)
Our goal:
From measurement data (Post-Silicon) Conditional PDF
Comments on Method I • Advantage – Guaranteed to do no worse than CPR – Exact solution when there is clearly one dominating path
• Drawback – Flexibility of the solution is limited
• Runtime: O(Ks) – Saved by only updating the SSTA results of stages adjacent to the one sized up – K: number of iterations – s:number of stages
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RCP Generation (Method II)
ρs ρs−1
ρ2
ρ1
ρ0
Max
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Comments on Method II • Advantage – More flexibility, not tied to a specific path
• Drawbacks – No exact solution when there is only one dominating path – Not guaranteed to be always better than CPR
• Runtime: O(kcs) – k: number of starting locations – c: number of choices for each iteration – s: maximum number of stages
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Outline
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Comparison Metric • Average error, maximum error w.s.t. Monte-Carlo analysis
Guard band
• Guard band 18
Experimental Results (Method I)
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Scatter Plots (Method I)
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Experimental Results (Method II)
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Number of Paths vs. Delay
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80 60 40 20 0 0
# Paths vs. Delay for delay optimized s9234 30
num ber of paths
n u m b e r o f p a th s
# Paths vs. delay for delay optimized s13207 100
20 15 10 5
500 1000 delay (ps)
0 0
200
400 600 delay (ps)
800
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Conclusion and Future Work • Two novel methods for synthesizing a representative critical path under process variations are presented • Average prediction error: below 2.8% • To ensure 99% of the predictions pessimistic, requiring guard band 30% smaller than CPR • Future work – Test on real silicon
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Thank you!
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Extra Slides
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Scatter Plots (Method II) s35932 by Critical Path Replica
500
500
450
450
predicted delay (ps)
predicted delay (ps)
s35932 by Method II
400 350 300 250 250
300
350 400 true delay (ps)
450
500
400 350 300 250 250
300
350 400 450 true delay (ps)
500
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An Example RCP (Method II) RCP for s38417
y direction
590
0 0
590 x direction 27
ρ vs. iteration number (Method II) Correlation coefficient trend for s38417
Correlation coefficient
1 0.95 0.9 0.85 0.8 0.75 0.7 0
10
20 30 Iteration
40
50
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Equations for Editing ⎛ ⎡ μ c ⎤ ⎡ σ c2 aT b ⎤ ⎞ ⎡ dc ⎤ ⎜ ⎢ ⎥, ⎢ ⎟ ~ N ⎢d ⎥ 2 ⎥⎟ T ⎜ μ a b σ p ⎥ ⎣ p⎦ ⎦⎠ ⎝ ⎣ p ⎦ ⎢⎣
σ = b b +σ 2 p
μ = μc +
ρ=
T
aT b
σp
(d
pr
2 Rp
− μp )
d c = μc + aT p + Rc
d p = d pr
dc
T ⎛ a b ⎞⎟ ⎜ σ = σ ⎜1 − ⎟ ⎝ σ cσ p ⎠ 2
2 c
σ c2 = a T a + σ R2 d p = μ p + bT p + R p c
(
d c | (d p = d pr ) ~ N μ , σ 2
)
d p = μ p + bT3 p + R p
aT b1
σ c b12b1 + σ R2
p
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Parameter Variations Parameter Variations
σ Use the Grid-Based Correlation Model ([Chang, ICCAD03])