Software Defined Radio with MATLAB

John Zhao Product Manager

© 2014 The MathWorks, Inc.1

Agenda 

Software Defined Radio (SDR) Support in MATLAB – As radio peripheral – As FPGA target – MathWorks Support Package



SDR hardware as radio peripheral – RTL-SDR



SDR hardware as FPGA target – Xilinx FPGA based SDR



Summary

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Software Defined Radio (SDR) Support in MATLAB Overview

© 2014 The MathWorks, Inc.3

Typical SDR System

Analog Front End Filters, Mixer, ADC/DAC

Digital Front End Digital Filters, Sample Rate Conversion

Baseband Processing Modulation

Commercial-off-the-shelf hardware

GigE

FMC Tunable RF Card

FPGA Board

Host computer

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SDR hardware Supported by MathWorks 

RTL-SDR ($25) – Ultra low-cost, low-bandwidth (up to ~3MHz) – Rx Only



USRP2, N210 ($3000) – Customizable RF front-end



Xilinx FPGA-based radio ($2500) – High bandwidth (~25MHz) – Possible FPGA target

5

SDR as Radio Peripheral • Configure radio hardware from MATLAB and Simulink • Acquire live radio signals • Stream baseband real-time data to MATLAB and Simulink

NooElec RTL-SDR

6

SDR as FPGA Target 

 

Design custom algorithms in MATLAB/Simulink Verify algorithms with real radar data Generate HDL Code for FPGA implementation

HDL Code

Simulink Or Xilinx ML605 and ADI FMComms1

Ettus Research USRP® N210 7

SDR Hardware as Radio Peripheral RTL-SDR

© 2014 The MathWorks, Inc.8

SDR as Radio Peripheral: RTL-SDR • Connect to computer running MATLAB through USB • Receive streaming RF signals • Configure center frequency and sample rate in MATLAB

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RF Antenna

The RTL-SDR USB RF Receiver

to PC USB Port at fs Hz 7cm

NooElec SDR Mini Receiver

Configuring SDR parameters (via USB port) •

fRF - RF Center frequency

• • •

fs – I/Q Data Sampling Frequency Gain Control Parameters Frequency Correction 10

An IF Software Defined Radio RF Antenna

Raphael Micro R820T Silicon Tuner

RTL2832U – Digital IF to Baseband Receiver

Analogue

Digital ReSampler/ Synch.

RF Filter

ADC

I

NCOs

to PC USB port

sin2pfIF(n/fs)

AGC

cos2pfRFt

7 bits

cos2pfIF(n/fs)

IF Filter

LNA

Low Pass FIR Filter + Decimation

VCO

fs

ReSampler/ Synch.

Low Pass FIR Filter + Decimation

Q 7 bits

NooElec SDR Mini Receiver fRF

RF VCO Frequency (50MHz to 1GHz)

LNA/AGC VCO

Tuner Gain Control Voltage Controlled Oscillator

fs

Sampling frequency (up to 2.8MHz)

ADC I/Q FIR NCO

Analogue to Digital Converter In-phase & Quadrature-phase Channel Finite Impulse Response Numerically Controlled Oscillator

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An IF Software Defined Radio (design flipped left to right now!) 7 bits

ReSampler/ Synch.

cos2pfIF(n/fs)

NCOs sin2pfIF(n/fs)

Signal Power (dB)

7 bits

ReSampler/ Synch.

RF Filter LNA

AGC

Q Low Pass FIR Filter + Decimation

IF Filter

ADC

RF Antenna

I

Low Pass FIR Filter + Decimation

VCO

cos2pfRFt

fs

0

400 MHz fc = fRF – fIF

frequency

0.2 MHz

RF 12

An IF Software Defined Radio (design flipped left to right now!) ReSampler/ Synch.

cos2pfIF(n/fs)

sin2pfIF(n/fs)

Signal Power (dB)

7 bits

RF Filter LNA

AGC

Q Low Pass FIR Filter + Decimation

IF Filter

ADC

NCOs

VCO

ReSampler/ Synch.

RF Antenna

I

Low Pass FIR Filter + Decimation

cos2pfRFt

fs

0.2 MHz

0.2 MHz

400 MHz

0

fIF Analog IF

fc = fRF – fIF

frequency

7 bits

RF 13

An IF Software Defined Radio (design flipped left to right now!) 7 bits

ReSampler/ Synch.

cos2pfIF(n/fs)

IF Filter

ADC

NCOs sin2pfIF(n/fs)

Signal Power (dB)

7 bits

RF Filter LNA

AGC

Q Low Pass FIR Filter + Decimation

VCO

ReSampler/ Synch.

RF Antenna

I

Low Pass FIR Filter + Decimation

cos2pfRFt

fs

fs = 28.8MHz

0.2 MHz

14.4 MHz

0

fIF Digitized IF

fs/2

400 MHz fc = fRF – fIF

frequency

0.2 MHz

RF 14

An IF Software Defined Radio (design flipped left to right now!) 7 bits

ReSampler/ Synch.

cos2pfIF(n/fs)

IF Filter

ADC

NCOs sin2pfIF(n/fs)

Signal Power (dB)

7 bits

RF Filter LNA

AGC

Q Low Pass FIR Filter + Decimation

VCO

ReSampler/ Synch.

RF Antenna

I

Low Pass FIR Filter + Decimation

cos2pfRFt

fs

fs = 28.8MHz

-0.2 MHz 0.2 MHz

14.4 MHz

0 fs2 = 2.8MHz

Baseband

0.2 MHz

fIF Digitized IF

fs/2

400 MHz fc = fRF – fIF

frequency

0.2 MHz

RF 15

FM Radio

87.5 – 108 MHz

Aeronautical

108 – 117 MHz

Meteorological Fixed mobile Special events broadcast Fixed mobile,

~ 137 MHz 140 – 150 MHz 174 – 217 MHz

RF Antenna

And what RF signals can we find? Range: ~80 MHz to 1GHz

(space to Earth) 267 – 272 MHz

Fixed mobile, (Earth to space) ISM band (short range)

to USB port

213 – 315 MHz ~433 MHz

Emergency services

450 – 470 MHz

UHF TV Broadcasting

470 – 790 MHz

NooElec SDR Receiver

fs

Parameters from Simulink (via USB port)

Fixed mobile telephony GSM-R band (UK)

862 – 890 MHz 921 – 925 MHz

• • • •

fRF- RF Centre frequency fs – Sampling Frequency Gain Control Parameters Frequency Correction

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MathWorks RTL-SDR Driver (Simulink)

I/Q data

fRF

(complex)

fs

fs

Sampling frequency (up to 2.8MHz)

fRF

RF Center Frequency (50MHz to 1GHz) +

Tuner gain parameters Frequency correction parameters

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MathWorks RTL-SDR Driver (MATLAB)

fRF

fs

Get more information in the MATLAB doc on using the RTL-SDR System Object.

fs

Sampling frequency (up to 2.8MHz)

fRF

RF Center Frequency (50MHz to 1GHz) +

Tuner gain parameters Frequency correction parameters

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Example: RTL-SDR 

Airplane detection

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Other Examples of RTL-SDR 

FM Radio Receiver



RF Spectrum Analyzer



Frequency Offset Calibration



FRS/GMRS receiver

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SDR as Radio Peripheral - Summary 

Work with real signals – Audio, video, RF



Radio peripherals – Low-cost alternative to test & measurement instruments



Support packages extend connectivity



MathWorks RTL-SDR Page http://www.mathworks.com/hardware-support/rtl-sdr.html

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SDR Hardware as FPGA Target Xilinx FPGA based radio

© 2014 The MathWorks, Inc. 22

SDR as FPGA Target: Xilinx FPGA 

 

Design custom algorithms in MATLAB/Simulink Verify algorithms with real radar data Generate HDL Code for FPGA implementation

HDL Code

Simulink

Xilinx ML605 and ADI FMComms1 23

Xilinx FPGA-Based Radio



FPGA Board – Xilinx ML 605 Evaluation board (Virtex 6 FPGA)



RF FPGA Mezzanine Card (FMC) – Analog Devices - FMCOMMS1-EBZ 

400 MHz to 4 GHz; 50MHz Analog BW

– Bitshark FMC-1RX from Epiq Systems 

300 MHz to 4 GHz; 50MHz Analog BW

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FPGA Top Level for SDR

RF Card

FPGA

Host

Transmit Data path

uController

Mixer

Interpolation Filtering

User Design

Gig-E

DAC

FMC

RFOUT Analog FE

NCO

Control

I/O

Receive Data path RFIN

Analog FE

ADC

Mixer

Decimation Filtering

MATLAB or Simulink

User Design

NCO

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RF Control from MATLAB and Simulink

26

FPGA Targeting with HDL Coder

  

Generate optimized HDL Code Guided workflow from model to programming FPGA FPGA-in-the-loop verification

27

Examples for Xilinx based radio 

WLAN Beacon Frame Receiver



QPSK Receiver

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SDR as FPGA Target – Summary 

Connect reconfigurable SDR hardware with MATLAB – USRP N210 – Xilinx Virtex-6 FPGA + RF card



Extend the radio peripheral capability to SDR target – Run user algorithms on FPGA



Integrated with HDL Coder – Automated workflow for programming FPGA

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More information Product Manager  John Zhao ([email protected])

Technical Resources  MathWorks SDR solution http://www.mathworks.com/sdr.html  Communications System Toolbox

http://www.mathworks.com/products/communications/  YouTube of Simulink RTL-SDR receiving desktop transmitted AM http://tinyurl.com/n2dccsz

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Thank you!

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