Single and Three Phase Power Factor Correction Techniques using Scalar Control A Thesis Submitted for the Degree of Master of Science in the Faculty of Engineering By A G Vishal Anand
Department of Electrical Engineering Indian Institute of Science Bangalore - 560 012 India June 2005
Acknowledgements I am grateful to Prof. V. Ramanarayanan for taking me as his student and providing me the opportunity to work in the area of Power electronics. I am eternally indebted to him for the facilities of learning that he has provided me in my stay here at IISc. I am also thankful to him for his valuable guidance during the course of my research work. I have learnt a lot of lessons in work ethics, professional behavior and meticulous approach to problem solving from him which will inspire me for the rest of my life. I also thank him for providing me an opportunity and financial support to present my work at Powercon 2004. I am thankful to Prof. V. T. Ranganathan for the course on Electric drives, which i had the opportunity to attend. I had never before experienced teaching, so clear, inspiring and interesting as Prof. V. T. Ranganathan used to do. My heartfelt thanks to him for the same. I thank Prof. G. Narayanan for his advice and suggestions. I gratefully acknowledge the financial support provided by Ministry of Human Resource and Development, Government of India. I also thank IISc administration for providing excellent hostel and mess facilities. I thank Mr. Ravi, Mr. Ramachandran and the other workshop staff for their help in building my hardware. I also thank Mrs. Silvi Jose for the support extended in procuring components. I also extend my thanks to Mr. D. M. Channe Gowda and his team at EE office for the smooth conduct of administrative activities. I thank Mr. Debmalya Banerjee for the technical inputs he gave me during the course of my research work. I also thank Mr. Rajesh Ghosh for his suggestions and guidance. I also thank Dr. A. R. Beig for his advice and help in my work. One of the reasons for the time i spent in the power electronics lab as a student being enjoyable is the people. The technical and non-technical discussions i had with my friends here will be cherished by me for a very long time. I thank all my friends Shashidhar, i
ii
Acknowledgements
Kamalesh Hatua, Swaminathan, Amit, Milind, Prathap kumar, Pradeep Shinde, Rajendra Prasad, Neeraj Gupta, Srikant Varma, Lakshmi, Rahmatallah mirzaei, Kamalakannan, Vinay, Kaushik Basu, Venugopal, Ram Krishan Maheshwari, Md. Masihuzzaman, Ravindar Naik and Koteswara Rao in the lab for having created and fostered this atmosphere of bonhomie in the lab. Lastly, I thank my parents and Kavitha for having given me the strength and moral support during the course of my stay here. I am indebted to them eternally for all that they have done for me.
Abstract AC-DC rectification was done using peak-charging circuits and thyristor based phase-controlled rectifiers, until very recently. These systems operate at low power factor and inject significant amount of lower order harmonics into the power system (utility). The adverse effects of low pf operation and harmonics on the utility are well understood. To keep the harmonics injected into the utility within limits, IEEE setup standards for amount of harmonics generated by consumers. With advances in device technology, IGBTs and MOSFETs started replacing GTOs and thyristors as preferred power devices at low and medium power levels. These developments led to the growth of active Power Factor Correction (PFC) techniques based on MOSFETs and IGBTs. The main advantages of active power factor correction techniques is low THD input current and close to unity power factor operation. The desired features of an active PFC technique are • Close to Unity Power Factor operation. • Less than 10 % Total Harmonic Distortion in line current. • Reduced number of feedback signals for controller implementation. • Simple control strategy. This thesis focuses on this area of active PFC. The primary aim of this thesis is to propose novel control techniques in single and three phase PFC which have the desirable features mentioned above. The boost topology as shown in figure 0.1 is the power circuit configuration chosen for implementing the control techniques. The first control technique proposed is for single phase PFC. The technique, called scalar control is compared with one of the existing state-of-the-art techniques, average current mode control. The proposed method offers the advantages of control simplicity and input iii
iv
Abstract
voltage sensorless operation. Steady-state instability at light load conditions is observed in this method. The control technique proposed for single phase PFC, scalar control, is directly extendible vc
S1
D1
S3
D3
S5
D5
vc 2
vgr vgy
R
vgb
S4
D4
S6
D6
S2
D2
vc 2
Figure 0.1: Boost power circuit used in implementing the control techniques
to three phase also. This constitutes the second part of the work presented in this thesis. The proposed control method for three phase PFC is compared with the control technique based on the synchronous reference frame theory, also known as vector control. The proposed method offers the advantages of simple control, input voltage sensorless operation and absence of phase transformations. The last part of the thesis focuses on control techniques for three phase Shunt Active Filter (SAF). Scalar control methodology is the proposed control method for the SAF. This method provides both harmonic and reactive compensation. The advantages of this technique are the reduced number of feedback signals required, ease of implementation and absence of phase transformations. Implementation of this technique can be done by using either analog circuits or DSPs. The other technique implemented for the control of SAF is based on vector control. The differences in implementation of the two methods are brought out in the work presented. For implementing the control techniques discussed in this thesis, a generalized DSP platform was used. Controllers were developed using Texas Instruments TMS320LF2407 processor.
Abstract
v
vi
Abstract
Contents Acknowledgements
i
Abstract
iii
List of Tables
xi
List of Figures
xii
Nomenclature
xvii
1 Introduction
1
1.1
AC-DC Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.2
Power, Power Factor and THD
. . . . . . . . . . . . . . . . . . . . . . . . .
2
1.2.1
Power Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.2.2
Total Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . .
4
1.3
Diode Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
1.4
Problems due to harmonics
. . . . . . . . . . . . . . . . . . . . . . . . . . .
6
1.5
Agency Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
1.6
Passive Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
1.6.1
Inductive filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
1.6.2
Series-Parallel Resonant Filter . . . . . . . . . . . . . . . . . . . . . .
10
Active techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
1.7.1
Single phase PFC Techniques . . . . . . . . . . . . . . . . . . . . . .
12
1.7.1.1
Hysteresis Current Control . . . . . . . . . . . . . . . . . .
12
1.7.1.2
Average Current Mode Control . . . . . . . . . . . . . . . .
13
1.7.1.3
Nonlinear Carrier Control . . . . . . . . . . . . . . . . . . .
14
1.7
vii
viii
Contents
1.7.2
Three phase PFC Techniques . . . . . . . . . . . . . . . . . . . . . .
15
1.7.2.1
Symmetric Transformation Method . . . . . . . . . . . . . .
15
1.7.2.2
Direct Power Control . . . . . . . . . . . . . . . . . . . . . .
16
Three phase Shunt Active Filter . . . . . . . . . . . . . . . . . . . . .
18
1.8
Contributions of the thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
1.9
Organization of the thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
1.7.3
2 Single phase Power Factor Correction Techniques
23
2.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
2.2
Average Current Mode Control . . . . . . . . . . . . . . . . . . . . . . . . .
24
2.2.1
Steady State Analysis . . . . . . . . . . . . . . . . . . . . . . . . . .
24
2.2.2
Small Signal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
2.2.2.1
Current Loop . . . . . . . . . . . . . . . . . . . . . . . . . .
29
2.2.2.2
Voltage Loop . . . . . . . . . . . . . . . . . . . . . . . . . .
30
Controller Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
2.2.3.1
Current Controller . . . . . . . . . . . . . . . . . . . . . . .
31
2.2.3.2
Voltage Controller . . . . . . . . . . . . . . . . . . . . . . .
33
2.2.3.3
Feed-forward Controller . . . . . . . . . . . . . . . . . . . .
34
2.2.4
Hardware Implementation . . . . . . . . . . . . . . . . . . . . . . . .
36
2.2.5
Simulation and Experimental results . . . . . . . . . . . . . . . . . .
36
Scalar Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
41
2.3.1
Steady State analysis . . . . . . . . . . . . . . . . . . . . . . . . . . .
41
2.3.1.1
Current Modulator . . . . . . . . . . . . . . . . . . . . . . .
42
2.3.1.2
Voltage controller . . . . . . . . . . . . . . . . . . . . . . . .
43
2.3.2
Steady State Stability criterion . . . . . . . . . . . . . . . . . . . . .
45
2.3.3
Small signal analysis . . . . . . . . . . . . . . . . . . . . . . . . . . .
47
2.3.3.1
Current loop . . . . . . . . . . . . . . . . . . . . . . . . . .
47
2.3.3.2
Voltage loop
. . . . . . . . . . . . . . . . . . . . . . . . . .
49
Controller design . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50
2.3.4.1
Current controller . . . . . . . . . . . . . . . . . . . . . . .
50
2.3.4.2
Voltage controller . . . . . . . . . . . . . . . . . . . . . . . .
54
Simulation and Experimental results . . . . . . . . . . . . . . . . . .
54
Comparison of Average current mode and Scalar control techniques . . . . .
59
2.2.3
2.3
2.3.4
2.3.5 2.4
ix
Contents 2.5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Three phase Power Factor Correction Techniques
60 61
3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
61
3.2
Vector Control based FEC . . . . . . . . . . . . . . . . . . . . . . . . . . . .
62
3.2.1
Principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . . .
62
3.2.2
Modeling of Power Circuit . . . . . . . . . . . . . . . . . . . . . . . .
67
3.2.3
Controller design . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
3.2.3.1
Current Controller . . . . . . . . . . . . . . . . . . . . . . .
70
3.2.3.2
Voltage Controller . . . . . . . . . . . . . . . . . . . . . . .
73
Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . .
74
Scalar Control based FEC . . . . . . . . . . . . . . . . . . . . . . . . . . . .
79
3.3.1
Principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . . .
79
3.3.2
Steady State Analysis . . . . . . . . . . . . . . . . . . . . . . . . . .
83
3.3.3
Modeling of power circuit . . . . . . . . . . . . . . . . . . . . . . . .
84
3.3.4
Controller design . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
3.3.4.1
Voltage controller . . . . . . . . . . . . . . . . . . . . . . . .
85
Simulation and Experimental results . . . . . . . . . . . . . . . . . .
87
3.4
Comparison of Vector and Scalar control techniques . . . . . . . . . . . . . .
91
3.5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
91
3.2.4 3.3
3.3.5
4 Three Phase Shunt Active Filter
93
4.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
4.2
Vector Control based SAF . . . . . . . . . . . . . . . . . . . . . . . . . . . .
94
4.2.1
Principle of Operation . . . . . . . . . . . . . . . . . . . . . . . . . .
94
4.2.1.1
Reactive current compensation . . . . . . . . . . . . . . . .
96
4.2.1.2
Harmonic current compensation . . . . . . . . . . . . . . . .
98
4.2.2
Modeling of Power Circuit . . . . . . . . . . . . . . . . . . . . . . . . 100
4.2.3
Current Reference Generation . . . . . . . . . . . . . . . . . . . . . . 102
4.2.4
Controller design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
4.2.5
4.2.4.1
Current controller . . . . . . . . . . . . . . . . . . . . . . . 104
4.2.4.2
Voltage controller . . . . . . . . . . . . . . . . . . . . . . . . 105
Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
x
Contents
4.3
Scalar control based SAF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 4.3.1
Principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
4.3.2
Modeling of power circuit . . . . . . . . . . . . . . . . . . . . . . . . 114
4.3.3
Controller design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
4.3.4
4.3.3.1
Current controller . . . . . . . . . . . . . . . . . . . . . . . 115
4.3.3.2
Voltage controller . . . . . . . . . . . . . . . . . . . . . . . . 117
Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
4.4
Comparison of Vector and Scalar control techniques . . . . . . . . . . . . . . 124
4.5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
5 Conclusions
125
A TMS320F2407 Based Digital Controller
127
A.1 Features of TMS320LF2407 . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 A.2 TMS320LF2407 Board Components . . . . . . . . . . . . . . . . . . . . . . . 128 A.2.1 External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 A.2.2 Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . 128 A.2.3 Digital-to-Analog Converter . . . . . . . . . . . . . . . . . . . . . . . 128 A.2.4 PWM Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 A.2.5 Clock Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 References
130
List of Tables 1.1
IEC-555 Harmonic current limits for Class A equipments . . . . . . . . . . .
xi
9
List of Figures 0.1
Boost power circuit used in implementing the control techniques . . . . . . .
iv
1.1
AC Source and Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
1.2
Diode Bridge Rectifier circuit . . . . . . . . . . . . . . . . . . . . . . . . . .
5
1.3
Diode bridge rectifier waveforms . . . . . . . . . . . . . . . . . . . . . . . . .
6
1.4
Voltage Source feeding a Nonlinear Load . . . . . . . . . . . . . . . . . . . .
7
1.5
Inductive filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
1.6
Series-Parallel Resonant Filter . . . . . . . . . . . . . . . . . . . . . . . . . .
11
1.7
Classification of Active techniques for PFC . . . . . . . . . . . . . . . . . . .
12
1.8
Average Current Mode Control based UPF rectifier . . . . . . . . . . . . . .
13
1.9
Nonlinear Carrier Control based UPF rectifier . . . . . . . . . . . . . . . . .
14
1.10 Block diagram of Symmetric transformation based three phase boost rectifier
15
1.11 Controller block diagram of Direct Power Control technique . . . . . . . . .
17
1.12 Shunt Active filtering strategies . . . . . . . . . . . . . . . . . . . . . . . . .
19
2.1
Average Current Mode Control - Power and Control Circuit . . . . . . . . .
24
2.2
Resistance emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
2.3
Current reference generation . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
2.4
ON State Equivalent Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . .
27
2.5
OFF State Equivalent Circuit . . . . . . . . . . . . . . . . . . . . . . . . . .
27
2.6
Current Loop model of Average Current Mode controlled UPF rectifier . . .
30
2.7
Voltage Loop model of Average Current Mode controlled UPF rectifier . . .
30
2.8
Bode plot of plant transfer function of Current loop . . . . . . . . . . . . . .
31
2.9
Reference and actual current in Average Current Mode control based UPF rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xii
32
xiii
List of Figures 2.10 Bode plots of plant and forward path transfer function of Current loop . . .
32
2.11 Bode plot of plant transfer function of Voltage loop . . . . . . . . . . . . . .
33
2.12 Bode plots of plant and forward path transfer function of Voltage loop
. . .
34
2.13 Simulation results - Input voltage and current . . . . . . . . . . . . . . . . .
37
2.14 Experimental results - Input Voltage and Current . . . . . . . . . . . . . . .
37
2.15 Line regulation without input voltage feed forward . . . . . . . . . . . . . . .
38
2.16 Line regulation with input voltage feed forward . . . . . . . . . . . . . . . .
39
2.17 Step change of Load from 100 % to 50 % and vice-versa . . . . . . . . . . . .
40
2.18 Power Circuit of Scalar Control based UPF rectifier . . . . . . . . . . . . . .
41
2.19 Block Diagram representation of Scalar control based converter . . . . . . . .
42
2.20 Scalar control based converter : Step change in load . . . . . . . . . . . . . .
43
2.21 Scalar control based converter : waveforms during Step change of load . . . .
44
2.22 Steady state stability analysis . . . . . . . . . . . . . . . . . . . . . . . . . .
46
2.23 Current Modulator representation . . . . . . . . . . . . . . . . . . . . . . . .
48
2.24 Current loop model of modulator in Scalar control based UPF rectifier . . .
49
2.25 Voltage loop model of Scalar control based UPF rectifier . . . . . . . . . . .
49
2.26 Model of the Plant and controller of Scalar control based UPF rectifier . . .
51
2.27 Bode plot of closed loop current transfer function . . . . . . . . . . . . . . .
52
2.28 Dynamic model of the modulator . . . . . . . . . . . . . . . . . . . . . . . .
53
2.29 Bode plot of plant and forward path transfer function of Voltage loop . . . .
54
2.30 Simulation results - Input voltage and current . . . . . . . . . . . . . . . . .
55
2.31 Experimental results - Input voltage and current . . . . . . . . . . . . . . . .
55
2.32 Step change of Load from 100 % to 50 % and vice-versa . . . . . . . . . . . .
56
st
2.33 Current controller bandwidth analysis - 1 operating point . . . . . . . . . .
57
2.34 Current controller bandwidth analysis - 2nd operating point . . . . . . . . . .
59
3.1
Power and Control circuit of Vector control based FEC . . . . . . . . . . . .
63
3.2
Single phase equivalent ciruit of Vector control based FEC . . . . . . . . . .
63
3.3
Phasor diagram under Unity Power Factor . . . . . . . . . . . . . . . . . . .
64
3.4
Phasor diagram under Lagging and leading PF . . . . . . . . . . . . . . . . .
65
3.5
Block diagram representation of Vector control based FEC . . . . . . . . . .
66
3.6
Stationary (α − β) and revolving (d-q) reference frames . . . . . . . . . . . .
68
3.7
q-axis Current loop model of Vector control based FEC . . . . . . . . . . . .
69
xiv
List of Figures
3.8
d-axis Current loop model of Vector control based FEC . . . . . . . . . . . .
69
3.9
Voltage loop model of Vector control based FEC . . . . . . . . . . . . . . . .
70
3.10 Closed loop model of q-axis current controller alongwith plant . . . . . . . .
71
3.11 Bode plot of plant and forward path transfer function of q-axis current loop .
72
3.12 Closed loop model of Voltage controller alongwith plant . . . . . . . . . . . .
73
3.13 Bode plot of plant and forward path transfer function of voltage loop . . . .
73
3.14 Start-up Response of vector control based FEC . . . . . . . . . . . . . . . .
75
3.15 Phase voltage and current under full load condition . . . . . . . . . . . . . .
75
3.16 Step change in load from 50 % to 100 % . . . . . . . . . . . . . . . . . . . .
77
3.17 Step change in d-axis reference current . . . . . . . . . . . . . . . . . . . . .
77
3.18 Decoupling between change in q-axis control and d-axis current . . . . . . . .
78
3.19 Decoupling between change in d-axis control and q-axis current . . . . . . . .
78
3.20 Power and Control circuit of Scalar control based three phase PFC converter
79
3.21 Single phase equivalent circuit of Scalar control based three phase PFC converter 80 3.22 Block diagram representation of Scalar control based three phase PFC converter 82 3.23 Approximation error in Scalar control technique . . . . . . . . . . . . . . . .
83
3.24 Current loop model - Single phase equivalent representation . . . . . . . . .
84
3.25 Voltage loop model of Scalar control based three phase PFC converter . . . .
85
3.26 Closed loop model of Voltage controller alongwith plant . . . . . . . . . . . .
85
3.27 Bode plot of plant and forward path transfer function of Voltage loop . . . .
86
3.28 Simulation results - Input voltage and current under full load . . . . . . . . .
87
3.29 Harmonic spectrum of line current in simulation . . . . . . . . . . . . . . . .
88
3.30 Start-up response of Scalar control based three phase PFC converter . . . . .
88
3.31 Phase voltage and current under full load condition . . . . . . . . . . . . . .
89
3.32 Harmonic spectrum of line current in experimental waveform . . . . . . . . .
89
3.33 Step change of load from 100 % to 50 % and vice-versa . . . . . . . . . . . .
90
4.1
Power circuit Configuration of Three phase Shunt Active Filter . . . . . . . .
94
4.2
Power and control circuit of three phase Vector control based SAF . . . . . .
95
4.3
Single phase equivalent ciruit of three phase SAF . . . . . . . . . . . . . . .
96
4.4
Phasor diagram of single phase equivalent circuit of three phase SAF . . . .
96
4.5
Stationary (α-β) and revolving (d-q) reference frames . . . . . . . . . . . . .
97
4.6
Extraction of fundamental frequency reactive current drawn by the load . . .
97
List of Figures
xv
4.7
Extraction of harmonics in load current . . . . . . . . . . . . . . . . . . . . .
98
4.8
Block diagram representation of Vector control based SAF . . . . . . . . . .
99
4.9
q-axis current loop model of Vector control based SAF . . . . . . . . . . . . 101
4.10 d-axis current loop model of Vector control based SAF . . . . . . . . . . . . 102 4.11 Voltage loop model of Vector control based SAF . . . . . . . . . . . . . . . . 102 4.12 Generation of q-axis current reference . . . . . . . . . . . . . . . . . . . . . . 103 4.13 Generation of d-axis current reference - Harmonic and reactive compensation 103 4.14 Independent Harmonic and reactive current compensation . . . . . . . . . . 104 4.15 Closed loop model of q-axis current controller alongwith plant . . . . . . . . 104 4.16 Closed loop model of Voltage controller alongwith plant . . . . . . . . . . . . 105 4.17 Bode plot of plant and forward path transfer function of voltage loop . . . . 105 4.18 Input voltage and current in R-phase of supply, feeding a diode-bridge rectifier without SAF operational . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 4.19 Harmonic spectrum of line current of supply, feeding a diode bridge rectifier current without filtering by SAF . . . . . . . . . . . . . . . . . . . . . . . . . 107 4.20 Input voltage and current in R-phase of supply, feeding a diode-bridge rectifier with SAF operational . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 4.21 Harmonic spectrum of line current of supply, feeding a diode bridge rectifier current with filtering by SAF . . . . . . . . . . . . . . . . . . . . . . . . . . 108 4.22 Load, Shunt Active Filter and Input current . . . . . . . . . . . . . . . . . . 109 4.23 Reference and actual currents in q- and d-axis of SAF . . . . . . . . . . . . . 109 4.24 Power and control circuit of Scalar control based three phase SAF . . . . . . 111 4.25 Single phase equivalent circuit of Scalar control based three phase SAF . . . 112 4.26 Block diagram representation of scalar control based three phase SAF . . . . 114 4.27 Voltage loop model in Scalar control based three phase SAF . . . . . . . . . 115 4.28 Current modulator representation in Scalar control based three phase SAF . 115 4.29 Current loop model of the modulator in Scalar control based SAF - Single phase representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 4.30 Equivalent circuit of the SAF for harmonic components . . . . . . . . . . . . 117 4.31 Voltage loop model of Scalar control based SAF . . . . . . . . . . . . . . . . 118 4.32 Induction motor voltage and current without SAF operational . . . . . . . . 120 4.33 Induction motor voltage and current with SAF operational . . . . . . . . . . 120 4.34 Motor current, SAF current, Input current and voltage with SAF operational 121
xvi
List of Figures
4.35 Input voltage and current in R- and Y-phase of supply feeding a diode-bridge rectifier without SAF operational . . . . . . . . . . . . . . . . . . . . . . . . 122 4.36 Harmonic spectrum of line current, feeding diode-bridge rectifier without filtering by SAF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 4.37 Input voltage and current in R- and Y-phase of supply, feeding a diode-bridge rectifier with SAF operational . . . . . . . . . . . . . . . . . . . . . . . . . . 123 4.38 Harmonic spectrum of line current, feeding diode-bridge rectifier after filtering by SAF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 A.1 Block diagram of the DSP board . . . . . . . . . . . . . . . . . . . . . . . . 129
Nomenclature Symbol Defnition
Units
vg
Source Voltage per Phase
V
ig
Line current
A
ω
Frequency of fundamental component of source voltage
rad./sec.
ign
nth Harmonic component of current
A
th
Vgn
Peak value of n
harmonic component of voltage
V
Ign
Peak value of nth harmonic component of current
A
vc
DC bus voltage
V
vc,ref
Reference DC bus voltage
V
d
Duty ratio of controlled switch
vm
Output of voltage controller
V
L
Line Inductance
H
Le
Effective Line Inductance
H
Ls
Source Inductance
H
C
DC bus Capacitance
F
R
Load Resistance
Ω
il
Load current
A
ila
Fundamental frequency active component of Load current
A
ilr
Fundamental frequency reactive component of Load current A
ilh
Harmonic frequencies component of Load current
xvii
A
xviii
Nomenclature
Symbol
Defnition
Units
Vm
Output of voltage controller in steady state
V
Vc
DC bus voltage in steady state
V
vref
Modulating reference for triangle comparison
V
ig,ref
Input current reference
A
vˆg
Small signal variation in Source Voltage
V
vˆc ˆig
Small signal variation in DC bus Voltage
V
Small signal variation in Line current
A
dˆ
Small signal variation in Duty ratio
G1 (s)
Plant transfer function of Current loop
A/V
H1 (s)
Plant transfer function of Current controller
Ω
G2 (s)
Plant transfer function of Voltage loop
Ω
H2 (s)
Plant transfer function of Voltage controller
A/V
Pg
Input power
W
Po
Output power
W
Re
Emulated resistance
Ω
Rs
Current sense resistance
Ω
Ts
Switching time-period
sec.
id
DC link current
A
vi
Fundamental component of Pole voltage
V
vgr , vgy , vgb
Three phase input voltages
V
vir , viy , vib
Three phase fundamental component of pole voltages
V
igr , igy , igb
Three phase line currents
A
vtri
Peak of the triangle carrier
V
G
Gain of the Voltage Source Inverter
xix
Nomenclature Symbol Defnition
Units
P
Three phase instantaneous real power
W
Q
Three phase instantaneous reactive power
VAr
Xl
Inductive reactance
Ω
Rl
Resistance of Line Inductance
Ω
vgα , vgβ
α − β components of input voltages
V
α − β components of fundamental component of pole voltages
V
d − q components of Line currents
A
igα , igβ viα , viβ
α − β components of Line currents
A
d − q components of input voltages
V
d − q components of fundamental component of pole voltages
V
Input voltage space phasor
V
ig
Input current space phasor
A
vi
Pole voltage space phasor
V
igq,ref
q-axis current reference of FEC
V
igd,ref
d-axis current reference of FEC
V
viq,ref
q-axis modulating voltage reference of FEC
V
vid,ref
d-axis modulating voltage reference of FEC
V
Ti
Time-constant of current controller
sec.
Ki
PI gain of current controller
Ω
Tv
Time-constant of voltage controller
sec.
Kv
PI gain of voltage controller
A/V
Tl
Time-constant of Line inductance
sec.
vgd , vgq igd , igq vid , viq vg
xx
Nomenclature
Symbol
Defnition
Units
ilr , ily , ilb
Three phase load currents
A
ilα , ilβ
α − β components of Load current
A
ild , ilq
d − q components of Load current
A
ild,harm , ilq,harm
d − q components of harmonics in Load current
A
ii
Current drawn by Shunt Active Filter
A
iid , iiq
d − q components of Shunt Active Filter current A
iiq,ref
q-axis current reference of Shunt Active Filter
A
iid,ref
d-axis current reference of Shunt Active Filter
A
Req
Equivalent Resistance of Losses in VSI
Ω
Chapter 1 Introduction
1.1
AC-DC Conversion
Power electronic converters can be broadly classified as AC-DC, AC-AC, DC-AC and DCDC converters. The focus of the work presented in this thesis is in the AC-DC conversion area. Most AC-DC converter applications desire a constant DC output voltage which will be further used for other purposes. Till very recently the attention of all manufacturers and users of AC-DC converters was on the DC side of the same. In this sense, the most popular AC-DC converter is the rectifier with C filter at lower power levels and the phase-controlled rectifier with LC filter at higher power levels. Currently, the concern in rectifiers include power quality issues relating to the source end as well. The reason for this is the undesirable AC line current harmonics drawn from the utility by the standard rectifiers. The presence of harmonics in the line current results in the distortion of the voltage at the Point of Common Coupling (PCC) due to the presence of source inductance. This may cause malfunction of other loads, power system protection and monitoring devices. Some of the other problems caused by line current harmonics are, overheating of the neutral line, interference with communication and control signals etc.. These are further dealt with in section 1.4. With presence of lower-order harmonics in input current, power factor comes down. Poor power factor of operation implies ineffective use of the volt-ampere rating of the utility equipment. These problems have resulted in the additional concern relating to source current quality. The work presented in this thesis attempts to address these issues. The following section introduces some of the terms that will be used extensively in the thesis. The succeeding sections deal with the problems arising out of the conventional techniques used for AC-DC conversion and also some of the existing techniques for rectifying those problems. The advantages of techniques proposed in this thesis for single and three phase Power Factor 1
2
Chapter 1. Introduction
Correction are explained. The last section gives the organization of the thesis.
1.2
Power, Power Factor and THD ig (t)
Source Load
vg (t)
Figure 1.1: AC Source and Load
Let us consider a periodic voltage source, vg (t) at a frequency, ω supplying a load which is consuming a finite amount of power. Let the current drawn from the source be ig (t). The voltage and the current can be expressed using Fourier series as shown below, vg (t) = Vg0 +
∞ X
Vgn cos(nωt − φn )
(1.1)
∞ X
Ign cos(nωt − θn )
(1.2)
n=1
ig (t) = Ig0 +
n=1
where, n is the harmonic number, φn is the phase of the nth harmonic component of input voltage, vg and θn is the phase of the nth harmonic component of input current, ig . The average power consumed by the load can be found by integrating the instantaneous power over one cycle as shown below 1ZT Pg = vg (t)ig (t)dt T 0
(1.3)
1.2. Power, Power Factor and THD
3
substituting for vg (t) and ig (t) from eqn. 1.1 and eqn. 1.2 respectively in eqn. 1.3 and on further simplification it can be shown that Z
0
T 0
[Vgn cos(nωt − φn )][Igm cos(mωt − θm )] = V I gn gn 2
if n 6= m cos(φn − θn ) if n = m
(1.4)
Therefore the average power transmitted by the source to the load is given by
Pg = Vg0 Ig0 +
∞ X Vgn Ign
n=1
2
cos(φn − θn )
(1.5)
Power is transmitted from the source to the load by the voltage and current components which are at the same frequency. For example, the interaction of 5th harmonic component of voltage and 7th harmonic component of current does not result in net power transfer. A practical implication of this is given below. The electric utility supplies voltage at 110/230V and 50/60 Hz. Magnitude of other harmonic components besides the fundamental in the supply voltage is negligibly small and can be neglected. Let us consider a load connected to the utility, which draws current at the fundamental frequency and other harmonic frequencies (e.g. Diode bridge rectifier). Let the current be phase-shifted from the input voltage. For such a load, based on the expression in eqn. 1.5, the power is transferred only at the fundamental frequency and the harmonic currents only increase the Root Mean Square (rms) current without increasing the amount of power transferred. This leads us to the definition of power factor. The rms value of any periodic waveform is as shown below
Irms
v u ∞ 2 X u Ign 2 = tIg0 + n=1
2
(1.6)
The presence of harmonics in the input current increases the rms value of the current without increasing the amount of power transferred. Higher rms current results in higher I 2 R losses.
4
1.2.1
Chapter 1. Introduction
Power Factor
Power Factor(PF) is a figure of merit that measures how efficiently energy is transmitted between a source and load network. It is defined as, P owerF actor =
AverageP ower (RmsV oltage) ∗ (RmsCurrent)
(1.7)
Power Factor has a value between 0 and 1. Unity Power Factor (UPF) occurs for a load that obeys Ohms law. In such a case, the voltage and current have the same wave-shape, have the same harmonic spectra and are in phase. Let us consider a utility interface which has only fundamental frequency voltage excitation. The average power consumed by a load which is purely resistive in nature would be Pg =
Vg1 Ig1 2
(1.8)
where, Vg1 and Ig1 are the fundamental component of voltage and current respectively. The rms voltage and rms current are both equal to the fundamental component of the voltage and current respectively. The power factor in this case is Unity. For a load which draws harmonics also alongwith the fundamental, the rms current is given by eqn. 1.6. Since harmonic components are absent in the voltage the rms value of the voltage is the same as the fundamental. For this load, the Power Factor is P owerF actor = v u
Ig1 √ 2
2 ∞ X u Ign tI 2 + g0 n=1
cos(φ − θ)
(1.9)
2
When the voltage contains no harmonics, the power factor can be written as the product of two terms. The first term is the Distortion power factor and the second term the Displacement power factor. Distortion power factor accounts for the harmonic components in the current. Displacement power factor accounts for the phase difference between the fundamental voltage and current.
1.2.2
Total Harmonic Distortion
Total Harmonic Distortion (THD) is defined as the ratio of the rms value of the waveform excluding the fundamental component, to the rms fundamental magnitude. When no DC
1.3. Diode Bridge Rectifier
5
component is present, this can be mathematically written as T HD =
qP
∞ 2 n=2 Ign
(1.10)
Ig1
Total Harmonic Distortion gives a direct measure of the amount of harmonic content in the input supply. These are some terminologies which will be used in this thesis.
1.3
Diode Bridge Rectifier
In the conventional design practice, the utility interface of a single phase AC-DC converter is a diode bridge rectifier feeding a bulky capacitor. This circuit is used at low power levels. Figure 1.2 shows such a circuit. The DC voltage generated after rectification is reconverted A D1
D3
Load R
C vg
D4
D2
O Figure 1.2: Diode Bridge Rectifier circuit
to different voltage levels using Switched Mode Power Supplies. The overall arrangement is called an off-line converter. The operation of this circuit is well understood. In the absence of a capacitor, the voltage at the point A will be a rectified sine-wave, that is, rising and falling at twice the fundamental frequency. The capacitor tends to hold the voltage and keeps it from falling during each cycle. Whenever the input voltage becomes greater than
6
Chapter 1. Introduction
Capacitor (1) & Rectified Sine wave (2) Voltages
1 2 Time
Input Current
Time
Figure 1.3: Diode bridge rectifier waveforms
the capacitor voltage, diodes in opposite legs (D1 ,D2 and D3 ,D4 ) get forward biased and current is drawn from the input. This nature of operation of the circuit gives it the name ‘peak charging’ rectifier because current is drawn only when the input voltage is close to its maximum value. A typical set of waveforms is plotted in figure 1.3. There are finite intervals of time when all 4 diodes are reverse biased and there is no current drawn from the input. The capacitor delivers the energy to the load during these intervals. The input current shown in figure 1.3, has high harmonic content which causes problems to other equipments connected to the utility. These are explained in the following sections.
1.4
Problems due to harmonics
One of the problems caused by the presence of harmonics in the line current is the distortion of the input voltage at the PCC due to source inductance. This is explained in figure 1.4. A voltage source, vg with an internal inductance, Ls is shown in figure 1.4. Let us assume that the source supplies power to a non-linear load. Let the fundamental current drawn by the load be ig1 and harmonic currents be ig3 , ig5 ...ign . The points A and B indicate the PCC. Let, vg = Vg1 sin ωt
1.4. Problems due to harmonics
7
A Ls
ig1
vg
ig3
ig5
ign
B Non-Linear Load
vab
To other Loads
Figure 1.4: Voltage Source feeding a Nonlinear Load
ig1 = Ig1 sin(ωt − φ)
ig3 = Ig3 sin(3ωt − 90) ···
ign = Ign sin(nωt − 90)
On applying KVL to the circuit shown in figure 1.4 we get vab = Vg1 sin ωt − [Ig1 (ωLs )] sin(ωt − φ) − [(Ig3 (3ωLs )] sin(3ωt − 90) − · · · − [(Ign (nωLs )] sin(nωt − 90)
(1.11)
In the expression for vab , we find terms like, [(Ign (nωLs )] sin(nωt − 90), which are not at the same frequency of the input voltage, vg . Even though the source voltage has no harmonics, the voltage at the PCC (where other loads are connected) has other frequency components besides the fundamental. The distortion in the PCC voltage is because of the following • Source Inductance • Harmonics in the current
8
Chapter 1. Introduction
Source inductance can never be totally eliminated. If there is harmonic content in the current drawn from the input then the voltage at PCC will be distorted. In the absence of any harmonics the potential vab would not have been distorted because the term (ωLs )Ig1 is at the same frequency as the fundamental. Due to the presence of the harmonics, the potential vab gets distorted which in turn disturbs the other loads. The other problems caused by the presence of harmonics are, • Additional heating and possibly over-voltages in the utility’s transmission and distribution system.
• Errors in metering and malfunctioning of utility relays. • Interference with communication and control signals.
1.5
Agency Standards
Due to the reasons explained in the previous section, it is incumbent on the users of power electronic equipments to reduce the harmonic content in the currents they draw from the electric utility. A number of organizations have adopted standards that limit the magnitude of the harmonic currents that a load is allowed to inject into an AC line. The US military was one of the early organizations to recognize these problems and it set the strict 3% limit. The standards adopted by IEC and IEEE are more recent and are intended for conventional utility systems. The IEC-555 standard covers a number of different types of low power equipment, with differing harmonic limits. There are four categories of equipments, each of which is covered by different standards. • Class A - Balanced three phase equipment, and any equipment that does not fit into other categories.
• Class B - Portable tools and similar devices. • Class C - Lighting equipment including dimmers and gas discharge lamps. • Class D - Equipments having special wave-shape like diode-capacitor peak charging circuits.
1.6. Passive Techniques
9
The table 1.1 gives the standards for odd and even harmonics for class A and certain class C equipments. Table 1.1: IEC-555 Harmonic current limits for Class A equipments
Odd Harmonics
Even Harmonics
Harmonic Number Maximum Current (A) Harmonic Number Maximum Current (A) 3
2.30
2
1.08
5
1.14
4
0.43
7
0.77
6
0.30
9
0.40
0.23(8/n)
11
0.33
8 ≤ n ≤ 40
13
0.21
15 ≤ n ≤ 39
0.15(15/n)
1.6
Passive Techniques
The previous sections described the problems arising out of harmonics in the utility interface. Agency standards to limit harmonic levels in the load were explained. The peak charging circuit, the most widely used for AC-DC conversion, was injecting lower-order harmonics into the utility which were above the levels allowed by the agency standards. Passive techniques modeled around the diode-bridge circuit were proposed for power factor and harmonic correction. The intention in these techniques was to reduce the THD of the input current thereby increasing the power factor of operation. Power factor as high as 0.98 can be achieved using some passive Power Factor Correction (PFC) techniques. Some of the popular passive PFC techniques are discussed below.
1.6.1
Inductive filter
Figure 1.5 shows a peak charging rectifier with an inductor on the load side. The addition of a reactive element to the diode-bridge rectifier leads to line-current harmonics. The presence of the DC bus capacitance for reducing the voltage ripple distorts the input current. The
10
Chapter 1. Introduction
L D1
D3
vg
C
D4
R
D2
Figure 1.5: Inductive filter
presence of the inductor alongwith the DC bus capacitance adds to harmonic content in the line current. The value of the inductance chosen has an impact on the AC line current THD. For lower values of inductance, the input current is discontinuous and pulsating. The power factor achieved in this case is typically between 0.65 and 0.75. The THD of the current is 90%. Better PF can be achieved by using a higher value of inductance and pushing the operation to Continuous Conduction Mode (CCM). Even for infinite inductance, the PF cannot exceed 0.9 for this arrangement [1]. A variation of this filter is to have the inductance in the AC side. Even in this case the power factor and THD improvement is not very significant.
1.6.2
Series-Parallel Resonant Filter
Figure 1.6 shows a Series-Parallel Resonant filter used for PFC application. The series L 1 C1 filter is designed to allow the fundamental frequency component and block the harmonic components. The parallel L2 -C2 filter is designed to act as low impedance path for select harmonic frequencies so that the harmonic components flow through this path rather than the source. Separate L-C branch is added for each harmonic component that needs to be filtered for e.g 5th , 7th , 11th and so on.
1.7. Active techniques
L1
11
C1
D1
D3
L
L2 C
Vg
R C2
D4
D2
Figure 1.6: Series-Parallel Resonant Filter
Passive filters prove to be a good solution for PFC at low power levels. At medium and high power levels, passive solutions suffer from the following disadvantages. • Large size of reactive elements. • Poor PF when compared to active solutions. • Degradation of performance due to aging. • Might not be able to meet agency standards. • Excitation of unwanted resonances in the system. Because of the reasons stated above active solutions are the preferred technique at medium and high power levels.
1.7
Active techniques
The passive techniques described in the previous section rely only on reactive elements for Power Factor Correction. These techniques may not be useful in medium and high power applications where the size of the elements become objectionably large. Some popular active
12
Chapter 1. Introduction
Active Techniques Single Phase Nonlinear Carrier Control
Three Phase Hysteresis Instantaneous Synchronous Ref. Control Power Control Frame Control
Average Current Peak Current Mode Control Mode Control
Sinusoidal PWM Control
Figure 1.7: Classification of Active techniques for PFC
solutions for single and three phase PFC based on power semiconductor devices (MOSFETs, IGBTs etc.) alongwith reactive elements are discussed here. Since the devices are switched at high frequency (tens to hundreds of khz), the sizes of the reactive elements used in the converters tend to be less. Figure 1.7 gives a classification of PFC converters based on the control methodology used. Classification based on the type of topology can also be carried out. Of the contending topologies, boost is preferred because of the following reasons. • Continuous Input current. • Very less Electro Magnetic Interference (EMI) on input current. The work presented in this thesis focuses on active PFC techniques using boost topology. Some of the existing state-of-the-art techniques for single and three phase PFC are explained below. One common characteristic of all these techniques is that in all these methods the boost converter is operating in CCM which is desirable at medium and high power levels.
1.7.1
Single phase PFC Techniques
1.7.1.1
Hysteresis Current Control
In this method, the input current is made to switch within a reference current window called the hysteresis band [2]. The controlled switch is turned ‘ON’ when the inductor current becomes equal to the lower hysteresis limit. It is turned ‘OFF’ when the inductor
1.7. Active techniques
13
current becomes equal to the upper hysteresis limit. The switching frequency of the converter will not be a constant because the slope of the inductor current is different during each instant of the fundamental cycle. Though hysteresis controllers have the advantage of simple implementation they have the disadvantage of variable switching frequency and broadband EMI. 1.7.1.2
Average Current Mode Control
The control structure of the average current mode control based UPF rectifier is shown in figure 1.8. The two control objectives of achieving a constant DC voltage, v c and sinusoidal vc L vg
vg
Rms Detector
C
Gate Drive
R
Gi (s)
xy z2
z
y x
Gv (s)
vc,ref
Figure 1.8: Average Current Mode Control based UPF rectifier
input current, ig in phase with the input voltage, vg are achieved in this method. A low bandwidth outer voltage loop maintains the DC bus voltage constant. The output of the voltage loop controls the magnitude of the current reference for the inner current loop. Feedforward of the rms value of input voltage is done to make output voltage independent of variations in input voltage. The main advantage of average current mode control is that, it is a carrier based control method and is a constant switching frequency technique. This simplifies the filter inductor
14
Chapter 1. Introduction
design. Low THD input current with UPF is obtained in this technique over a wide input voltage range. Many commercial ICs like UC3854 are available to implement this technique [5]. One of the disadvantages of this method is that the input voltage needs to be sensed for generating the current reference. 1.7.1.3
Nonlinear Carrier Control
The NonLinear Carrier (NLC) controller is capable of attaining UPF in boost and other converters operating in CCM [3]. Implementation of the controller is simple with no need of sensing input voltage. The control structure of the NLC controller is similar to an average vc L
vg
Gate Drive
Q S Q R
C
RESET Carrier Gen.
R
CLK Voltage Controller
vc,ref
Figure 1.9: Nonlinear Carrier Control based UPF rectifier
current mode controller. However, The output of the voltage loop is not used to generate a current reference. Instead, a Nonlinear carrier is generated based on analytical calculations. The input current is compared with the carrier and the output of the comparator generates the gate drive for the switch. The control block diagram of the nonlinear carrier controller is shown in figure 1.9. The technique has several advantages like simple control, input voltage sensorless operation etc.. These are some of the existing techniques employed in single phase AC-DC PFC converters.
1.7. Active techniques
15
The technique for single phase PFC proposed in this thesis is called Scalar control. The performance of the proposed method compared with the existing techniques is explained in Chapter 2.
1.7.2
Three phase PFC Techniques
1.7.2.1
Symmetric Transformation Method
vgr vgy vgb
vc,ref vc,f b
Voltage igq,ref Error Amplifier
Q-axis Controller
viq,ref
igq,f b igd,ref
D-axis Controller
vid,ref
Transformation into stationary reference frame and Sine-triangle Modulation cos θ
igr igb
igα 3-phase to 2-phase transformation
igβ
Transformation into synchronous reference frame cos θ
vgr vgy vgb
sin θ
vc igr igy igb
igd,f b
igy
vir viy vib
sin θ
Controller
Plant
Unit vector generation (Phase Locked Loop)
Figure 1.10: Block diagram of Symmetric transformation based three phase boost rectifier
The primary objective of the symmetric transformation method, also called vector control, based three phase PFC converter is to independently control the active and reactive power flow in the converter. The block diagram representation of the symmetric transformation method based three phase boost rectifier is shown in figure 1.10. The three phase R-Y-B input currents, igr , igy and igb which are varying with a phase difference of 120o in time are first transformed into a two-phase α − β system. The three phase currents can now
16
Chapter 1. Introduction
be represented by a single rotating vector with 2 co-ordinates, igα and igβ in the stationary reference frame. Phase Transformation is applied to the rotating vector from the stationary α − β reference frame to a synchronously revolving d-q reference frame. The three phase
R-Y-B currents are DC quantities, igd and igq in the d-q reference frame because relative angular velocity between the vector and the reference frame is zero. If the revolving reference frame is properly aligned, the q-axis current is indicative of real power flow and d-axis current is indicative of the reactive power flow in the system. The voltage controller balances the real power flow between the two sides. The outer voltage loop gives the reference for the real power or the q-axis current controller. For UPF operation, the reference for the reactive power or d-axis current controller should be zero. Desired power factor from leading to lagging can be achieved by suitably adjusting the reference to the d-axis current controller. After the control is done using DC quantities in the revolving reference frame, the outputs of the controllers, viq,ref and vid,ref are converted back into the stationary reference frame. The two-phase voltage output is then converted into a three phase quantity. This three phase reference voltage output can be used to modulate the switches using sine-triangle modulation. Vector control offers many flexibilities. Desired power factor from leading pf to lagging pf can be achieved. Regenerative action is also possible in this method which is desired in drives applications. Some of the disadvantages of this technique are listed below. 1. Phase transformations and Phase Locked Loop (PLL) required for control implementation. 2. Input voltages need to be sensed. 3. Complex control strategy. 1.7.2.2
Direct Power Control
In a three phase system, though the phase currents and voltages vary at the line frequency, the instantaneous real power delivered is constant. Instead of controlling three line currents and controlling the power flow as in vector control based AC-DC converter, we can directly control the real and reactive power flow because they are DC quantities. Direct Power Control is based on this idea. The real and reactive power are computed by scalar and
1.7. Active techniques
17
vector product respectively as shown below "
#
digr digy digb P =L igr + igy + igb + Vc (igr Sr + igy Sy + igb Sb ) dt dt dt Q=
√
#
"
digb digr 3L igb − igr + Vc [(igy − igb )Sr + (igb − igr )Sy + (igr − igy )Sb ] dt dt
(1.12) (1.13)
The sector information is obtained by estimation of the input voltage vector. The real
Hysterisis Controller Voltage Pref Error Amplifier
vc,ref
viq,ref
Table P
vc,f b
Switching
Hysterisis Controller
Sr
Sy
Sb
To Power Converter
vid,ref
Qref
Q
igr igy igb
Sector Selection
igα Power and Line Voltage Estimator
3-phase to 2-phase transformation igβ
Figure 1.11: Controller block diagram of Direct Power Control technique
and reactive power control loops are hysteresis controllers which give ‘ON/OFF’ type of information. The switching table generates the states of the converter and switches the devices accordingly. The advantages of the Direct Power Control algorithm are 1. Simple control algorithm. 2. Input voltage sensorless control law. 3. No need of Coordinate transformations. 4. Offers fast dynamics.
18
Chapter 1. Introduction
The disadvantages of this algorithm are 1. The sampling frequency for the analog signals needs to be pretty high for accurate computation of the active and reactive power. This demands very high speed ADCs and digital controller. 2. The switching frequency is not constant Vector control and Direct Power Control are existing techniques employed in three phase AC-DC PFC converters. The technique proposed in this thesis for three phase PFC is called Scalar control. The comparative study of the proposed technique with the existing methods is done in Chapter 3.
1.7.3
Three phase Shunt Active Filter
Single and Three phase PFC techniques were introduced in the two previous sections. In applications where a number of non-linear and reactive loads are connected to a single source, it is not economical to place a PFC converter before each load. In such cases, an active filter can be placed very close to the AC source to compensate for all the loads. The active filter supplies the harmonic and reactive currents demanded by all the loads so that the current drawn from the AC voltage source is sinusoidal and in phase with the voltage. A Shunt Active Filter (SAF) is a Voltage/Current Source Inverter placed in parallel to the AC source. Depending upon the control methodology applied, the SAF can be made to supply only the harmonic current demand or both harmonic and reactive current demands of the load network. This is shown in the figure 1.12. In the figure, let, i la be the fundamental active component of load current, ilr be the fundamental reactive component of load current and ilh be the harmonic frequency components in the load current. If the SAF needs to supply only the harmonic currents drawn by the non-linear load, then the rating of the filter can be low. In the other case, the rating of the filter needs to be higher. The three main functions of the SAF are, 1. Extraction of the harmonic components and generation of current references. 2. High bandwidth current control. 3. Control of the DC bus voltage of the Voltage Source Inverter.
1.8. Contributions of the thesis
ila +ilr
-ilh
Input Source
Shunt Active Filter
19
-ilh -ilr
ilr +ilh ila +ila NonLinear & Reactive load
Input Source
Harmonic current compensation
Shunt Active Filter
ilr +ilh +ila NonLinear & Reactive load
Harmonic and reactive current compensation
Figure 1.12: Shunt Active filtering strategies
Though the last two functions of the SAF are not trivial, the function that sets apart a particular control technique is the technique used for the harmonic extraction in the load current. The synchronous reference frame method based SAF gives a very good performance in this regard [4]. The fundamental component of the active current demanded by the load appears as a DC quantity in q-axis of the synchronously revolving reference frame. The fundamental component reactive current drawn by the load appears as a DC quantity in the d-axis. The harmonic components of the load current appear as high frequency ripples in both axes. Reactive and harmonic compensation can thus be treated independently by using Low and High Pass Filters respectively, to filter the q- and d-axis currents. The drawbacks of the technique based on the synchronous reference frame based approach are the need for sensing a number of signals and the complex control mechanism.
1.8
Contributions of the thesis
The above given techniques are some of the state-of-the-art techniques in single and three phase boost derived PFC circuits. The focus of the work presented in this thesis is to develop novel control techniques for single and three phase PFC. The desired features of an active PFC technique are • Close to Unity Power Factor operation.
20
Chapter 1. Introduction
• Less than 10 % Total Harmonic Distortion in line current. • Reduced number of feedback signals for controller implementation. • Simple control methodology. The control techniques for single and three phase power factor correction proposed in this thesis aim at meeting these objectives. The first technique proposed is called Scalar Control for single phase UPF Rectifier. The advantages attributed to this method are • Simple control algorithm. • Input voltage sensorless. • Constant switching frequency carrier based control technique. Sub-harmonic instability is observed in scalar control based converters. This problem is observed during light load conditions. By appropriate choice of system parameters like inductance and switching frequency of the converter, the occurrence this problem can be minimized. These are explained in Chapter 2. The second technique proposed is for three phase AC-DC PFC rectifiers. Scalar control, which was proposed for single phase PFC converters is extendible to three phase. When compared with existing method based on the synchronous reference frame theory, scalar control offers the following advantages. • No need of PLL and transformation to revolving reference frame. • Input voltage sensorless operation and reduced number of feedback signals. • Control is simple and easy to implement. Bi-directional power flow capability and operation at leading and lagging power factor are the attractive features present in vector control based FEC. The analysis of these features in Scalar control based converters was beyond the scope of the work presented in this thesis. These are explained in detail in Chapter 3. The last technique proposed in this thesis is for three phase Shunt Active Filters. The same controller used for three phase AC-DC converter is used here. This method is compared with vector control of the SAF. The advantages attributed to scalar control over vector control for the AC-DC rectifier are applicable here.
1.9. Organization of the thesis
1.9
21
Organization of the thesis
The thesis is organized as follows. Chapter 1 gives a brief introduction about different passive and active power factor correction techniques. The context of the present work is indicated. Chapter 2 discusses about single phase PFC techniques. The average current mode control based converter is taken up first. The steady state analysis and the small signal model of the converter is derived. Controller design based on the small signal model developed is explained. Simulation and experimental results are presented to validate the analysis. Scalar control based converter is taken up next. The control law of the modulator is derived using inductor volt-second balance and resistance emulation behavior. Steady state stability criterion is derived for this converter. Controller design is then explained in detail. Simulation and experimental results are presented for this method. Comparison between the two techniques is presented. Chapter 3 presents three phase PFC techniques which were implemented. Vector control based Front End Converter (FEC) is the first control method discussed. The modeling of the power circuit and the controller design are explained in detail. Experimental results are presented to validate the analysis. Scalar control based three phase PFC converter is then presented. The power circuit model of three phase scalar control is derived. The difference between scalar control and vector control is explained. Simulation and experimental results are presented to validate the analysis. Comparison of the two techniques is done. In Chapter 4, control techniques for three phase SAF are discussed. The first control method implemented is based on vector control. The differences in the controller for the SAF when compared with the FEC are explained. Experimental waveforms are shown to validate the control technique. The second technique that is proposed for three phase SAF is based on scalar control. The modulation law and the experimental set-up for the filter is explained. Experimental waveforms for harmonic and reactive compensation are presented. Chapter 5 gives conclusions from the work and summarizes the contents of the thesis.
22
Chapter 1. Introduction
Chapter 2 Single phase Power Factor Correction Techniques 2.1
Introduction
Single phase power factor correction techniques are discussed in this chapter. A boost power converter based on the full-bridge topology is used for implementing the control techniques described. Average current mode control is the existing state-of-the-art PFC technique that is implemented. The steady state operation of the converter using this control is explained in detail. Small signal analysis is carried out to derive the control transfer functions. Controller design based on the small signal model is also described. Simulation and experimental results are presented to validate the control technique. Scalar control based PFC is the technique that is proposed in this thesis. The control structure for implementing this technique is described in detail. When compared with the previous method, this technique offers the following advantages • Input Voltage sensorless operation. • No need of multiplier in the control loop. Steady state stability criterion is derived for this method. Current loop model is derived from the modulator control law. Simulation and experimental results are presented to validate the proposed technique. Texas Instruments Digital Signal Processor (DSP) TMS320L2407A is used for implementing both control techniques. 23
24
2.2 2.2.1
Chapter 2. Single phase Power Factor Correction Techniques
Average Current Mode Control Steady State Analysis
The power and control circuit used in implementing the average current mode control is shown in figure 2.1. Instead of using the full-bridge configuration as shown here, it is possible to use a diode bridge front-end followed by an active switch [5]. The reason for using this configuration is that the same circuit is used in implementing the other control techniques proposed in this thesis. The circuit is a boost converter. Switches S3 and S4 are turned ON with a duty ratio d(t) and switches S1 and S2 are turned ON with a duty ratio of d(t). The vc S1
D1 S3
d
L
D3
d C
vg (t)
d(t)
d(t)
D4 S2
S4
ig,f b (t)
vref Controller
vg (t)
D2
d
d
Gate Drive
R
Current Controller Rms Detector
ig,ref (t) z
xy z2 x
y
vm
Voltage Controller
vc,f b
vc,ref
Figure 2.1: Average Current Mode Control - Power and Control Circuit
2.2. Average Current Mode Control
25
capacitor voltage, vc is greater than the peak of the AC input voltage, vg (t). The controller has an outer voltage loop and an inner current loop. The outer voltage loop maintains v c constant and controls the amplitude of the current reference. The current loop tracks the sinusoidal current reference, ig,ref (t) and generates the gate drive for the switches. The first control objective of any PFC converter is to obtain sinusoidal input current, ig (t)
ig (t)
vc vg (t)
C
L
R
vg (t)
Re
Figure 2.2: Resistance emulation ig (t) in phase with the input voltage. This is achieved in this converter by emulating a resistance. If the input current, ig (t), is made proportional to the input voltage, vg (t), then UPF is achieved. This is shown pictorially in figure 2.2. The second control objective of the converter is to maintain constant DC bus voltage. The two control objectives, sinusoidal input current in phase with input voltage and constant ig,ref (t) vg (t) vm
1 vg2
Voltage Controller
Feed-forward Voltage compensation Figure 2.3: Current reference generation DC bus voltage are met by having two control loops. The outer loop controls the DC bus voltage. The inner loop controls the input current and makes it sinusoidal. The reference for the voltage loop is fixed externally. The reference for the current loop is generated by sensing the input voltage and multiplying it with the output of the voltage controller. The voltage controller has a low bandwidth because attempts to make this controller faster will tend to distort the input current [6]. The output of the voltage controller controls the amplitude of
26
Chapter 2. Single phase Power Factor Correction Techniques
the sinusoidal current reference. This is explained below. From the model shown in figure 2.2 and by power invariance, we can say that vg2 v2 = c Re R
(2.1)
The voltage loop makes sure that the DC voltage, vc remains constant irrespective of changes in the load. Input voltage, vg also remains constant. Whenever the load R changes, the emulated resistance Re changes. The output of the voltage controller, vm is inversely proportional to Re . When the load changes, vm changes accordingly and controls the magnitude of the input current. The structure of the controller is shown in figure 2.1. The output of the voltage controller, vm , is multiplied with the sensed input voltage signal, vg (t), to generate the current reference, ig,ref (t). The current reference has the shape of the input voltage and an average amplitude which controls the output voltage. A high bandwidth current controller is used to track this current reference. The output of the current controller, vref , is compared with a high frequency triangular carrier whose peak is vtri , to generate the gate drive for the switches at the desired duty ratio. In the generation of the current reference, feed-forward of the square of the input rms voltage can be done to make the voltage loop respond faster. This is shown in figure 2.3. The following feedback signals are needed for implementing the control. 1. Output DC Voltage. 2. Input inductor current. 3. Input AC voltage. A multiplier is needed in the control circuit to generate the current reference. These are the requirements of the controller from a steady state point of view.
2.2.2
Small Signal Analysis
The small signal analysis of the boost converter is carried out using switch averaging technique introduced in [7]. The ON state and OFF state equivalent circuits of the converter, during a particular instant in the positive half cycle of the input voltage is shown in figure 2.4 and figure 2.5 respectively. The ON state dynamic equations are as shown below
2.2. Average Current Mode Control
27
L ig vg
C
vc
R
Figure 2.4: ON State Equivalent Circuit
dig vg + v c = dt L
(2.2)
dvc ig vc =− − dt C RC
(2.3)
The OFF state dynamic equations are as shown below L ig vg
C
vc
R
Figure 2.5: OFF State Equivalent Circuit dig vg − v c = dt L
(2.4)
dvc ig vc = − dt C RC
(2.5)
An observation is made from the small signal model given in equations 2.2 to 2.5. The terms vg and ig are AC terms varying at the line frequency of 50 hz. In the analysis carried out in this section, the emphasis is not on this large signal variation at 50 hz but on the small signal variation of these signals around the operating point. The steady state operating point is fixed based on the rms values of vg and ig . In order to perform small signal analysis, the switching action is averaged. If A1, A2 and
28
Chapter 2. Single phase Power Factor Correction Techniques
b1, b2 are the characteristic equation matrix and the input voltage matrix respectively, then we can average the switching action by using the relation given below [8] A = A1 D + A2 (1 − D)
(2.6)
b = b1 D + b2 (1 − D)
(2.7)
where, D is the duty ratio at the operating point. Substituting A1 from eqn. 2.2, eqn. 2.3 and A2 from eqn.2.4, eqn. 2.5 respectively, in eqn. 2.6, we get the averaged characteristic equation matrix, A. Substituting for b1 and b2 from the corresponding equations, we get the average input voltage matrix, b. These are shown below
0 A = 1 − 2D C
2D − 1 L 1 − RC
(2.8)
1 b= L 0
(2.9)
x˙ = Ax + bvg
(2.10)
The expressions in eqn. 2.8 and eqn. 2.9 are in matrix form. This can be written as shown below
where, x˙ is the state variable derivative matrix, x is the state variable matrix and v g is input voltage. We introduce a small perturbation in the input and state variables of the system to do the small signal modeling of the system. The system equations after this is done is given by,
d (I + ˆi ) g 0 dt g = ˆ d 1 − 2(D + d) dt (Vc + vˆc ) C
ˆ −1 2(D + d) Vg + vˆg Ig + ˆig L + L V + v ˆ 1 0 c c − RC
(2.11)
The expression in eqn. 2.11 contains DC values of the state variables, input voltage and duty ratio (Ig , Vc , Vg and D) at the operating point and small signal variations of these values ˆ On simplifying eqn. 2.11, we can separate the around the operating point (ˆig , vˆc , vˆg and d). DC terms, the first order terms and the second order terms [8]. Since we are interested in small signal model, we consider only the first order terms and neglect the other terms. Eqn
2.2. Average Current Mode Control
29
. 2.11, considering only the first order terms is shown below, ˆ˙ x A z }| ˆ d ig (2D − 1) dt 0 L = (1 − 2D) 1 dˆ vc C RC dt
z }| {
xˆ z { z }| { ˆ ig + vˆc
f b z }| 2Vc 1 L L vˆg + −2I g 0 C
}| {
{
dˆ
(2.12)
ˆi (s) vˆ (s) The small signal control transfer functions, ˆg and ˆc can be found using the following d(s) d(s) relationship [8] xˆ(s) = (sI − A)−1 f (2.13) ˆ d(s) where, A and f are as shown in eqn. 2.12. On solving eqn. 2.13, the control transfer functions are obtained as shown below
ˆig (s) 4Vc = 2 ˆ R(1 − 2D) d(s)
RC +1 2 L e s 2 Le C + s + 1 R
s
Le vˆc (s) 2Vc R = Le ˆ (1 − 2D) 2 d(s) s Le C + s + 1 R
1−s
(2.14)
(2.15)
L is the effective inductance. The expressions given in equations 2.14 (1 − 2D)2 and 2.15 are small signal current and voltage transfer functions. These equations are used where, Le =
in modeling the current and voltage loops. 2.2.2.1
Current Loop
Eqn. 2.14 is the small signal control transfer function. The characteristic equation has a double pole at its natural frequency, q 1 . The damping coefficient is a function of the Le C load resistance, R. For the range of loads being considered, the system is under damped. 2 . There is a zero at RC The current loop can be represented as shown in figure 2.6. The output of the current controller, H1 (s) generates the voltage reference, vˆref for comparison with the triangular carrier. The design of H1 (s) is dealt with in the next section.
30
Chapter 2. Single phase Power Factor Correction Techniques
G1 (s) ˆig,ref
ˆig,err
H1 (s)
dˆ
vˆref
?
ˆig,f b
ˆig
ˆig dˆ
1 vtri
Plant
Controller
Figure 2.6: Current Loop model of Average Current Mode controlled UPF rectifier
2.2.2.2
Voltage Loop
In the voltage loop model, the current loop is assumed to be a unity gain block. The plant transfer function of the voltage loop, G2 (s) is obtained by dividing eqn. 2.15 by eqn. 2.14.
Le vˆc (s) R G2 (s) = = R(1 − 2D) ˆig (s) sRC + 1 1−s
(2.16)
The equation given above is the small signal transfer function of the capacitor voltage, vˆc to the inductor current, ˆig . This transfer function is used in the design of the voltage controller. The voltage loop is represented in figure 2.7.
vˆc,ref vˆc,f b
vˆc,err
H2 (s)
?
ˆig,ref
ˆig 1
Controller
G2 (s) vˆc ˆig
vˆc
Plant
Figure 2.7: Voltage Loop model of Average Current Mode controlled UPF rectifier
2.2. Average Current Mode Control
Controller Design
2.2.3.1
Current Controller
Gain, dB
2.2.3
31
G1 (s)
2 RC
Le C
log ω
Phase
45o
p1
−90o
Figure 2.8: Bode plot of plant transfer function of Current loop In figure 2.6, G1 (s) represents the current loop plant transfer function. The motive of this section is to describe the design of the current controller, H1 (s). The bode plot of G1 (s) is shown in figure 2.8. The current reference for average current mode control, i g,ref (t) is not DC but AC quantity varying at 50 Hz as shown in figure 2.9. It is desired that inductor current, ig (t) track the reference, ig,ref (t) as closely as possible with zero steady state error. The closed loop bandwidth of the current loop should be at least an order greater than the frequency of the reference signal to track it. For the 50 hz reference signal ig,ref (t), a current controller bandwidth of 1 khz is sufficient. From the control point of view, the following features are desired in the controller. • Closed loop system stability. • Zero steady state error. • High bandwidth. Before the design of the controller, the plant transfer function, G1 (s) is analyzed. The bode plot of the plant transfer function is shown in figure 2.8. This function has a low frequency
32
Chapter 2. Single phase Power Factor Correction Techniques
ig,ref (t) ig (t)
20 msec Figure 2.9: Reference and actual current in Average Current Mode control based UPF rectifier
2 and a double pole at its natural frequency, q 1 . The high frequency behavior zero at RC Le C of this transfer function is a -20 dB/decade roll-off. The low frequency behavior of this
Gain, dB
function is a gain. A Proportional Integral (PI) controller can be used as the controller. The zero of the PI controller is placed at the natural frequency, q 1 of the plant transfer Le C
G1 (s)H1 (s) G1 (s)
Phase
2 RC
45o
p1
Le C
log ω
−90o
Figure 2.10: Bode plots of plant and forward path transfer function of Current loop
2.2. Average Current Mode Control
33
function to cancel one of the double poles. Since the plant transfer function already has a -20 dB/decade roll-off characteristic, the closed loop system will be stable. The steady state error is zero because of the integral action in the PI controller. The bandwidth of the controller can be adjusted by changing the gain of the PI controller. All the desired requirements of the control are met by the PI controller. The bode plot of the plant and forward path transfer function of the current loop is shown in figure 2.10. In the UC3854 implementation [5], a lead-lag compensator is used in the current loop. The high frequency behavior of this controller has a -40 dB/decade roll-off in its magnitude plot. This provides more attenuation to high frequency than a -20 dB/decade roll-off. This completes the design of the current controller. 2.2.3.2
Voltage Controller
In the design of the voltage loop, the inner current loop is assumed to be a unity gain block as shown in figure 2.7.
Phase
Gain, dB
The voltage loop plant transfer function, G2 (s) given in eqn. 2.16, has a low frequency pole
G2 (s) 1 RC
0o
log ω
log ω
-90o
Figure 2.11: Bode plot of plant transfer function of Voltage loop h
i
·
¸
1 and a high frequency zero at R . Since the voltage loop cannot be faster than at RC Le the line frequency of 50 Hz [6], we can neglect the effect of the zero which is at a higher frequency. After applying this design constraint, the small signal model of the plant reduces to a current feeding an RC network. The bode plot of the plant is seen in figure 2.11.
34
Chapter 2. Single phase Power Factor Correction Techniques
A PI will be a suitable controller for this plant. The parameters of the controller should address the following needs of the voltage loop. 1. Zero of the PI controller should be placed at the pole of the plant transfer function to have a -20 dB/decade roll-off. 2. The bandwidth of the voltage loop should be less than the second harmonic of the line frequency. The second condition is imposed to reduce the distortion of the current reference [6]. This condition makes the voltage loop have slow dynamics. Figure. 2.12 shows the bode plot of
Gain, dB
the voltage loop after compensation. This completes the design of the voltage controller.
G2 (s) G2 (s)H2 (s)
Phase
1 RC
0o
log ω
log ω
-90o
Figure 2.12: Bode plots of plant and forward path transfer function of Voltage loop
2.2.3.3
Feed-forward Controller
The reference current for the current loop is generated by sensing the input voltage and multiplying this signal with the output of the voltage controller. The input voltage is allowed to vary over a wide range but the output voltage is regulated by the voltage loop. Whenever there is a change in the input voltage, the output voltage also changes instantaneously. The output voltage controller corrects the instantaneous error and maintains the output voltage a constant. The information about the change in the input voltage has to travel through the plant and the voltage loop. The error correction will be
2.2. Average Current Mode Control
35
slow because the voltage loop has slow dynamics. If we correct the input voltage dependency in the controller without it having to correct through the plant, the line regulation of the converter will be better. This is achieved by the feed forward of the input voltage as explained below. The current reference, ig,ref is given as, ig,ref = vm Gi Vg
(2.17)
where, Vg is the signal corresponding to the rms of input voltage, Gi is the gain of the ig,ref generator and vm is the output of the voltage controller. The closed loop transfer function of the current loop is given as, G1 (s)H1 (s) ig (s) = F (s) = ig,ref (s) 1 + G1 (s)H1 (s)
(2.18)
where, G1 (s) is the plant transfer function of the current loop and H1 (s) is the transfer function of the current controller. Substituting ig,ref in eqn. 2.18 from eqn. 2.17 we have ig = F v m G i V g
(2.19)
Let Pg be the power input from the supply. Then we can say that, Pg = Vg ig = F vm GVg2
(2.20)
The power output, that is, the power delivered to the DC bus capacitor is Po = vc Ic = vc [sCVripple ]
(2.21)
where, Vripple is the 2nd harmonic ripple voltage and vc is the voltage across the capacitor. By power invariance we have, Pg = P o
(2.22)
On equating eqn. 2.20 and eqn. 2.21 we have vc (s) F (s)Gi 2 = V vm (s) sCVripple g
(2.23)
The term on the LHS is the voltage loop plant transfer function. We see a term, V g2 present in the RHS. This dependency of output voltage on the variation of input voltage can be eliminated by dividing the reference current by the square of the rms of the input voltage. This is done by the feed forward block which gives a voltage proportional to the square of rms value of the input voltage. This is shown pictorially in figure 2.3.
36
Chapter 2. Single phase Power Factor Correction Techniques
2.2.4
Hardware Implementation
An experimental set-up was made to validate the average current mode control for single phase Power Factor Correction. IGBT based Intelligent Power Module (IPM) was the device used in the power converter. The rating of the converter is given below 1. Input voltage - 90-230 V (rms) 2. Output Voltage - 400 V 3. Output Power - 800 W 4. Switching frequency - 9.8 khz 5. Line inductance - 15 mH 6. DC bus capacitance - 1650 uF The controller was developed using a Texas Instruments TMS320LF2407A DSP. The analog signals used for implementing the control are, input voltage, inductor current and the DC bus voltage. Since the first two signals are bi-polar, the sensed signals are scaled and shifted before being read by Analog to Digital Converter (ADC) of the DSP. The scaling of the signals are based on the per-unitisation (p.u)as given below • Voltage scaling - 1 p.u = 500 V • Current scaling - 1 p.u = 12.5 A
2.2.5
Simulation and Experimental results
Matlab-Simulink was used to simulate the system. The waveforms shown in figure 2.13(a) shows the input voltage and current delivering rated load of 800 W. The input voltage is 230 V. It is observed that the THD of the line current is 2.3 % as shown in figure 2.13(b). The power factor is 0.99.
2.2. Average Current Mode Control
400
37
100
200
6
0
0 (2)
-200
Current (A)
Voltage (V)
(1)
-6
Harmonic Currents as percentage of fundamental (%)
12
90 THD = 2.3 %
80 70 60 50 40 30 20 10
-12
-400 0.40
0.42
0.46
100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
0.48
Time(sec)
(a) Input Voltage (1) and Current (2)
(b) Harmonic spectra of Line current
Figure 2.13: Simulation results - Input voltage and current Harmonic Currents as percentage of fundamental (%)
100 90 80 70
THD = 2.5 %
60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
(a) Ch. 1 : Input Voltage, scale:200V/Div.
(b) Harmonic spectra of Line current. Lower order
Ch. 2 : Input Current, scale:5A/Div.
harmonics are very less and THD is less than 5 %
Ch. 1 shows the input voltage and Ch. 2 shows the input current. The two waveforms are in phase and the power factor is unity.
Figure 2.14: Experimental results - Input Voltage and Current
Waveforms obtained from the DSP based experimental set-up are shown in figure 2.14. The input voltage and current while delivering rated load of 800 W is shown in Channel 1 (Ch. 1) and Channel 2 (Ch. 2) respectively in figure 2.14(a). The input voltage in this case is 230 V. The THD of the current is 2.5 % as shown in figure 2.14(b). The power factor is
38
Chapter 2. Single phase Power Factor Correction Techniques
0.99.
Ch. 1 : Output voltage, scale:200V/Div., Ch. 2 : Voltage controller output, scale:2V/Div., Ch. 3 : Input voltage, scale:500V/Div. Ch. 4 : Input current, scale:10A/Div. Ch. 3 shows gradual change in the line voltage from 150V to 200V. Feed-forward of input voltage is not done. The output of the voltage controller in Ch. 2 changes to correct the voltage error. The output voltage in Ch. 1 takes some time to settle in the reference value. Figure 2.15: Line regulation without input voltage feed forward
The waveforms in figure 2.15 show the output voltage regulation and change in inductor current when there is an increase in the input voltage. In this case, there is no feed-forward of the input voltage to the current controller. The output of the voltage controller, v m balances the input and output power. When input voltage in Channel 3 (Ch. 3) increases, the output of the voltage controller decreases as seen in channel 2 (Ch. 2) in figure 2.15. This reduces the amplitude of the current reference and the actual current. This is seen in channel 4 (Ch. 4) in the figure. The output voltage takes some time to settle at its reference value. This is seen in channel 1 (Ch. 1). The waveforms in figure 2.16 shows a similar case but with input voltage feed-forward to the current controller. Compared with the previous case, it is seen that the output voltage in Channel 1 (Ch. 1) does not vary when the input voltage in Channel 3 (Ch. 3) is changed. The input voltage feed-forward instantaneously corrects the change in the input voltage. The
2.2. Average Current Mode Control
39
Ch. 1 : Output Voltage, scale:200V/Div., Ch. 2 : Voltage controller output, scale:2V/Div., Ch. 3 : Input voltage, scale:500V/Div., Ch. 4 : Input current, scale:10A/Div. Ch. 3 shows gradual change in the line voltage. Feed forward of the input voltage is done here which controls the current reference. Output of voltage controller in Ch. 2 remains constant because power delivered is a constant. The output voltage remains unchanged in this case even during change of input voltage as seen in Ch. 1. Figure 2.16: Line regulation with input voltage feed forward
current reference is directly controlled instead of correction through the plant. The input voltage feed-forward makes the voltage loop independent of variations in the input voltage. The output of the voltage controller controls the power handled by the converter. When the input voltage is varied as seen in Channel 3 (Ch.3) of figure 2.16, the input current seen in Channel 4 (Ch. 4) changes accordingly to maintain power balance. Since the power handled does not change, the output of the voltage controller remains unchanged. This is observed in Channel 2 (Ch. 2) of figure 2.16 The response of the converter for a step change in load from 100 % to 50 % and vice versa is shown in figure 2.17. The step change in load current is shown in Channel 1 (Ch. 1). The output of the voltage controller in Channel 2 (Ch. 2), becomes half when the first step change in load from 100 % to 50 % occurs. It doubles when the load changes from 50 % to 100 %. This shows that the output of the voltage controller controls the power flow in the system. The actual current in Channel 4 (Ch. 4) tracks the current reference in Channel 3
40
Chapter 2. Single phase Power Factor Correction Techniques
Ch.1 : Load Current, scale:1A/Div., Ch.2 : Output Voltage, scale:200V/Div., Ch.3 : Current reference, scale:10A/Div., Ch.4 : Input current, scale:10A/Div. Ch. 1 shows step changes in the load current from 2 A to 1 A and vice-versa. Ch. 2 shows the output of the voltage controller which controls the output power. Ch. 3 and Ch. 4 show the current reference and the actual current respectively. Figure 2.17: Step change of Load from 100 % to 50 % and vice-versa
(Ch. 3) accurately as seen in the figure.
2.3. Scalar Control
2.3
41
Scalar Control
Scalar control based single phase PFC is the technique proposed in this thesis. The following sections explain steady state analysis, small signal modeling, derivation of the current loop model and controller design of the scalar control based converter. The last section presents simulation and experimental results to validate the proposed technique.
2.3.1
Steady State analysis vc
S1
D1 S3
D3
L vg (t)
C
ig (t)
S4
D4 S2
R
D2
Figure 2.18: Power Circuit of Scalar Control based UPF rectifier
The power circuit configuration used in implementing scalar control for power factor correction is shown in figure 2.18. The circuit is a boost converter and the inductor is the boost inductor. The full-bridge configuration is used here. Though 4 active switches are used, only one duty ratio command needs to be generated. This command, d(t) is given to the top and bottom switches of the two legs, namely S3 and S4 . The complimentary signal, d(t) is given to the other two switches, S1 and S2 with a finite dead-time. The control objective of the scalar control based converter is two-fold, similar to the average current mode control. The first control objective of sinusoidal input current, i g (t) is achieved by using a current modulator. The second control objective of maintaining constant DC bus voltage, vc is achieved with an outer voltage loop.
42
Chapter 2. Single phase Power Factor Correction Techniques
The overall control structure of the converter is shown in figure 2.19. The control has an outer voltage loop and an inner current modulator. Unlike average current mode control, there is no current loop present explicitly. The current modulator does the function of maintaining sinusoidal input current in phase with the voltage. The output of the voltage controller, v m controls the depth of the modulation. The modulation technique is based on the concept of resistance emulation. The control law of the modulator and the relationship between the voltage controller output and the current modulator is described in the next section. vc L vg (t)
C
R
d(t)
ig (t)
PWM
vm
Modulator
vc,f b PI Controller
vc,ref
Figure 2.19: Block Diagram representation of Scalar control based converter 2.3.1.1
Current Modulator
The voltage conversion relationship and the modulation law is derived in this section. The details about the controller are discussed after deriving the duty ratio control law. The power circuit shown in figure 2.18 is a boost converter. On applying Volt-second balance on the line inductance, we get the voltage conversion relationship between the input AC voltage, vg (t) and the DC bus voltage, vc . vg (t) = vc [1 − 2d(t)]
(2.24)
where, d(t) is the duty ratio of the switch. In eqn. 2.24, it is noted that terms v g (t) and d(t) are sinusoidally varying at line frequency 50 hz. The first control objective of the converter is sinusoidal input current, ig (t) in phase with vg (t). We desire a resistance emulation behavior in the input side as explained in figure 2.2. The current control desires that v g (t) and ig (t)
2.3. Scalar Control
43
be related as shown below. vg (t) = ig (t)Re
(2.25)
where, Re is the emulated resistance. From equations eqn. 2.24 and eqn. 2.25 we get the duty ratio control law as,
"
ig (t)Re 1 1− d(t) = 2 vc
#
(2.26)
The expression given above is the duty ratio control law that is implemented by the modulator. By sensing the two quantities, ig (t), vc and by controlling the active switches as per the control law given in eqn. 2.26, it is possible to achieve UPF on the line side. Considering the duty ratio expression given in eqn. 2.26, the terms ig (t) and vc are feedback signals. But, the term Re cannot be directly determined. Eqn. 2.26 needs to be modified to evaluate the duty ratio, d(t) in terms of known parameters. The following analysis shows that the output of the voltage controller, vm gives an indirect measure of the emulated resistance, Re . 2.3.1.2
Voltage controller
vc
vg (t)
R1
R2
d(t) PWM
vm
Voltage Controller
vc,f b vc,ref
Figure 2.20: Scalar control based converter : Step change in load
Figure 2.20 shows the scalar control based single phase PFC converter feeding a load R1 . Let the emulated resistance of the converter while delivering this load be, Re1 . Consider a
44
Chapter 2. Single phase Power Factor Correction Techniques
step change of load from R1 to R1 ||R2 . Let the emulated resistance of the converter while
delivering the load R1 ||R2 be, Re2 . The input voltage, vg remains constant during this step change of load. From eqn. 2.25, we can say that
(R1 ||R2 ) ≤ R1 ⇒ Re2 ≤ Re1
(2.27)
Let the output of the voltage controller be, vm1 when delivering the load R1 . When step change in the load occurs as shown in figure 2.21, the actual voltage falls because of the sudden demand for additional current by the load. During this transient, the voltage error
R1 R1 || R2 vc,ref vc
vm2 vm1
Figure 2.21: Scalar control based converter : waveforms during Step change of load
(between the voltage reference, vc,ref and the actual voltage, vc ) becomes positive and the PI controller integrates the error. The integrator increases the output of the voltage controller from an initial value, vm1 to a final value, vm2 . We can say that vm2 > vm1
(2.28)
Therefore from eqn. 2.27 and eqn. 2.28 we conclude that vm α
1 K ⇒ vm = Re Re
(2.29)
2.3. Scalar Control
45
where, K is the constant of proportionality. If we put K = vc Rs we have, vm vc = Rs Re
(2.30)
where, Rs is the current sensing resistance. On substituting eqn. 2.30 in eqn. 2.26, the duty ratio expression becomes "
ig (t)Rs 1 1− d(t) = 2 vm
#
(2.31)
All terms in eqn. 2.31 are known and the duty ratio, d(t) can now be evaluated. On comparing scalar control with the average current mode control, we see that there is no current loop present explicitly in scalar control. The current control function is inherent in the modulator. The output of the voltage controller, vm controls the depth of modulation of the converter. The current feedback is used to generate the duty ratio using the control law.
2.3.2
Steady State Stability criterion
In Scalar control technique, as in other current mode controlled converters, steady state instability under certain operating conditions is observed. This is due to the inherent feedback structure which is a common characteristic of all these converters [9]. The objective of the analysis presented here is to quantify the steady state stability condition criterion, in terms of circuit parameters and switching frequency of the converter. Consider the beginning of a particular switching cycle, where the inductor current is i g1 . Let, ig2 be the current at the end of the switching cycle. Let, δig1 be a small perturbation introduced in ig1 . As the switching happens, this perturbation becomes δig2 in ig2 . This is shown in figure 2.22 .
¯ ¯ ¯ δig2 ¯ ¯ Any feedback system will be stable in steady state when ¯ δi ¯¯ < 1 because it means that g1
δi disturbances die down with time. The analysis carried out below is to find δig2 in terms of g1 circuit parameters. Since the term is not directly deducible, it is found out in two steps. The steady state relationship between the duty ratio and current is rewritten below from eqn. 2.31 ·
ig1 Rs 1 1− d= 2 Vm
¸
(2.32)
46
Chapter 2. Single phase Power Factor Correction Techniques
ig1
δig1
δig2
ig2
Figure 2.22: Steady state stability analysis
where, Vm is the output of the voltage controller in steady state. Partially differentiating this equation with respect to δig1 we get, Rs δd =− δig1 2Vm
(2.33)
The inductor voltage relationship can be rewritten from eqn. 2.24 as, L
dig2 = vg − Vc (1 − 2d) dt
(2.34)
Partially differentiating this equation with respect to the duty ratio, d we get 2Vc Ts δig2 = δd L
(2.35)
where, T1 is the switching frequency of the converter. Multiplying eqn. 2.33 and eqn. 2.35 s we get, ¯ ¯ ¯ δi ¯ V c T s Rs ¯ g2 ¯ ¯ ≤1 (2.36) ¯= ¯ δig1 ¯ LVm The expression derived in eqn. 2.36 is the condition for steady state stability. It is observed
that the stability condition is dependent on circuit parameters, that is, line inductance, L, switching frequency, T1 and on load. In case of Linear Peak Current Mode control based DCs DC converters, the addition of a compensating ramp, removes this load dependent instability [9]. However, it has been shown that this is not a very feasible solution in case of AC-DC converters. This is because the current slope is not a constant during every switching cycle in these converters. By appropriate choice of the value of L and switching frequency, the problem of light load instability can be minimized.
2.3. Scalar Control
2.3.3
47
Small signal analysis
A Linear low frequency, small signal model of the boost converter is developed in this section. The dynamic variables of the system are inductor current, ig and capacitor voltage, vc . The small signal model can be obtained by perturbing the averaged converter model about the operating point. Since power circuit configuration used for implementing scalar control is same as in average current mode control, the small signal behavior of the plant remains unchanged. The control transfer functions of the converter are rewritten from equations 2.14 and 2.15.
RC +1 s ˆig (s) 4Vc 2 = 2 L ˆ e R(1 − 2D) 2 d(s) s Le C + s + 1 R
(2.37)
Le vˆc (s) 2Vc R = (2.38) Le ˆ (1 − 2D) 2 d(s) s Le C + s + 1 R These equations are the small signal transfer functions of the plant about a particular oper-
1−s
ating point. As mentioned earlier, the operating point in the converter is not steady as in a DC-DC converter but varying at the line frequency, 50 hz. The steady state value of the variables used in the expressions represent their rms value. In scalar control based UPF rectifier, there is no current loop present explicitly. To get a physical understanding of the dynamics of the current modulator, a current loop model is developed with the control law as explained below. The voltage loop model is also developed in this section. 2.3.3.1
Current loop
The control law given in eqn. 2.31 is rewritten below d=
·
1 ig Rs 1− 2 Vm
¸
(2.39)
On perturbing eqn. 2.39 with small signal variations of the system variables, we get the following expression ˆ m + vˆm ) = [(Vm + vˆm ) − (ig + ˆig )Rs ] 2(d + d)(V
(2.40)
48
Chapter 2. Single phase Power Factor Correction Techniques
ˆ vˆm and ˆig represent the small signal variations of the system variables about the where, d, operating point. On neglecting the DC and second order terms in eqn. 2.40, we get the ˆ in terms of vˆm and ˆig . following expression for d, "
#
·
¸
Rs ˆ ig Rs ˆm − dˆ = ig 2 v 2Vm 2Vm
(2.41)
The expression given in eqn. 2.41 represents the modulator. Eqn. 2.37 gives the plant transfer function of the current loop. These two equations can be combined and represented as shown in figure 2.23. Rs can be moved to the forward path in figure 2.23. Rearranging the The gain block, 2V m
vˆm
ig Rs 2Vm2
dˆ
ˆig dˆ
ˆig
Rs 2Vm Figure 2.23: Current Modulator representation
gain blocks, we get a model as shown in figure 2.24. This figure represents an equivalent current loop model of the modulator. The current loop is not present explicitly in the control structure of the converter. The model developed here is to aid in the understanding of the bandwidth of the current modulator. The reference current, ˆig,ref is derived from the steady state current, ig . The output of the voltage controller, vˆm seen in figure 2.24 controls the depth of modulation of the current reference signal. Eqn. 2.37 represents the plant transfer Rs . function, G1 (s). The controller, H1 (s) is a P controller whose gain is 2V m The analysis above shows that a current controller need not be designed explicitly for scalar control based converter. The controller is inherent in the control law for modulating the switches. Discussion about the bandwidth of the controller is taken up in the next section.
2.3. Scalar Control
vˆm
49
ig Vm
ˆig,ref
ˆig,err
G1 (s)
H1 (s)
dˆ
Rs 2Vm
ˆig
ˆig dˆ
ˆig,f b Controller
Plant
Figure 2.24: Current loop model of modulator in Scalar control based UPF rectifier
2.3.3.2
Voltage loop
In the voltage loop model, the current loop is assumed to be a unity gain block. Dividing eqn. 2.38 by eqn. 2.37, we get the plant transfer function of the voltage loop, G 2 (s) Le vˆc (s) R = R(1 − 2D) ˆig (s) sRC + 1
1−s
h
(2.42)
·
i
¸
1 and a zero at R . The controller needs It is seen in eqn. 2.42 that there is a pole at RC Le to be suitably designed for the voltage loop which is taken up in the next section. The model of the voltage loop is shown in figure 2.25.
vˆc,err vˆc,ref vˆc,f b
H2 (s)
?
vˆm
ig Vm
ˆig,ref
ˆig 1
Controller
G2 (s) vˆc ˆig
vˆc
Plant
Figure 2.25: Voltage loop model of Scalar control based UPF rectifier
50
Chapter 2. Single phase Power Factor Correction Techniques
2.3.4
Controller design
2.3.4.1
Current controller
The current controller need not be designed explicitly in scalar control. The bandwidth of the current modulator which is dependent on load and the line inductance is explained below. Eqn. 2.37 represents plant transfer function of the current loop. From eqn. 2.30, we can Vc in eqn. 2.37. The modified plant transfer function, G (s) is shown below substitute R 1 e
G1 (s) =
4Vm Rs
RC +1 s 2 L e s 2 Le C + s + 1 R
(2.43)
where, Vm is the output of the voltage controller and Rs is the sense resistance. In Section 2.3.3.1, the current loop model was derived. As per the model developed, the controller, H1 (s) present inherently in the modulation law, is a P controller. The gain of the controller is given by H1 (s) =
Rs 2Vm
(2.44)
Multiplying eqn. 2.43 and eqn. 2.44, we get the forward path transfer function, T (s) of the current loop. This is shown below T (s) =
sRC + 2 Le s 2 Le C + s + 1 R
(2.45)
The closed loop transfer function, A(s) of the current loop can be found using the following relationship A(s) =
T (s) 1 + T (s)
(2.46)
On substituting T (s) in eqn. 2.46 from eqn. 2.45, we get the following expression A(s) =
sRC + 2 Le s2 Le C + s + sRC + 3 R
(2.47)
The expression given above represents the closed loop transfer function of the current modulator, A(s). To simplify the denominator of the expression given above, the plant model of the converter is analyzed.
2.3. Scalar Control
51
The overall control structure of the converter is shown in figure 2.26. The controller regulates the output voltage, vc and generates the gate drive, d based on the modulation law. The plant has two dynamic variables which are controlled namely inductor current, i g and capacitor voltage vc . There are two integrators which control these two variables. The dynamic equations corresponding to these variables are given below. ·
¸
R vg dig + ig = dt Le L ·
(2.48)
¸
dvc 1 id + vc = dt RC C
(2.49)
The output from the controller, demands a voltage, vi = vc (1 − 2d), at the poles of the
full-bridge inverter. This is the input for the current integrator. Input voltage, v g acts as a disturbance input. The output of the current integrator gives the input for the voltage integrator, id . The (1−2d) term present in both these loops is introduced by the modulation.
The first control objective is to maintain constant output voltage, vc . The output of the voltage integrator, vc will be constant only when the input to the voltage integrator, id is constant and steady. The output of the current integrator, ig must settle down to get a constant id . This means that the current integrator should have faster dynamics when compared with the voltage integrator. Eqn. 2.48 and eqn. 2.49 give the dynamic equations e of the two integrators. The time-constants of the current and voltage integrators are L R and RC respectively. From the analysis given above, we can conclude that, time constant of e the current integrator, L R should be at least an order lesser than the time-constant of the voltage integrator, RC. · ¸ L L e e e Since R ¿ RC, we can replace R in denominator of eqn. 2.47 by 3 L R without loss vg
d
vc,ref vc,f b
Vm
Mod.
ig,f b
vc (1 − 2d) vc
vi
1 L
ig
(1 − 2d)
id
1 C il 1 R
Controller
Plant
Figure 2.26: Model of the Plant and controller of Scalar control based UPF rectifier
vc
52
Chapter 2. Single phase Power Factor Correction Techniques
of validity of the expression. Eqn. 2.47 is rewritten after making this substitution as shown below. A(s) =
sRC + 2 µ ¶ L 2 L s RC + 3 s + sRC + 3 Re Re
(2.50)
Eqn. 2.50 which represents the closed loop transfer function of the current modulator, can be rewritten in the time-constant form as shown below
µ
¶
RC s +1 ˆig (s) 2 2 = µ ¶ ¶µ L RC ˆig,ref (s) 3 s +1 +1 s Re 3
(2.51)
Gain, dB
The bode plot of this transfer function is plotted in figure 2.27. The following observations A(s) 2 RC
3 RC
Re L
Phase
log ω
log ω
-90o
Figure 2.27: Bode plot of closed loop current transfer function are made from the figure • A gain corresponding to 20 log 23 . h
i
2 . The slope of the magnitude plot rises at 20 dB/decade at this • A zero at RC frequency. h
i
3 . The magnitude plot comes back to zero dB line. • A pole at RC ·
¸
e • A pole at R L . The gain plot falls at -20 dB/decade and the phase plot settles at -90o .
2.3. Scalar Control h
53
i
h
i
3 cancels the effect of the zero at 2 . The range of these frequencies is The pole at RC RC much below the frequency of interest. This region can be neglected in the bandwidth analysis of the current· loop. ¸ From eqn. 2.51, we can conclude that the bandwidth of the current loop R is given by L . The term Le is not directly observable. However, Re can be known e because it is the relationship between input · ¸voltage, vg and current, ig . The bandwidth of R the current modulator can be written as Le . Whenever Re changes, the bandwidth of the current controller also changes. Re changes under one of the two conditions or both • change in output power - load regulation. • change in input voltage - line regulation. The reference for the current controller is at the fundamental frequency, 50 hz. If the bandwidth of current controller is an order greater than the current reference frequency, that is, 500 hz or more, the actual current follows the reference in magnitude and phase. Under certain operating conditions, the value of Re becomes less. In such cases, the bandwidth of the current controller becomes comparable with the current reference frequency. This introduces phase and magnitude error in the current loop. Waveforms highlighting this are shown in experimental results section. The dynamic model of the modulator developed by the analysis in this section is as shown in figure 2.28.
vˆm
ig Vm
ˆig,ref
ˆig A(s)
Modulator representation Figure 2.28: Dynamic model of the modulator
54
Chapter 2. Single phase Power Factor Correction Techniques
2.3.4.2
Voltage controller
The voltage controller design is the same as that done for the average current mode control h i 1 and an based converter. The plant transfer function G2 (s) has a low frequency pole RC · ¸ R . Since our frequency of interest is less than the line frequency, we high frequency zero L e
can neglect the effect of the high frequency zero. A PI controller whose zero cancels the pole
at RC can act as a controller for this loop. The bode plots of the plant, G2 (s) and forward
Gain, dB
path transfer function, G2 (s)H2 (s) of the voltage loop is shown in figure 2.29.
G2 (s) G2 (s)H2 (s)
Phase
1 RC
0o
log ω
log ω
-90o
Figure 2.29: Bode plot of plant and forward path transfer function of Voltage loop
2.3.5
Simulation and Experimental results
The hardware described in section 2.2.4 is used to verify the scalar control based PFC technique. The power rating of the converter is as indicated in the same section. MatlabSimulink was used to simulate the system. The waveforms shown in figure 2.30(a) shows the input voltage and current delivering full load of 800 W. The input voltage is 230 V. It is observed that the THD of the line current is 0.3% in figure 2.30(b). The power factor is unity. Waveforms obtained from the DSP based experimental set-up are shown in figure 2.31. The input voltage and current while delivering rated load of 800 W is shown in figure 2.31(a). The input voltage is 230 V. The THD of the line current is 5.3% as seen in figure 2.31(b). The power factor is unity.
2.3. Scalar Control
55
6
200
0
0 (2)
-200
Current (A)
Voltage (V)
(1)
-6
Harmonic Currents as percentage of fundamental (%)
100
12
400
90 THD = 0.3 %
80 70 60 50 40 30 20 10
-400 0.40
0.42
0.46
-12 0.48
100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Time(sec)
(a) Input Voltage (1) and Current (2)
(b) Frequency spectrum of line current
Figure 2.30: Simulation results - Input voltage and current Harmonic Currents as percentage of fundamental (%)
100 90 THD = 5.3 %
80 70 60 50 40 30 20 10
100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
(a) Ch. 1 : Input Voltage, scale:100V/Div.
(b) Harmonic spectra of Line current
Ch. 2 : Input Current, scale:5A/Div. Ch. 1 shows the input voltage and Ch. 2 shows the input current. The two waveforms are in phase and the power factor is unity.
Figure 2.31: Experimental results - Input voltage and current
The response of the converter for a step change in load from 100 % to 50 % and vice versa is shown in figure 2.32. The step change in the load current is shown in Channel 1 (Ch. 1). The change in the output of the voltage controller, vm which in turn alters the power flow in the system is seen in Channel 2 (Ch. 2). The output voltage regulation is seen in Channel 3
56
Chapter 2. Single phase Power Factor Correction Techniques
(Ch. 3). Change in the line current when the step change in load occurs is seen in Channel 4 (Ch. 4). In Section 2.3.4.1, analysis on the bandwidth of the current controller was carried out. It
Ch. 1 : Load Current, scale:2A/Div., Ch. 2 : Voltage controller output, scale:2V/Div., Ch. 3 : Output voltage, scale:200V/Div., Ch. 4 : Input current, scale:10A/Div. Ch. 1 shows the step change in load current from 2 A to 1 A and vice versa. The change in the output of the voltage controller which controls the power delivered is seen in Ch. 2. Output voltage regulation at 400 V is seen in Ch. 3. Change in line current during the step change in load is seen in Ch. 4. Figure 2.32: Step change of Load from 100 % to 50 % and vice-versa
was observed that the bandwidth of the current loop was dependent on the emulated resistance, Re and line inductance, L. When the closed loop bandwidth becomes comparable with the frequency of the current reference in the current loop model, phase and magnitude errors are introduced. A current loop is not present explicitly in the control structure. But the effect of phase lag in the current loop model, when its bandwidth becomes comparable with the line frequency can be observed experimentally. The waveforms highlighting this are shown in figure 2.33 and 2.34. A couple of operating points are chosen to validate the current loop model. The first operating point has a high current loop bandwidth. The second operating point has a low current loop bandwidth. Experimental and simulation results are provided at both these operating
2.3. Scalar Control
57
points to validate the current loop model. The operating conditions of the first operating point are given below • Input voltage, vg = 220 V • Input current, ig = 4 A • Line inductance, L = 15 mH 12
400
6
200
0
0 (2)
-12
-200 -400 0.40
Current (A)
Voltage (V)
(1)
0.41 Time(sec)
-12 0.42
(a) Ch. 1 : Input Voltage, scale:100V/Div.
(b) Input Voltage (1) and Input current (2)
Ch .2 : Input Current, scale:5A/Div.
obtained from simulation are seen in this
Input voltage in Ch. 1 and current in Ch. 2 are
figure. They are in phase with each other.
in phase with each other. The corner frequency of the current loop is a decade above the current reference frequency. No phase shift is observed in current with respect to voltage.
Figure 2.33: Current controller bandwidth analysis - 1st operating point
From the values given above, we can find out the value of emulated resistance, Re using the following relationship Re =
vg ig
(2.52)
For the given operating point, Re = 55 Ω. The closed loop bandwidth of the current loop e is R L . The bandwidth at this operating point is 583 hz. Since this frequency is a decade above the current reference frequency, the phase lag introduced for the 50 hz reference signal is zero. The phase shift in the current with respect to the voltage is zero. As per the current loop model proposed, there should be no phase displacement of the current with respect to
58
Chapter 2. Single phase Power Factor Correction Techniques
the voltage. Figure 2.33 shows the experimental and simulation results obtained for this particular operating point. Figure 2.33(a) shows the input voltage in Channel 1 (Ch. 1) and current in Channel 2 (Ch. 2) obtained from the experimental set-up. It is observed in this figure that the two quantities are in phase. Figure 2.33(b) shows the results obtained from simulation. Similar behavior of the input current and voltage are observed here. The results obtained from the experimental set-up and simulation match with that predicted by the current loop model. The operating conditions of the second operating point are given below • Input voltage, vg = 110 V • Input current, ig = 9 A • Line inductance, L = 15 mH For this operating point, the value of Re = 12.2 Ω. The closed loop current control bandwidth is 130 hz. This is the corner frequency of the closed loop system. The phase lag introduced for a signal whose frequency is 130 hz will be 45o . For the current reference signal, which is at 50 hz, the phase lag introduced by the control will be ¸ · −1 50 = 21o (2.53) φlag = tan 130 As per the current loop model, a phase displacement of 21o should be observed between the input voltage and current at this operating point. Figure 2.34 shows the experimental and simulation results obtained for this particular operating point. Figure 2.34(a) shows the input voltage in Channel 1 (Ch. 1) and current in Channel 2 (Ch. 2) obtained from the experimental set-up. The measured time lag between the zero-crossings on the current and voltage is 1.2 msec. For a 50 hz waveform, this time-lag h i o corresponds to a phase lag of 1.2 20 360 = 21 . Figure 2.34(b) shows the input voltage and current obtained from simulation. This also shows a phase difference of 21o between the two quantities. The experimental and simulation results show that at this particular operating point, a phase difference of 21o is observed between the input voltage and current. This matches with the phase difference proposed in the current loop model. The current loop model proposed in Section 2.3.4.1 is thus validated by considering the phase relationship between input voltage and current at two different operating points.
2.4. Comparison of Average current mode and Scalar control techniques
59
200
30
15
0
0 (2)
-100
-200 0.40
Current (A)
Voltage (V)
(1) 100
-15
0.41 Time(sec)
-30 0.42
(a) Ch. 1 : Input Voltage, scale:100V/Div.
(b) Input Voltage (1) and current (2) ob-
Ch. 2 : Input Current, scale:10A/Div.
tained from simulation are seen in this fig-
Input current in Ch. 2 is phase shifted from the
ure. It is observed that there is a phase dis-
Input voltage in Ch. 1 in this case. The cor-
placement between the voltage and current
ner frequency of the current loop is comparable
as predicted by the current loop model.
with the current reference frequency at this operating point. The current loop introduces phase and magnitude error which is seen in the phase displacement of current with respect to the voltage.
Figure 2.34: Current controller bandwidth analysis - 2nd operating point
2.4
Comparison of Average current mode and Scalar control techniques
The previous sections described the control philosophy and implementation details of Average Current Mode control and Scalar control based single phase PFC techniques. Both are carrier based constant switching frequency techniques. From the results obtained, scalar control is found to be more advantageous than average current mode control because of the following reasons. • The technique is input voltage sensor less. • The control does not require multiplier for generating current reference. • The control can be easily extended to three phase. Steady state instability is observed in Scalar control based converters under light load conditions. This problem can be minimized by appropriate choice of line inductance and switching
60
Chapter 2. Single phase Power Factor Correction Techniques
frequency of the converter. Phase displacement between the current and voltage under certain operating conditions is also observed in this technique. The displacement power factor becomes lesser than 1 under these conditions even though the distortion power factor does not change significantly.
2.5
Conclusion
In this chapter, two single phase PFC techniques are described. The first one, average current mode control technique is the state-of-the-art in single phase power factor correction. The steady state and small signal analysis of the converter was developed. The design of the controllers using this technique was also described. Simulation and experimental results were presented to validate the control method. The proposed method, scalar control was discussed next. The steady state and small signal analysis was done. Current modulator and the voltage controller were discussed in detail. The current loop was developed from the control law of the modulator. The design of current and voltage controllers were also discussed. Simulation and experimental results were presented finally to validate the proposed control method. The current loop model that was proposed for the modulator was also verified using simulation and experimental results. In conclusion, the scalar control technique was found to be better than the average current mode control technique in terms of control simplicity and ease of implementation.
Chapter 3 Three phase Power Factor Correction Techniques 3.1
Introduction
The previous chapter described two single phase PFC techniques. The work presented in this chapter is in the area of three phase PFC. Two control techniques have been implemented using a DSP controller which are described in the sections below. The three phase AC-DC boost rectifier shown in figure 3.1 is widely used for PFC and is used in the work presented here. Though the converter requires 6 current bi-directional two quadrant switches, this topology is preferred because of the following reasons • Continuous input current - little additional EMI filtering • Lower rms currents and conduction losses when compared with other topologies [6]. The drawback of this topology is that the DC voltage needs to be higher than the peak of the input line-line voltage. This power circuit configuration is chosen for implementing the control techniques. The first technique implemented is based on the synchronous reference frame theory also called vector control. This technique gives independent control over active and reactive power. The modeling of the power circuit and the controller design are described in detail. Experimental results obtained from the hardware set-up are presented to validate the analysis. The second technique that is proposed in this thesis, is called Scalar control. The control philosophy of this method is similar to single phase scalar control based UPF converter. The 61
62
Chapter 3. Three phase Power Factor Correction Techniques
differences between this method and vector control based Front End Converter (FEC) is explained in detail. Simulation and experimental results for this method are presented.
3.2
Vector Control based FEC
Vector control based FEC is one of the existing state-of-the-art techniques in three phase PFC. This method is complicated in terms of the control methodology and the number of feedback signals to be sensed, when compared with other techniques proposed in literature. Vector control has the following advantages. • Independent control of active and reactive power. • Low harmonic content in the input current. • Bi-directional power flow. Vector control provides these advantages besides having a good dynamic and steady state performance. In order to bring out these features, vector control was chosen for implementation.
3.2.1
Principle of operation
The power circuit configuration used for implementing vector control is the three phase boost topology shown in figure 3.1. The converter is operated as a Pulse Width Modulated (PWM) Voltage Source Inverter (VSI) in the current-controlled mode. Carrier based sinetriangle modulation is used to control the active switches. The DSP controller seen in figure 3.1, takes feedback signals for implementing the control and generates the gate drive for the switches. The main objectives of the control are • Regulation of the DC bus voltage. • Input current at desired power factor. • Low harmonic content in input current. • Bi-directional power flow capability.
3.2. Vector Control based FEC
63 id
D1 S3
S1
D3 S5
vc
D5
vc 2
vgr vgy
Output Voltage feedback
R
vgb
D4 S6
S4 Input Voltage feedback
D6 S2
D2
vc 2
Current feedback dr igr,f b
dy
db
DSP Based Controller
igy,f b
vg,yr
vc,f b
vg,yb
Figure 3.1: Power and Control circuit of Vector control based FEC The controller meets these objectives using sinusoidal current controlled PWM on the VSI. The operation of the FEC can be explained with the help of the single phase equivalent circuit of the three phase FEC shown in figure 3.2. Let, vg be the input phase voltage, vi be L
vg
ig
vi
Figure 3.2: Single phase equivalent ciruit of Vector control based FEC the fundamental component of the PWM voltage applied on one of the poles of the inverter and ig be the line current. The direction of active power flow between two voltage sources (vg and vi ) connected by an inductance is determined by the relative phase angle between
64
Chapter 3. Three phase Power Factor Correction Techniques
them. Forward power flow happens when vg leads vi and reverse power flow happens when vi leads vg . The active power, P transferred between the two voltage sources is given by, P =
|vg ||vi | sin δ Xl
(3.1)
where, δ is the angle between vi and vg , Xl is the inductive reactance. The reactive power flow between the two sources depends upon the magnitudes of the two sources. The expression for reactive power, Q is given by Q=
|vg | (|vg | − |vi | cos δ) Xl
(3.2)
Q is positive when the input current, ig lags vg and negative when the input current, ig leads vg . By controlling the phase and magnitude of vi , we can independently control active power, P and reactive power, Q respectively. The pole voltage of the VSI, vi is adjusted by using sine-triangle current-controlled PWM. This is the control philosophy of the vector control based FEC. The first control objective of maintaining constant DC bus voltage, vc is achieved by using a voltage controller. The actual voltage is compared with the reference and the error is fed to the voltage controller. Any change in vc can be attributed to an imbalance in the active power between the AC and DC sides. The voltage controller corrects this error and maintains the DC bus voltage constant. The second objective of the controller, is to obtain input current at any desired pf. The single phase equivalent circuit of the converter is shown in figure 3.2. On applying KVL to
vi ig
vg
δ
ig
δ
−ig Xl vi
Forward Power flow
Reverse Power flow
Figure 3.3: Phasor diagram under Unity Power Factor
−ig Xl
vg
3.2. Vector Control based FEC
65
this circuit we have, v g = v i + i g Xl
(3.3)
where, Xl is the inductive reactance. From eqn. 3.3, by controlling the magnitude and phase of vi , we can control ig since vg and Xl are fixed. Pole voltage, vi is given by vi =
vc vi,ref 2.vtri
(3.4)
where, vi,ref is the modulating signal and vtri is the peak of the high frequency triangular carrier. By adjusting vi,ref , control over vi is achieved. The VSI acts as a fixed frequency voltage source with controllable phase and magnitude. Figure 3.3 shows the phasor diagram for Unity Power Factor operation under forward and reverse power flow conditions. Similarly, lagging and leading pf can be achieved by suitably adjusting vi . The phasor diagrams of these conditions is shown in figure 3.4. The second control objective of achieving current at any power factor is met by controlling the fundamental voltage applied on the poles of the inverter, vi . The third objective of the VSI front end converter, is to draw sinusoidal current at the fundamental frequency with negligible harmonic content. The control of the three line currents
vi vg δ vi
ig
−ig Xl vg
δ
−ig Xl ig
Lagging PF
Lagging PF
ig
ig
vi
vg δ
δ
−ig Xl
−ig Xl vg
vi Leading PF
Forward Power flow
Leading PF
Reverse Power flow
Figure 3.4: Phasor diagram under Lagging and leading PF
66
Chapter 3. Three phase Power Factor Correction Techniques
is done in the synchronously revolving d-q reference frame at the fundamental frequency. The advantages of doing current control in the revolving reference frame are, • Independent control of active and reactive components of the current. • Controllers operate on DC quantities. The reference for the current controllers in the revolving d-q reference frame is a DC quantity. In steady state, error between the reference and actual current is zero. A DC quantity in the revolving reference frame corresponds to an AC quantity at the fundamental frequency in the stationary reference frame. When the currents are controlled in the synchronous reference frame, the harmonic contents of those currents will be zero. The third objective of currents with low harmonic content is achieved. The overall control structure of the vector control based VSI is shown in figure 3.5. In the figure, the voltage controller regulates the DC bus voltage, vc . The output of the voltage vgr vgy vgb sin θ cos θ igq,ref
vc,ref
Voltage igq,f b Controller
vc,f b
q-axis Controller
viq,ref Trans. from d-q to 3-φ & vid,ref PWM gen.
vc
vir viy vib
igr igy igb
igd,ref vc
vc,f b igd,f b
igq,f b d-axis Controller igd,f b
igr
Trans. from 3-φ to d-q sin θ
igy
Feedback signals
cos θ Unit Vector Gen.
Controller
vg,ry vg,yb
Plant
Figure 3.5: Block diagram representation of Vector control based FEC
3.2. Vector Control based FEC
67
controller is the reference for the q-axis or active current controller, i gq,ref . Reactive or daxis current controller reference, igd,ref is set in open loop. For unity power factor operation, igd,ref is zero. Lagging and leading power factor operation is achieved with positive and negative value of igd,ref respectively. The actual q-axis and d-axis currents, igq,f b and igd,f b are obtained by applying phase transformations to the line currents, igr , igy and igb . The current error is fed to the current controllers. The outputs of these controllers, v iq,ref and vid,ref are transformed from the revolving d-q reference frame to the generate three sinusoidal references, vir,ref , viy,ref and vib,ref in the stationary reference frame. Carrier based sinetriangle modulation is then used to generate the gate drive for the devices. Input line voltages, vg,ry and vg,yb need to be sensed to generate sin θ and cos θ which are used in doing the transformations from the stationary reference frame to the synchronously revolving reference frame and vice versa. The modeling of the power circuit and the design of the controllers is done in the next section.
3.2.2
Modeling of Power Circuit
In the stationary reference frame, the AC side voltage equation for the three phases can be written by applying KVL to the single phase equivalent circuit shown in figure 3.2. vgr = vir + igr Rl + L
digr dt
(3.5)
vgy = viy + igy Rl + L
digy dt
(3.6)
vgb = vib + igb Rl + L
digb dt
(3.7)
where, L is the line inductance and Rl is the resistance of the line inductance. The other terms are as given in the figure. The equations given above is for each phase. The same equation can be written by transforming from three phase R-Y-B system to two-phase α − β
system. The orientation is done such that α-axis coincides with R-phase voltage phasor. The equations after the transformation to α − β system is shown below vgα = viα + igα Rl + L
digα dt
(3.8)
vgβ = viβ + igβ Rl + L
digβ dt
(3.9)
68
Chapter 3. Three phase Power Factor Correction Techniques
The two equations can be written in terms of space phasors as shown below v g = v i + i g Rl + L
dig dt
(3.10)
where, vg = vgα + vgβ . vi and ig are similarly represented in eqn. 3.10. These equations are in the stationary α − β reference frame. They can be transformed to the synchronously
revolving d−q reference frame as shown in figure 3.6. The d-q reference frame revolves in the anti-clockwise direction at the supply frequency, ω. The relationship between the variables in stationary reference frame and revolving reference frame is given by [11], [vgα + vgβ ] = [vgq + vgd ]eθ
(3.11)
The orientation of the d-q reference frame is done such that the q-axis coincides with β q ω
d Input voltage space phasor, vg
θ
α
Figure 3.6: Stationary (α − β) and revolving (d-q) reference frames the supply voltage space phasor, vg . The unit vectors, sin θ and cos θ required for doing the transformations in eqn. 3.11, are obtained from the input line voltages, v g,yr and vg,yb . Eqn. 3.10 which represents the power circuit in the stationary reference frame is rewritten using d − q variables as shown below h
i
(vgq + vgd )eθ = (viq + vid )eθ + Rl (vgq + vgd )eθ + L
i d h (vgq + vgd )eθ dt
(3.12)
Since q-axis coincides with the supply voltage space phasor, vgd = 0. Eqn. 3.12 can be rewritten as shown below vgq eθ = (viq + vid )eθ + L
i h d dθ [vgq + vgd ] eθ + L [vgq + vgd ] eθ + Rl (vgq + vgd )eθ (3.13) dt dt
3.2. Vector Control based FEC
69
This equation represents the power circuit in the stationary reference frame. Multiplying eqn. 3.13 by e−θ , we move from the α − β reference frame to the d − q reference frame. On
separating the real and imaginary parts of the equation, we get the q- and d-axis equations as shown below Rl igq + viq + L
digq − ωLigd = vgq dt
(3.14)
digd + ωLigq = 0 dt
(3.15)
Rl igd + vid + L
These are the plant equations of the q-axis and d-axis current loops. The q- and d-axis
Controller igq,ref
? igq,f b
Plant viq
viq,ref
1 L
G
q-axis Controller
VSI
vgq
ωLigd
igq
Rl
Figure 3.7: q-axis Current loop model of Vector control based FEC
current loop model is shown pictorially in figure 3.7 and figure 3.8 respectively. The two equations are not decoupled from each other. A term involving igd , ωLigd is present in the q-axis plant equation and a term involving igq , ωLigq is present in the d-axis plant equation. In the figures, the inverter is modeled as a gain block, G. The value of G for sine-triangle
Controller
Plant
vid,ref
igd,ref
igd,f b
vid
?
G
d-axis Controller
VSI
-1
ωLigq
1 L
Rl
Figure 3.8: d-axis Current loop model of Vector control based FEC
igd
70
Chapter 3. Three phase Power Factor Correction Techniques
modulation depends on the DC bus voltage, vc and the peak of the triangular carrier, vtri . G=
vc 2.vtri
(3.16)
These plant equations will be used in designing the controllers for the q-axis and d-axis current loops. In the voltage loop model, the current loop is assumed to be a unity gain block. The output of the voltage controller, igq,ref balances input and output power. The voltage controller demands a particular active current from the AC voltage source. This current demand, i gq
Plant
Controller vc,ref
? vc,f b
igq
igq,ref
1
2 vgq 3 vc
id
Voltage Controller
1 C
vc
1 R
Figure 3.9: Voltage loop model of Vector control based FEC
on the AC side of the FEC, corresponds to DC link current, id . The relationship between id and igq is obtained using real power balance between the two sides [11]. The model of the voltage loop is a current (id ) feeding an RC network. The model of the voltage loop is shown in figure 3.9. The design of the voltage controller is done in the next section.
3.2.3
Controller design
3.2.3.1
Current Controller
This section describes the design of the current controller. Two currents, i gq and igd have to be controlled. Design of the q-axis current controller is described here. The d-axis current controller can be designed in a similar way. The plant equation of the q-axis current loop is shown below viq = vgq − L
digq − Rl igq + ωLigd dt
(3.17)
3.2. Vector Control based FEC
71
where, viq is the q-axis voltage that needs to be applied on the poles of the inverter. To get this voltage, viq at the poles, the reference signal used for modulating the VSI is viq,ref , as seen in figure 3.7. The output of the current controller gives this reference signal. The output of the current controller cannot be directly used as the reference because of the reason explained below. In the plant model of the q-axis current loop, the term ωLigd is present. Similarly, the term
Controller
H1 (s) igq,ref Ki (1+sTi ) sTi
igq,f b
q-axis Controller
0 viq,ref
Plant
viq,ref -1
G1 (s) viq
igq 1 Rl (1+sTl )
G VSI
vgq ωLigd G G
vgq
ωLigd
Feed-forward terms Figure 3.10: Closed loop model of q-axis current controller alongwith plant
ωLigq is present in the d-axis current loop. These cross-coupling terms arise in d-q plant model because of phase transformations. This causes problems in independent control of qand d-axis currents because change in d-axis current will have effect on the q-axis current and vice-versa. To make q- and d-axis current control independent, feed-forward of the cross0 coupling terms is done in the current controllers. The output of the current controller, v iq,ref 0 is not used as the reference for viq . The feed-forward terms are suitably added with viq,ref
to generate the final reference signal, viq,ref . This signal is used as the modulating reference for viq . This makes the two current controllers decoupled. Feed-forward of input voltage, v gq is done in the q-axis current loop to make it respond faster. The overall control structure of the q-axis current loop with the feed-forward terms is shown in figure 3.10. The bode plot of the plant is a first-order lag due to the line inductance, L. A PI will be a suitable controller for this plant. Zero of the PI controller is chosen to cancel the effect of L ). The zero of the PI controller is placed at 1 where, T =T . The the pole at T1 (Tl = R i l Ti l l forward path transfer function has a -20 dB/decade gain crossover behavior, which keeps the system stable. The gain of the PI controller, Ki is adjusted to achieve desired bandwidth.
72
Gain, dB
Chapter 3. Three phase Power Factor Correction Techniques
G1 (s) G1 (s)H1 (s)
Phase
1 = 1 Tl Ti
0o
log ω
log ω
-90o
Figure 3.11: Bode plot of plant and forward path transfer function of q-axis current loop
The bode plots of the plant, G1 (s) and forward path transfer function, G1 (s)H1 (s) are shown in figure 3.11. The design of the d-axis current controller is similar to the q-axis controller. This completes the design of the current controllers.
3.2. Vector Control based FEC 3.2.3.2
73
Voltage Controller
The model of the voltage loop was developed in the previous section. The bode plot of 1 . The block diagram of the the plant is a first-order slope with a corner frequency RC voltage loop alongwith the controller is shown in figure 3.12. A PI controller whose zero at
H2 (s) vc,ref
Kv (1+sTv ) sTv
vc,f b
Plant
Controller
igq
igq,ref
1
2 vgq 3 vc
G2 (s) id
R sRC+1
vc
Voltage Controller
Figure 3.12: Closed loop model of Voltage controller alongwith plant
1 1 Tv cancels the pole at RC will be a suitable controller for this system. The forward path transfer function has a -20 dB/decade gain cross-over behavior and the system is stable. The gain of the PI controller, Kv can be adjusted to get the desired bandwidth. The bode plots
Gain, dB
of the plant, G2 (s) and forward path transfer function, G2 (s)H2 (s) is given in figure 3.13.
G2 (s) G2 (s)H2 (s)
Phase
1 = 1 RC Tv
0o
log ω
log ω
-90o
Figure 3.13: Bode plot of plant and forward path transfer function of voltage loop
74
Chapter 3. Three phase Power Factor Correction Techniques
3.2.4
Experimental Results
Vector control of the FEC was validated on an experimental set-up. IGBT based IPM was the device used in the power converter. The rating of the converter is given below • Input voltage - 173 V (Line-Line) • Output voltage - 500 V • Output power - 2.5 kW • Switching frequency - 10 khz • Line inductance - 15 mH • DC bus capacitance - 1650 uF Since there were issues with operating the FEC from the three phase line-line voltage of 415 V, the FEC was operated at the above operating conditions to validate the control technique. The controller was developed using TMS320LF2407 DSP. The feedback signals used in implementing the control scheme are 2 input voltages, 2 line current and DC bus voltage. The AC signals are first scaled and shifted before being read by the ADC of the processor. The scaling of the signals are based on the per-unitisation given below • Voltage scaling - 1 p.u = 500 V • Current scaling - 1 p.u = 25 A The turn on transients of the FEC are shown in figure 3.14 under 50 % rated load condition. Channel 1 (Ch. 1) shows the build-up of the voltage to the reference value of 500 V. Channel 2 (Ch. 2) and Channel 3 (Ch. 3) show q-axis reference current, igq,ref and q-axis actual current, igq respectively. The q-axis current controller acts quickly and tracks the reference with zero error. Channel 4 (Ch. 4) shows current in one of the phases of the converter. The phase voltage and line current in two phases when delivering full load of 2.5 kW is seen in figure 3.15. The d- axis current reference, igd,ref is set to zero which corresponds to Unity Power Factor operation. The voltage and current are in phase with a power factor of 1. The current is sinusoidal and the THD of the current is 1.3 %.
3.2. Vector Control based FEC
75
Ch. 1 : Output voltage, scale:500V/Div., Ch. 2 : igq reference current, scale:25A/Div., Ch. 3 : igq actual current, scale:25A/Div. Ch. 4 : R-Phase current, scale:25A/Div. Ch. 1 shows the build-up of DC bus voltage to reference of 500V. The output of the voltage controller which is also the igq current reference is seen in Ch. 2. Ch. 3 shows the actual igq tracking the reference current, igq,ref . Current in R-phase is seen in Ch. 4. Figure 3.14: Start-up Response of vector control based FEC
Ch. 1 : R-Phase voltage, scale:100V/Div., Ch. 2 : R-Phase current, scale:25A/Div., Ch. 3 : Y-Phase voltage, scale:100V/Div., Ch. 4 : Y-Phase current, scale:25A/Div. The voltage and current in R- and Y-phase are seen to be in phase. Figure 3.15: Phase voltage and current under full load condition
76
Chapter 3. Three phase Power Factor Correction Techniques
The waveforms for a step change in load from 50 % to 100 % is shown in figure 3.16. The load is connected as two parallel branches of resistors, 200 Ω each. Channel 1 (Ch. 1) shows the step change of current in one of the resistor branches of the load. Channel 2 (Ch. 2) shows the q-axis current reference, igq,ref . The q-axis current reference is indicative of the real power demanded by the load. This signal doubles because the step change is from half load to full load. Channel 3 (Ch. 3) and Channel 4 (Ch. 4) show the input voltage and current respectively under UPF condition. The waveforms for a step change in the d-axis current reference, igd,ref is shown in figure 3.17. Channel 1 (Ch. 1) shows the step change in command, igd,ref from -0.4 p.u (leading pf) to +0.4 p.u (lagging pf). Channel 2 (Ch. 2) shows the tracking of the reference by the actual d-axis current, igd . Channel 3 (Ch. 3) and Channel 4 (Ch. 4) show the phase voltage and current respectively. Before the step change in igd,ref , the current is leading the voltage because igd,ref is -0.4 p.u. After the step change, igd,ref becomes +0.4 p.u. The current now starts lagging the voltage as seen in the figure. The decoupled nature of q-axis control and d-axis current is explained with the help of waveforms shown in figure 3.18. A step change of load from 50 % to 100 % and vice-versa is done. This change in output power results in change of q-axis current reference. The q-axis reference, igq,ref in Channel 1 (Ch. 1) changes, based on power balance. The line current in R-phase, igr changes accordingly as seen in Channel 2 (Ch. 2). The d-axis actual current, igd seen in Channel 4 (Ch. 4) does not change and it follows d-axis reference current, i gd,ref shown in Channel 3 (Ch. 3). This shows the decoupled nature of q-axis control and d-axis current. The decoupled nature of d-axis control and q-axis current is explained with the help of waveforms shown in figure 3.19. A step change in d-axis current reference, igd,ref is given as seen in Channel 3 (Ch. 3). Channel 4 (Ch. 4) shows the actual d-axis current, i gd which tracks the reference. The q-axis reference, igq,ref seen in Channel 1 (Ch. 1) remains unchanged during this transition in d-axis. The line current in Channel 2 (Ch. 2) undergoes a phase shift without any change in its magnitude. This shows the decoupled nature of d-axis control and q-axis current.
3.2. Vector Control based FEC
77
Ch. 1 : Load current, scale:2A/Div., Ch. 2 : igq reference current, scale:10A/Div., Ch. 3 : R-Phase Voltage, scale:100V/Div., Ch. 4 : R-Phase current, scale:25A/Div. Step change in load is seen in Ch. 1. igq,ref becomes double in Ch. 2. Voltage and current are seen in Ch. 3 and 4. Change in line current after step change in load is seen in Ch. 4. Figure 3.16: Step change in load from 50 % to 100 %
Ch. 1 : igd reference current, scale:10A/Div., Ch. 2 : igd actual current, scale:10A/Div. Ch. 3 : R-Phase Voltage, scale:100V/Div., Ch. 4 : R-Phase current, scale:10A/Div. The step change in igd,ref is seen in Ch. 1. igd , in Ch. 2 follows the reference, igd,ref . Line Current in Ch. 4 leads voltage in Ch. 3 initially. After step change, it lags the voltage. Figure 3.17: Step change in d-axis reference current
78
Chapter 3. Three phase Power Factor Correction Techniques
Ch.1 : igq reference current, scale:10A/Div., Ch.2 : R-Phase current, scale:10A/Div., Ch.3 : igd reference current, scale:25A/Div., Ch.4 : igd actual current, scale:25A/Div. Change in the q-axis reference current is seen in Ch. 1. Line current in Ch. 2 changes accordingly. No change is observed in d-axis reference and actual current seen in Ch. 3 and Ch. 4. Figure 3.18: Decoupling between change in q-axis control and d-axis current
Ch.1 : igq reference current, scale:10A/Div., Ch.2 : R-Phase current, scale:10A/Div., Ch.3 : igd reference current, scale:10A/Div., Ch.4 : igd actual current, scale:10A/Div. Change in the d-axis reference current is seen in Ch. 3. d-axis actual current tracks the reference in Ch. 4. Ch. 1 shows the q-axis reference current which remains unchanged. Figure 3.19: Decoupling between change in d-axis control and q-axis current
3.3. Scalar Control based FEC
3.3
79
Scalar Control based FEC
Scalar control based three phase PFC technique is discussed in this section. The advantages of this technique over vector control based FEC are • Reduced number of sensors. • Simple control strategy. • No need of phase transformations. The control philosophy of this technique is same as scalar control based single phase PFC converter discussed in Chapter 2. The modeling of the power circuit and the modulation law are described in the sections below.
3.3.1
Principle of operation
id
S1
D1 S3
D3 S5
vc
D5
vc 2
vgr vgy
R
vgb
S4
D4 S6
dr
D6 S2
dy
D2
vc 2
db
igr,f b DSP Based Controller
vc.f b
igy,f b
Figure 3.20: Power and Control circuit of Scalar control based three phase PFC converter
80
Chapter 3. Three phase Power Factor Correction Techniques
The power circuit on which scalar control is implemented is the three phase boost topology shown in figure 3.20. In vector control, the converter is operated as a PWM Voltage Source Inverter in the current-controlled mode. In scalar control, the modulation law for controlling the devices is derived based on the concept of resistance emulation and inductor Volt-sec balance. Though PWM is applied on the inverter, it is not current-controlled explicitly like vector control. The DSP based controller generates the gate drive for the switches. The objectives of the control are as follows • Regulation of DC bus voltage • Sinusoidal input current at Unity Power Factor • Low harmonic content in the input current The first control objective of the control, is to maintain constant DC bus voltage. As explained in vector control based FEC, the voltage controller maintains the power balance between the AC and DC side of the converter. The output of the voltage controller, v m commands a particular current from the AC source to meet the load demand on the DC side. The voltage controller meets the first objective of maintaining constant DC bus voltage. The second control objective of the control, is to obtain sinusoidal input current at UPF. The modulation of the switches to meet this objective is explained with the single phase equivalent circuit shown in figure 3.21. The figure represents one leg of the Voltage Source Inverter. On applying Volt-second balance on line inductance, L, we get the following relationship
vc 2
d L vi vg
ig d
R vc 2
Figure 3.21: Single phase equivalent circuit of Scalar control based three phase PFC converter
3.3. Scalar Control based FEC
81
between the input voltage, vg (t) and DC bus voltage, vc . vg (t) =
vc [1 − 2d(t)] 2
(3.18)
where, d(t) is the duty ratio of the bottom device shown in figure 3.21. The control desires that the input current, ig (t) to be in phase with the input voltage, vg (t) and emulate a resistance. The emulated resistance, Re is indicative of the power drawn from the source. vg (t) = ig (t)Re
(3.19)
From eqn. 3.18 and eqn. 3.19, we get the duty ratio control law as shown below d(t) =
1 ig (t)Re − 2 vc
(3.20)
As explained in Section 2.3.1.2, this expression can be rewritten using control level variables as given below. 1 ig (t)Rs − (3.21) 2 vm where, Rs is the current sense resistor and vm is the output of the voltage controller. d(t) =
An observation is made in the duty ratio expression in eqn. 3.21. Even though sine-triangle modulation is not done here explicitly, the variation of d(t) is sinusoidal. By varying the duty ratio of the switches as per the modulation law given in eqn. 3.21, we can achieve sinusoidal input current at Unity Power Factor. Unlike Vector control, it is not possible to achieve current at any power factor in this method. The third objective of the control, is to obtain input current with low harmonic content. In vector control, the current control is done in synchronous reference frame. Proper control of the currents in the d-q reference frame ensures the absence of other harmonic components in the line current. In scalar control, the modulation law accomplishes this without needing transformations. The current follows the input voltage as per the resistance emulation law given in eqn. 3.19 and responds to the frequency components present in the voltage. The input voltage has negligible harmonic content. So, the input current has negligible harmonics. The third objective of low harmonic component is met by the control. The control block diagram of scalar control based three phase boost rectifier is shown in figure 3.22. The output of the voltage controller, vm controls the current drawn from the source. The three modulators (R,Y and B) determine the duty ratio of the switches in the 3 legs. The current control is done in each phase independently in the stationary reference
82
Chapter 3. Three phase Power Factor Correction Techniques
Controller
Plant
R-phase Mod. 1 − igr Rs dr vm 2
vgr vgy vgb Power Converter
igr,f b Y-phase Mod. vc,ref
vm vc,f b
Voltage Controller
1 igy Rs dy 2 − vm
vir
vc
viy
igr
vib
igy igb
igy,f b B-phase Mod. 1 igb Rs 2 − vm igb,f b
vc db vc,f b igr,f b igy,f b
vc igr igy
Feedback signals
Figure 3.22: Block diagram representation of Scalar control based three phase PFC converter
frame. The current feedback signals, igr,f b , igy,f b , igb,f b and vm are used in the control law implemented in the modulator. The output of modulator in each phase gives the duty ratio command, d(t) which in turn applies voltage, vi (t) on the poles of the inverter. From the explanation of scalar control, two observations are made.
• Current at UPF with low THD is obtained. • There is no need of transforming to d-q reference frame for implementing the control. In Vector control, current at leading and lagging power factor is attainable by adjusting the d-axis reference. In Scalar control technique presented in this thesis, UPF operation is achieved. Analysis into the possibility of leading and lagging pf operation was beyond the scope of this thesis.
3.3. Scalar Control based FEC
3.3.2
83
Steady State Analysis
In steady state operation of the scalar control based converter, a phase shift is observed between the current and voltage under certain load conditions. An explanation was put forth for this behavior in Section 2.3.4.1. The analysis given in that section predicted the AC-DC Converter DC-DC Converter ton
tof f
Approximation error i0o io
io
Figure 3.23: Approximation error in Scalar control technique
amount of phase shift in the current from the current loop model using bandwidth analysis. An explanation is given here for the same from a steady state perspective. The derivation of the control law in eqn. 3.21 was based on Volt-second balance on the line inductor. If vg (t) and vi (t) are the fundamental voltages on either side of the inductor, then according to Volt-second balance, during each switching cycle, Ts vg (t) = vi (t)
(3.22)
From the single phase equivalent circuit of the VSI shown in figure 3.2, we have, vg (t) = vi (t) + ig (t)Xl
(3.23)
where, Xl is the inductive reactance. The term ig Xl present additionally in eqn. 3.23 causes the shift in the current with respect to the voltage. If the inductance is small, then this drop is negligible. This term is present in the KVL equation because the excitation for the power circuit is not DC but AC at 50 hz. This is pictorially shown in figure 3.23. In the figure, the current shown in dotted lines is the current which flows in a DC-DC converter. The current at the beginning (io ) and end (io ) of each switching cycle will be the same in this converter.
84
Chapter 3. Three phase Power Factor Correction Techniques
In the scalar control based converter, the behavior is different. The difference in the current at the two end-points (io and i0o ) is because the voltage source is varying at 50 hz. This is shown in solid lines in figure 3.23.
3.3.3
Modeling of power circuit
The small signal analysis of the scalar control based single phase PFC converter was carried out in Section 2.3.3. The same model can be used here because the plant of the single phase equivalent circuit is similar. The converter transfer functions used in the design of the controllers have been derived already in Section 2.3.3. The derivation of the plant model for the vector control based FEC was done in the revolving reference. In case of scalar control based FEC, the control is in the stationary reference frame. The plant model that is developed is shown in figure 3.24. The figure is a single phase
Controller Current Modulator vm
1 − ig R s vm 2
Plant VSI
d(t)
ig,f b (t)
vc (1 − 2d) 2
vc
vi (t)
1 L
vg (t)
ig (t)
Rl
Figure 3.24: Current loop model - Single phase equivalent representation
representation of the current loop. Comparing this with the q-axis current loop in figure 3.7, there is no current controller present explicitly in this case. Also, there is no explicit reference generation and triangle comparison as in the case of vector control. Instead, the duty ratio, d(t) obtained from the control law modulates the switches and voltage, vi (t) is applied on the poles of the inverter. The voltage loop model is shown in figure 3.25. In the voltage loop model, the current modulator is assumed to be a unity gain block using the equivalent current loop model of the modulator. The derivation of the current loop from the control law has been explained
3.3. Scalar Control based FEC
85
in Section 2.3.3.1. The voltage loop model of the vector control based FEC shown is shown Plant
Controller vm
vc,ref
?
ig Vm
ig,ref
ig
1
1 (1 − 2d) 2
id
Voltage Controller
vc,f b
vc
1 C
1 R
Current loop
Figure 3.25: Voltage loop model of Scalar control based three phase PFC converter in figure 3.9. The boost ratio of the q-axis current, iq to the DC link current, id , obtained v from the power balance condition between the two sides is 23 vgqc . In scalar control based converter, the boost ratio obtained from power balance is, 12 (1 − 2d), seen in figure 3.25. The plant model of the voltage loop is a current (id ) feeding a parallel RC network. The design of the controller is done in the next section.
3.3.4
Controller design
3.3.4.1
Voltage controller
The current controller design for the scalar control based FEC is not discussed because there is no current loop present explicitly. The current modulator has an inherent current controller. Only the voltage controller needs to be designed which is explained below.
vc,ref
Kv (1+sTv ) sTv
vc,f b
Voltage Controller
Plant
Controller
H2 (s) vm
ig Vm
ig
ig,ref
1
1 2 (1 − 2d)
G2 (s) id
R sRC+1
vc
Current loop
Figure 3.26: Closed loop model of Voltage controller alongwith plant The closed loop mode of the voltage controller and the plant is given in figure 3.26. The plant model of the voltage loop has a -20 dB/decade gain crossover behavior with corner
86
Chapter 3. Three phase Power Factor Correction Techniques
1 . A PI will be a suitable controller for this plant. The zero of the PI at 1 frequency RC Tv 1 . The gain of the PI controller, K is is designed to cancel the pole of the plant at RC v adjusted to give the desired bandwidth. The bode plot of the plant, G2 (s) and the forward
Gain, dB
path transfer function, G2 (s)H2 (s) is given in figure 3.27.
G2 (s) G2 (s)H2 (s)
Phase
1 RC
0o
log ω
log ω
-90o
Figure 3.27: Bode plot of plant and forward path transfer function of Voltage loop
3.3. Scalar Control based FEC
3.3.5
87
Simulation and Experimental results
The hardware described in Section 3.2.4 is used to verify the control technique proposed. The operating conditions of the converter is given below • Input voltage - 220 V (Phase-Neutral) • Output voltage - 700 V • Output power - 5 kW • Switching frequency - 10 khz • Line inductance - 15 mH • DC bus capacitance - 1650 uF Matlab-Simulink was used to simulate the system. The waveforms in figure 3.28 show the voltage and current in R- and Y-phase of the system when delivering full load of 5 kW. The harmonic spectrum of the current is shown in figure 3.29. The THD of the phase current is 0.3 %. The power factor is 0.98.
400
30
200
30
0
0
(2)
(2)
-200
-30
-400 0.40
0.42 Time(sec)
Current (A)
0
0
Voltage (V)
(1)
(1)
200
60
60
Current (A)
Voltage (V)
400
0.46
-60 0.48
(a) Input Voltage (1) and Current (2) - R phase
-200
-400 0.40
-30
0.42 Time(sec)
0.46
-60 0.48
(b) Input Voltage (1) and Current (2) - Y phase
Figure 3.28: Simulation results - Input voltage and current under full load The turn-on transients of the scalar control based FEC is shown in figure 3.30 under full load conditions. Channel 1 (Ch. 1) shows the build-up of the voltage to the reference of
88
Chapter 3. Three phase Power Factor Correction Techniques
Harmonic Currents as percentage of fundamental (%)
100 90 80
THD = 0.3 %
70 60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Figure 3.29: Harmonic spectrum of line current in simulation
Ch. 1 : Output voltage, scale:200V/Div., Ch. 2 : Voltage controller output, scale:5V/Div., Ch. 3 : R-Phase Voltage, scale:200V/Div., Ch. 4 : R-Phase current, scale:25A/Div. The build up of DC voltage is seen in Ch. 1. Output of voltage controller is seen in Ch.2 Input voltage and current in phase are seen in Ch. 3 and Ch.4 respectively. Figure 3.30: Start-up response of Scalar control based three phase PFC converter 700 V. Channel 2 (Ch. 2) shows the output of the voltage controller which settles down at a value corresponding to the output power demanded. Input voltage and current, in phase, are seen in Channel 3 (Ch. 3) and Channel 4 (Ch. 4) respectively. Line voltage and current in two phases while delivering full load of 5 kW is shown in figure 3.31. The current and voltage of R-phase shown in Channel 1 (Ch. 1) and Channel 2
3.3. Scalar Control based FEC
89
Ch. 1 : R-Phase voltage, scale:200V/Div., Ch. 2 : R-Phase current, scale:25A/Div., Ch. 3 : Y-Phase voltage, scale:200V/Div., Ch. 4 : Y-Phase current, scale:25A/Div. Currents and voltages in R- and Y- phase are shown. They are in phase with each other. Figure 3.31: Phase voltage and current under full load condition
Harmonic Currents as percentage of fundamental (%)
100 90 80
THD = 3.8 %
70 60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Figure 3.32: Harmonic spectrum of line current in experimental waveform
(Ch. 2), are in phase and the power factor is 0.99. The harmonic spectrum of the current waveforms is shown in figure 3.32. The THD of the current is 3.8 %. Waveforms for a step change in load from 100 % to 50 % and vice-versa is shown in figure 3.33. The load is connected as two parallel branches of resistors, 195 Ω each. Channel 1
90
Chapter 3. Three phase Power Factor Correction Techniques
(Ch.1) shows the step change of current in one of the resistor branches of the load. The DC voltage is seen in Channel 2 (Ch.2) which is regulated at 700 V. The output of the voltage controller, vm which controls the power handled by the converter is seen in Channel 3 (Ch.3). It is observed that this signal becomes half during the first step change of 100 % load to 50 % load. Similarly, it doubles during the second step change. This shows that the output of the voltage controller is an indication of the power handled by the converter. The line current in R-phase is seen in Channel 4 (Ch.4).
Ch. 1 : Load current, scale:5A/Div., Ch. 2 : Output voltage, scale:500V/Div., Ch. 3 : Voltage controller output, scale:2V/Div., Ch. 4 : R-Phase current, scale:10A/Div. Ch. 1 shows step change in load current. Regulation of output voltage at 700 V is seen in Ch. 2. Output of voltage controller changes according to the power handled as seen in Ch. 3. The change in R-phase current during step change in load current is seen in Ch. 4. Figure 3.33: Step change of load from 100 % to 50 % and vice-versa
3.4. Comparison of Vector and Scalar control techniques
3.4
91
Comparison of Vector and Scalar control techniques
The previous sections described the control philosophy and implementation details of vector and scalar control PFC techniques for a three phase boost rectifier. Both are constant switching frequency techniques. The steady state and dynamic performances of both techniques were studied. From the analysis made, scalar control was found to be more advantageous than vector control in the following aspects • Reduced number of feedback signals. • No need for phase transformations. • Simpler control strategy. The following features are observed in vector control of FEC • Leading and lagging power factor operation. • Bi-directional power flow. The analysis on the possibility of Scalar control providing the two features given above was beyond the scope of this thesis. In terms of control simplicity, it is observed that scalar control based FEC is more advantageous than vector control based FEC.
3.5
Conclusion
Two different PFC techniques for a three phase boost rectifier was described in this chapter. The first technique was the vector control or the synchronous reference frame approach. Power circuit modeling and control loop design for this technique was explained in detail. Experimental waveforms were also presented to validate the theory. The second technique that was proposed in this thesis is the scalar control. The differences between this method and vector control in the modeling of power circuit and controller design was explained. Simulation and experimental were also presented to validate the proposed method. From the analysis, it was inferred that the scalar control technique offered the advantages of control simplicity and reduced number of feedback signals over vector control technique.
92
Chapter 3. Three phase Power Factor Correction Techniques
Chapter 4 Three Phase Shunt Active Filter
4.1
Introduction
A Shunt Active Filter (SAF) is a Voltage/Current Source Inverter placed close to an AC voltage source in parallel to a system of reactive and non-linear loads. The SAF supplies the reactive and harmonic power demand of the system of loads. The current drawn from the source is sinusoidal at the fundamental frequency. Unlike the three phase rectifier, the SAF need not be rated for the total load on the system. This is because, the filter handles only reactive and harmonic power demanded by the load. The power circuit of the SAF is shown in figure 4.1. The Pulse Width Modulated VSI is controlled suitably to provide reactive and harmonic current compensation. This chapter presents two control techniques that were implemented using the DSP controller for control of the SAF. The first technique is based on the synchronous reference frame theory or vector control. The implementation of this technique is similar to vector control of FEC. The changes made for implementing this control are explained. Experimental waveforms highlighting the filtering action are presented. The second control technique that is proposed in this thesis is based on scalar control. The control philosophy of this technique is similar to the control of three phase rectifier based on scalar control. The equivalent circuit representation for harmonic current compensation is explained. Experimental waveforms are presented to validate the analysis. 93
94
Chapter 4. Three Phase Shunt Active Filter
vgr vgy vgb
Non-linear load
IM
Reactive load
S1
D1
S3
D3
S5
D5
vc 2
S4
D4
S6
D6
S2
D2
vc 2
Figure 4.1: Power circuit Configuration of Three phase Shunt Active Filter
4.2
Vector Control based SAF
Vector control based FEC was explained in section 3.2. The control philosophy of the vector control based SAF is also based on the transformation to the synchronously revolving d-q reference frame, as in the case of FEC. The difference here is in power circuit arrangement and the generation of current reference.
4.2.1
Principle of Operation
The power circuit and the controller of the vector control based SAF is shown in figure 4.2. The Pulse Width Modulated VSI in the current-controlled mode acts as the SAF. The utility supplies real power to nonlinear (diode-bridge rectifier) and reactive (induction motor) loads. The diode-bridge rectifier injects lower-order harmonics into the utility and the induction motor draws reactive power from the source, reducing the input power factor. By control of
4.2. Vector Control based SAF
95
the VSI, compensation for the harmonic and reactive currents drawn by the load is achieved. The input current drawn from the source is sinusoidal in phase with the input voltage. As shown in figure 4.2, the feedback signals needed for implementing vector control are vgr vgy vgb
Non-linear load
IM VSI
Reactive load
vc
Feedback signals DSP Based Controller
Figure 4.2: Power and control circuit of three phase Vector control based SAF
• Load currents. • Filter currents. • Input voltages. • DC bus voltage. The control structure of the VSI in the vector control based SAF is similar to that of FEC. There is an outer voltage loop which regulates the DC bus voltage. The inner current loops control the filter currents in the d-q reference frame. The control desires the following • Constant DC bus voltage.
96
Chapter 4. Three Phase Shunt Active Filter
• Reactive current compensation. • Harmonic current compensation. The first control objective of the SAF, is met by using a voltage controller. The DC bus voltage regulation is needed to enforce a particular voltage on the poles of the inverter. The voltage controller’s output is indicative of real power drawn by the SAF. The real power drawn by the SAF meets the conduction and switching losses in the devices. The following sections describe reactive and harmonic current compensation by the SAF. 4.2.1.1
Reactive current compensation
The second control objective, is to achieve reactive current compensation by using the filter. This is explained with the single phase equivalent circuit shown in figure 4.3. Let, v g be the
ig
ii il
vg vi
Figure 4.3: Single phase equivalent ciruit of three phase SAF input phase voltage, ig be the current drawn from the source, il be the load current which contains both harmonic and reactive components, vi be the fundamental component of the PWM voltage applied on the poles of VSI and ii be the current drawn by the VSI. Let, il ii ig = ila
ilr
vg
il
Figure 4.4: Phasor diagram of single phase equivalent circuit of three phase SAF
4.2. Vector Control based SAF
97
phasor lag the phase voltage phasor, vg for a particular load. The phasor diagram of this condition is shown in figure 4.4. The load current, il is resolved into mutually perpendicular components, active current, ila and reactive current, ilr as shown in the figure. The control desires that only ila come from the supply. The reactive current, ilr (=−ii ) needs to be supplied by the SAF. Section 3.2.1 explained that by controlling the pole voltage, v i it is possible to control the phase and magnitude of the filter current, ii . Current-controlled PWM of the Voltage Source Inverter ensures desired vi . The current control of the VSI is done in the synchronously revolving d-q reference frame. β q ω
d Input voltage space phasor, vg
θ
α
Figure 4.5: Stationary (α-β) and revolving (d-q) reference frames
The orientation of the d-q reference frame is such that, the q-axis coincides with the input voltage space phasor, vg as shown in figure 4.5. Let the load current, il have reactive and harmonic components. Phase transformations are applied to extract the reactive component of il . The load current in the stationary α-β reference frame, ilα and ilβ , is transformed to the revolving d-q reference frame. Let ilq and ild be the q-axis and d-axis components of il respectively. The d-q reference frame is revolving in the anti-clockwise direction at the fundamental frequency, ω = 50 hz. The fundamental frequency active component of the load
ilr Load ily Currents
ilb
3-φ
ilα
α-β
to
ilβ
to
α-β
d-q
ilq ild
LPF
ild,f und
Figure 4.6: Extraction of fundamental frequency reactive current drawn by the load
98
Chapter 4. Three Phase Shunt Active Filter
current appears a DC term in q-axis. The fundamental frequency reactive component of the load current appears as a DC term in d-axis. The fundamental active current demanded by the load is supplied by the voltage source. The fundamental reactive current demanded by the load, can be extracted by using a Low Pass Filter (LPF) on the d-axis current, as shown in figure 4.6. Control of the SAF ensures that extracted d-axis component, i ld,f und is supplied by the SAF. Thus, reactive current compensation is achieved in SAF. 4.2.1.2
Harmonic current compensation
The third objective of the controller, is to compensate the harmonic currents demanded by the load. The SAF compensates the harmonics present in the load and only the fundamental frequency active component of load current is supplied by the source. The harmonics present in the load is evaluated to compensate the same. The technique of extracting the harmonics in the load current is explained below. Let the load current, il have harmonic components i5l , i7l , i11l , i13l etc. where, inl represents the nth harmonic component. Since the load is three phase balanced, triplen harmonics are absent in the load current. To extract the harmonics present in the load, phase transformation is applied to the sensed
ilr Load ily Currents
ilb
3-φ
ilα
α-β
to
ilβ
to
α-β
d-q
ilq
HPF
ilq,harm
ild
HPF
ild,harm
Figure 4.7: Extraction of harmonics in load current
load current. Let, ilq and ild be the q- and d-axis components of il respectively. The d-q reference frame is revolving in the anti-clockwise direction at the fundamental frequency, ω = 50 hz. The fundamental and harmonic components of the load current in the stationary reference frame appear at a different frequency in the revolving reference frame. The fundamental frequency component of the line currents appear as DC terms in the d-q reference frame. The 5th and 7th harmonic terms appear at the 6th harmonic frequency of 300 hz. The 11th and 13th harmonic components appear at the 12th harmonic frequency of 600 hz and so on.
4.2. Vector Control based SAF
99
For harmonic compensation in the revolving reference frame, the SAF needs to supply only the high frequency ripple terms of ilq and ild . A High Pass Filter (HPF) is used to extract the harmonics present in ilq and ild as shown in figure 4.7. The SAF supplies ilq,harm and ild,harm so that the current drawn from the source, ig has predominant fundamental frequency component. The third control objective of harmonic current compensation is thus achieved. In vector control based SAF shown in figure 4.8, the same control structure as that of FEC ilr cos θ sin θ
vgr vgy vgb
iir igr ily
i0iq,ref
vc,ref
vc,f b
iiq,ref
Voltage Controller
viq,ref d-q vid,ref to q-axis 3-φ Controller
vir viy vib
igy iiy
ilb
iiq,f b vc
ilq,harm
ilq,f b
HPF
igd,ref
iid,ref
vc,f b ilq,f b ild,f b d-axis Controller
ild,f b
iid,f b
3-φ to d-q
iiq,f b iid,f b sin θ
vc ilr ily iir iiy
Feedback signals
cos θ
Unit Vector Gen.
Controller
igb iib
vg,ry vg,yb
Plant
Figure 4.8: Block diagram representation of Vector control based SAF is retained with some modifications. The voltage controller controls real power drawn by the filter. Though the SAF supplies only reactive and harmonic power demanded by the load, real power is needed to compensate the conduction and switching losses of the devices in the VSI. The generation of current reference for q- and d-axis is explained in detail in next section. The output of the current controllers, give the voltage references, viq,ref and vid,ref for the modulators. These references are transformed from d-q reference frame to three phase. The
100
Chapter 4. Three Phase Shunt Active Filter
three references are compared with the high frequency triangular carrier to generate the gate drive for switches. Input voltages, vg,ry and vg,yb , are sensed to generate sin θ and cos θ which are needed for the phase transformations. DSP controller based on the Texas Instruments TMS320LF2407 processor is used for implementing the control.
4.2.2
Modeling of Power Circuit
The power circuit modeling of the three phase VSI was done in section 3.2.2. The power circuit model is done here again to give a quick reference. The only difference between the plant model of the FEC and the SAF is that, in case of FEC, the source current, ig and the VSI current, ii are the same. In case of SAF, the source current, ig and filter current, ii are different. In the stationary reference frame, the AC side voltage equation for the three phases can be written by applying KVL to the single phase equivalent circuit as shown in figure 4.3. vgr = vir + iir Rl + L
diir dt
(4.1)
diiy (4.2) dt diib vgb = vib + iib Rl + L (4.3) dt where, L is the line inductance and Rl is the resistance of the line inductance. The other vgy = viy + iiy Rl + L
terms used are as given in figure 4.3. The same equation can be written by transforming from three phase R-Y-B system to two-phase α − β system. The orientation is done such
that α-axis coincides with R-phase voltage phasor. The equations after this is done is as shown below
diiα (4.4) dt diiβ vgβ = viβ + iiβ Rl + L (4.5) dt The two equations given above can be written in terms of space phasors as given below vgα = viα + iiα Rl + L
v g = v i + i g Rl + L
dii dt
(4.6)
where, vg = vgα + vgβ . vi and ii are similarly represented in eqn. 4.6. The equations are in the stationary reference frame. We substitute for the α and β components of the system variables in eqn 4.4 and eqn. 4.5 with d-q variables of the revolving reference frame. The
4.2. Vector Control based SAF
101
relationship between the variables in the α − β reference frame and the d-q reference frame
is given below
[vgα + vgβ ] = [vgq + vgd ]eθ
(4.7)
After substituting α − β reference frame variables by d-q variables, eqn. 4.6 reduces as shown below.
vgq eθ = (viq + vid )eθ + L
i h dθ d [iiq + iid ] eθ + L [iiq + iid ] eθ + Rl (iiq + iid )eθ dt dt
(4.8)
Multiplying eqn. 4.8 by e−θ we move from the stationary reference frame to the synchronously revolving reference frame. On separating the real and imaginary terms, we get the two plant equations for q-axis and d-axis as shown below Rl iiq + viq + L
diiq − ωLiid = vgq dt
(4.9)
diid + ωLiiq = 0 (4.10) dt The equations given above are the q- and d-axis plant equations. The two equations are Rl iid + vid + L
not decoupled from each other. A term involving igd , ωLigd is present in the q-axis plant equation and a term involving igq , ωLigq is present in the d-axis plant equation. Feed-forward of these terms is done in the current controllers to decouple q- and d-axis control. The current Controller iiq,ref
Plant
viq,ref
iiq,f b
viq
?
G
q-axis Controller
VSI
1 L vgq
ωLiid
iiq
Rl
Figure 4.9: q-axis current loop model of Vector control based SAF controller makes the actual current, iiq track the reference current, iiq,ref effectively. The VSI is modeled as a gain block, G. The plant model of the 2 current loops alongwith the controller is shown pictorially in figure 4.9 and figure 4.10. In the design of the voltage loop, the current loop is assumed to be a unity gain block. In case of FEC, the DC side of the voltage loop was represented by the DC link current,
102
Chapter 4. Three Phase Shunt Active Filter
Plant
Controller iid,ref
vid,ref
iid,f b
vid
?
G
d-axis Controller
VSI
1 L
-1
ωLiiq
iid
Rl
Figure 4.10: d-axis current loop model of Vector control based SAF
id feeding an RC network. In case of SAF, there is no load, R present. An equivalent resistance, Req indicative of the losses of the VSI is used in the model. The output of the voltage controller demands a particular q-axis current. The relationship between the q-axis filter current, iiq and the DC link current, id is found by using power balance relationship between the two sides [11]. The model of the voltage loop is as shown in figure 4.11.
Controller vc,ref
iiq,ref
? vc,f b
Plant iiq
1
2 vgq 3 vc
Voltage Controller
id
1 C
vc
1 Req
Figure 4.11: Voltage loop model of Vector control based SAF
4.2.3
Current Reference Generation
Before the design of controllers is explained, the generation of references for the q- and d-axis current loops is discussed. In vector control based FEC, output of the voltage controller was the reference for the q-axis current loop. The d-axis reference current was set in open loop. For the SAF, the extracted harmonic and reactive currents in the load are added to the qand d-axis references as explained below. The output of the voltage controller, i0iq,ref is the current reference for the q-axis controller.
4.2. Vector Control based SAF
103
i0iq,ref
vc,ref
iiq,ref vc,f b ilr
3-φ
ily
to
ilb
d-q
Voltage Controller ilq,harm
ilq
-1
HPF
ild
Figure 4.12: Generation of q-axis current reference
i0iq,ref is indicative of the real power demanded by the SAF to meet its losses. Besides this current, the SAF needs to supply the extracted q-axis harmonic currents, ilq,harm of the load. The negative of ilq,harm is added to the output of the voltage controller. This acts as the reference for the q-axis current loop as shown in figure 4.12. The d-axis reference for source current, igd,ref is set in open-loop as in case of FEC. This reference determines the phase relationship between vg and ig . If Unity Power Factor operation is desired in the source, then igd,ref is zero. The d-axis current reference for SAF, iid,ref needs to be found. The SAF supplies the harmonic as well as reactive currents demanded by the load. The negative of the extracted harmonics and reactive currents of the d-axis load current, ild is added to igd,ref to generate iid,ref as shown in figure 4.13. This gives igd,ref ilr
3-φ
ily
to
ilb
d-q
iid,ref
ilq
ild
-1
Figure 4.13: Generation of d-axis current reference - Harmonic and reactive compensation the reference for both harmonic and reactive compensation. If exclusive harmonic/reactive current compensation is desired, then the generation of iid,ref is suitably modified as shown in figure 4.14. For exclusive reactive current compensation, the DC component of i ld is filtered using an LPF and is used in the generation of iid,ref . For exclusive harmonic current compensation, a HPF is used to filter the high frequency ripple component of ild and is used in the generation of iid,ref .
104
Chapter 4. Three Phase Shunt Active Filter
igd,ref
ily
to
ilb
d-q
ilq
ild
HPF
ild,harm
ilr
3-φ
ily
to
ilb
d-q
Harmonic current Compensation only
ilq
iid,ref
-1
3-φ
-1
ilr
igd,ref
iid,ref
LPF
ild
ild,f und
Reactive current Compensation only
Figure 4.14: Independent Harmonic and reactive current compensation
4.2.4
Controller design
4.2.4.1
Current controller
The design of the q-axis current controller is explained in this section. The structure of the q-axis current loop alongwith the controller is shown in figure 4.15. The difference between the current controller design of the SAF and FEC is in the nature of the q-axis and d-axis current reference. In FEC, the q-axis current reference is a DC quantity in steady state. In case of SAF, the current reference in steady state is not a DC quantity but is varying at the frequency of the harmonics which the SAF compensates. The bandwidth of the controller needs to be high to track this reference signal. Similar to the FEC, feed-forward of cross-coupling terms is done here. The term ωLi id Controller i0iq,ref
iiq,ref Ki (1+sTi ) sTi
ilq,harm HPF
iiq,f b
q-axis Controller
0 viq,ref
Plant
viq,ref -1
viq
iiq 1 Rl (1+sTl )
G VSI
vgq G
ωLiid G
vgq ωLiid
ilq,f b
Figure 4.15: Closed loop model of q-axis current controller alongwith plant is the q-axis cross-coupling term. A similar term, ωLiiq is observed in the d-axis plant equation. Feed-forward of these terms to the controllers, makes the control of q- and d-axis currents decoupled. After the cross-coupling terms are canceled, the resultant signal, v iq,ref is converted to three phase quantity for comparison with the sine-triangle based carrier.
4.2. Vector Control based SAF
105
A PI will be a suitable controller for the plant shown in figure 4.15. The zero of the PI controller at T1 cancels the pole contributed by the line inductance, L and its resistance, Rl . i The gain of the PI controller, Ki is adjusted to achieve desired bandwidth. The bandwidth of the current controllers need to be high to track the high frequency q- and d-axis reference current effectively. The design of the d-axis current loop is done in a similar fashion. 4.2.4.2
Voltage controller
H2 (s) vc,ref
Kv (1+sTv ) sTv
vc,f b
Plant
Controller
iiq
iiq,ref
1
2 vgq 3 vc
G2 (s) id
Req sReq C + 1
vc
Voltage Controller
Figure 4.16: Closed loop model of Voltage controller alongwith plant The design of the voltage controller is done with the voltage loop structure as shown in figure 4.16. The inner q-axis current loop is assumed to be unity gain block in the design of the voltage loop. A PI will be a suitable controller for this plant. The zero of the PI controller, T1 cancels the pole at R 1 C . The gain of the PI controller, Kv is adjusted to v eq achieve desired bandwidth. The bode plot of the plant, G2 (s) and the forward path transfer,
Phase
Gain, dB
G2 (s)H2 (s) function is shown in figure 4.17.
G2 (s) G2 (s)H2 (s) 1 = 1 Tv Req C
0o
log ω log ω
-90o
Figure 4.17: Bode plot of plant and forward path transfer function of voltage loop
106
4.2.5
Chapter 4. Three Phase Shunt Active Filter
Experimental results
The vector control technique for SAF is validated in hardware. The power device used was an IGBT based IPM. The operating conditions of the filter are given below • Input voltage - 173 V (Line-Line) • DC bus voltage - 500 V • Output power - 1 kW • Switching frequency - 10 khz • Line inductance - 15 mH The filter was tested using a three phase diode-bridge rectifier load. A resistive load of 1 kW was connected across the output of the diode-bridge circuit. The controller was developed using TMS320LF2407 processor. The feedback signals needed for implementing the control are the load currents, filter currents, input voltages and the DC bus voltage. The sensed signals are scaled to the control level and shifted before being read by the ADC of the processor. The scaling of the signals are based on the per-unitisation given below • Voltage scaling - 1 p.u = 500V • Current scaling - 1 p.u = 6.25 A The input phase voltage and current, when the diode-bridge rectifier is supplying load of 1 kW is shown in Channel 1 (Ch. 1) and Channel 2 (Ch. 2) respectively of figure 4.18. In this case, the SAF is not operational and the line current has a high harmonic current. The harmonic spectrum of the line current is shown in figure 4.19. The THD of the input current without filtering is found to be 27.3 %. The input phase voltage and current after filtering by the SAF is shown in Channel 1 (Ch. 1) and Channel 2 (Ch. 2) respectively of figure 4.20. The sudden jumps in the current as seen in figure 4.18 are absent here. The filter supplies the harmonic currents demanded by the load. The line current has a predominant fundamental component. The harmonic spectrum of the line current after filtering is shown in figure 4.21. The THD of the current after filtering reduces to 12 %.
4.2. Vector Control based SAF
107
Ch. 1 : R-phase voltage, scale:100V/Div., Ch. 2 : R-phase current, scale:5A/Div. Input voltage and current in a particular phase of the diode-bridge rectifier is shown. Input current has high harmonic current. Figure 4.18: Input voltage and current in R-phase of supply, feeding a diode-bridge rectifier
Harmonic Currents as percentage of fundamental (%)
without SAF operational
100 90 80
THD = 27.3 %
70 60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Figure 4.19: Harmonic spectrum of line current of supply, feeding a diode bridge rectifier current without filtering by SAF
The current drawn by the SAF, ii the diode-bridge current, il and the source current, ig in a particular phase are seen in figure 4.22. The sum of the SAF current seen in Channel 1 (Ch. 1) and the diode-bridge current seen in Channel 2 (Ch. 2) gives the source current
108
Chapter 4. Three Phase Shunt Active Filter
Ch. 1 : R-phase voltage, scale:100V/Div., Ch. 2 : R-phase current, scale:5A/Div. Input voltage and current in a particular phase of the input after filtering by SAF is seen here. Input current has a strong fundamental component of current. Figure 4.20: Input voltage and current in R-phase of supply, feeding a diode-bridge rectifier
Harmonic Currents as percentage of fundamental (%)
with SAF operational 100 90 80 70
THD = 12 %
60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Figure 4.21: Harmonic spectrum of line current of supply, feeding a diode bridge rectifier current with filtering by SAF in Channel 3 (Ch. 3). The source current is sinusoidal except for the glitches which occur at the discontinuities of the diode-bridge current. The extent of filtering of the load current is governed by the bandwidth of the q- and d-axis current controllers. The waveforms in figure 4.23 show the q- and d-axis components of reference current and the
4.2. Vector Control based SAF
109
Ch. 1 : R-phase SAF current, scale:2.5A/Div., Ch. 2 : R-phase diode-bridge current, scale:5A/Div., Ch. 3 : R-phase line current, scale:5A/Div. SAF and diode-bridge current is shown in Ch. 1 and Ch. 2. The sum of two currents gives the line current seen in Ch. 3. Figure 4.22: Load, Shunt Active Filter and Input current
Ch. 1 : iiq reference current, scale:2.5A/Div., Ch. 2 : iiq actual current, scale:2.5A/Div., Ch. 3 : iid reference current, scale:6.25A/Div., Ch. 4 : iid actual current, scale:6.25A/Div. The q- and d-axis current references are shown in Ch. 1 and Ch. 3. The actual qand d-axis currents in Ch. 2 and Ch. 4 follow the reference currents closely. Figure 4.23: Reference and actual currents in q- and d-axis of SAF
110
Chapter 4. Three Phase Shunt Active Filter
actual current drawn by the filter. The q- and d-axis current references, shown in Channel 1 (Ch. 1) and Channel 3 (Ch. 3) respectively, are observed to be at sixth harmonic frequency of 300 hz. This is because, the predominant harmonics in the load current are the 5th and 7th . The components of these two frequencies in the revolving d-q reference frame will be at the sixth harmonic frequency of 300 hz. The actual q-axis current, iiq and d-axis current, iid seen in Channel 2 (Ch. 2 ) and Channel 4 (Ch. 4) respectively, track the reference currents closely.
4.3. Scalar control based SAF
4.3
111
Scalar control based SAF
Scalar control based three phase SAF is discussed in this section. The advantages of this method over the vector control based SAF are • Reduced number of feedback signals. • Simple control strategy. • No need of phase transformations. The control philosophy of this control technique is same as the scalar control based three phase rectifier. The principle of operation of this converter is explained in the sections below.
4.3.1
Principle of operation vgr vgy vgb
Non-linear load
IM VSI
Reactive load
vc
Feedback signals DSP Based Controller
Figure 4.24: Power and control circuit of Scalar control based three phase SAF
The power and control circuit configuration of the scalar control based three phase SAF is shown in figure 4.24. The power circuit, shown as VSI in the figure, is the H-bridge configuration as shown in figure 4.1. As in the case of the three phase rectifier, Pulse Width
112
Chapter 4. Three Phase Shunt Active Filter
Modulation strategy is applied on the VSI. The controller takes the following signals as feedback information for implementing the control • Source currents. • DC bus voltage. The control structure of the scalar control based SAF is similar to that of the rectifier. The objectives of the control are given below • Regulation of DC bus voltage. • Sinusoidal input current in phase with the input voltage. The first control objective of the converter is to maintain constant DC bus voltage, v c . This function is accomplished by using a voltage controller. The SAF supplies only harmonic and reactive currents to the load. The filter draws real power to meet the conduction and switching losses in the devices. The second control objective of the converter is to obtain sinusoidal input current, i g (t)
vc 2
d ig
L vi
vg
il
ii
vc 2
d
Load
SAF
Figure 4.25: Single phase equivalent circuit of Scalar control based three phase SAF
in phase with the input voltage, vg (t). Harmonic and reactive current compensation are achieved simultaneously. The single phase equivalent circuit of the VSI is shown in figure 4.25. In the figure, il is the current drawn by the load, ii (t) is the current drawn by the SAF and vi (t) is the fundamental component of the voltage applied on the poles of the VSI.
4.3. Scalar control based SAF
113
The objective of the current control is to make the current drawn from the source, i g (t) sinusoidal at the fundamental frequency, in phase with the input voltage, vg (t). The current control desires that the entire system, that is, the load and the SAF emulate a resistance. This relationship is shown below vg (t) = ig (t)Re
(4.11)
where, Re is indicative of the real power drawn from the source. On applying Volt-second balance on the line inductance we get, vg (t) =
vc [1 − 2d(t)] 2
(4.12)
where, d(t) is the duty cycle of the bottom device in the inverter leg shown in figure 4.25. The quantities vg (t), ig (t) and d(t) are sinusoidally varying at 50 hz. From eqn. 4.11 and eqn. 4.12, we get the duty ratio control law for the switches as given below d(t) =
1 ig (t)Rs − 2 Vm
(4.13)
The bottom device in each leg of the VSI is switched according to this expression. The complementary signal, d(t), with a finite dead time is given to the top device in the leg. The control law shown above is the same for the three phase rectifier also. The difference between the two is that, the rectifier handles the entire real power demanded by the load but the SAF handles only the reactive and harmonic current demand of the load. The fundamental active power for the load is supplied by the source. The control structure of the SAF is shown in figure 4.26. The voltage controller regulates the bus voltage, vc . The output of the voltage controller, vm controls the amount of real power drawn from the source by the SAF. The modulator uses the control law in eqn. 4.13 and determines the duty ratio of the switches. The control is done in the stationary reference frame. A suitable voltage, vi is applied on the poles of the inverter to compensate the harmonics and reactive power demanded by the load. This completes the discussion on the control structure of the SAF.
114
Chapter 4. Three Phase Shunt Active Filter
Controller
Plant
R-phase Mod. 1 igr Rs dr 2 − vm
ilr vgr vgy vgb
vm Voltage Controller
igr ily
vir
Y-phase Mod. vc,ref
iir
Power Converter
igr,f b
viy
1 igy Rs dy 2 − vm
vib
igy iiy
igy,f b
ilb
vc,f b B-phase Mod. 1 igb Rs 2 − vm igb,f b
igb
vc
iib
db
vc,f b igr,f b igy,f b
vc vc igr igy
Feedback signals
Figure 4.26: Block diagram representation of scalar control based three phase SAF
4.3.2
Modeling of power circuit
Modeling of the power circuit of the scalar control based three phase rectifier was done in section 3.3.3. The same power circuit model is used here. The small signal analysis is done in the next section for SAF because the bandwidth of the current modulator is crucial for effectively compensating the harmonics in the load. The plant model of the voltage loop is developed in this section to aid in the design of the voltage controller. The voltage loop model of the vector control based SAF shown is shown in figure 4.27. The inner current modulator is assumed to be a unity gain block in the design of the voltage loop. In case of scalar control based rectifier, the load resistance, R was present across the DC bus. In SAF, there is no load present across C. An equivalent resistance, Req representing the active power consumed by the SAF for meeting its device losses is used in the model. The boost ratio obtained from power balance is, 12 (1 − 2d), seen in figure 4.27. The plant
4.3. Scalar control based SAF
115
model of the voltage loop is a current (id ) feeding a parallel RC network. The design of the controller is done in the next section.
Controller vc,ref
vm
? vc,f b
ig Vm
ig,ref
Plant ig
ii
1
Voltage Controller
1 (1 − 2d) 2
id
il
Current loop
vc
1 C
1 Req
Figure 4.27: Voltage loop model in Scalar control based three phase SAF
4.3.3
Controller design
4.3.3.1
Current controller
The small signal analysis of the scalar control based single phase rectifier was carried out in section 2.3.3. The model is repeated here to provide a quick reference. The control law as given in eqn. 4.13 is rewritten below d=
1 ig Rs − 2 Vm
(4.14)
ˆ vˆm and ˆig represent the This control law equation is perturbed about the operating point. d, small signal variations of the system variables about the operating point. On applying small signal perturbation to eqn. 4.13, we get the small signal relationship between the system
vˆm
ig Rs Vm2
dˆ
ˆig dˆ
iˆg
Rs Vm
Figure 4.28: Current modulator representation in Scalar control based three phase SAF
116
Chapter 4. Three Phase Shunt Active Filter
variables as given below
"
#
·
¸
Rs ˆ ig Rs vˆm − ig dˆ = 2 Vm Vm
(4.15)
Rs can be The modulator is represented pictorially as shown in figure 4.28. The gain block V m moved to the forward path in figure 4.28. The current modulator model after this is done is shown in figure 4.29. The model shown here is an equivalent current loop representation of the current modulator. The bandwidth of the current modulator can be found using this current loop model. The bandwidth of the current modulator for the single phase scalar control based rectifier
vˆm
ig Vm
ˆig,ref
ˆig,err
H1 (s) Rs Vm
G1 (s) dˆ
ˆig dˆ
ˆig
ˆig,f b Controller
Plant
Figure 4.29: Current loop model of the modulator in Scalar control based SAF - Single phase representation
was evaluated using the current loop model in section 2.3.4.1. The frequency of current reference in the current loop model of the rectifier is 50 hz. In case of SAF, the current reference shown in figure 4.29, ˆig,ref has both reactive component and harmonic components. The frequency of the reactive component of current is 50 hz. The current reference also has components of the harmonics which it has to compensate. The predominant harmonics in a balanced three phase load are 5th , 7th and 11th , 13th . The reference current in the current loop model of SAF has all these frequency components. The bandwidth of the current modulator for the SAF needs to be at-least an order greater than these frequencies to effectively compensate them. Because of the reason mentioned above, the bandwidth of the current modulator in the SAF is more crucial for harmonic compensation than reactive current compensation. To find the ˆi closed-loop bandwidth, the plant transfer function, ˆg needs to be evaluated. The harmonics d ˆig equivalent circuit is used to find ˆ . d
4.3. Scalar control based SAF
117
The voltage source is a short circuit for harmonic currents. The load is modeled as a current sink. By principle of superposition, we can open the current sink representing the load. The equivalent circuit for harmonics reduces to a voltage source feeding an inductance as shown in figure 4.30. On applying KVL to the circuit, the plant transfer function is found to be
ˆig
ˆ c dV
Figure 4.30: Equivalent circuit of the SAF for harmonic components
G1 (s) =
ˆig (s) Vc = ˆ sL d(s)
(4.16)
The P controller shown in figure 4.29 is given by, H1 (s) =
Rs Vm
(4.17)
The closed loop transfer function of the current modulator is found by substituting for G 1 (s) and H1 (s) from eqn. 4.16 and eqn. 4.17 respectively. ˆig (s) 1 ¸ · = ˆig,ref (s) LVm 1+s R V
(4.18)
s c
In the expression given above, output of the voltage controller, Vm , is constant because real power loss in the filter is constant. Rs , is the current sense resistor which is constant. We can conclude that, bandwidth of the modulator is dependent on the line inductance, L and the DC bus voltage, Vc . Reference [4] gives some insight into the criteria for choosing the inductance. Lower the value of L, better will be the harmonic compensation by the SAF. 4.3.3.2
Voltage controller
The voltage loop model of the scalar control based SAF alongwith the controller is shown in figure 4.31. As explained earlier in section 4.3.2, there is no load R present across the DC
118
Chapter 4. Three Phase Shunt Active Filter
Plant
Controller
G2 (s) vm
vc,ref
vc,f b
ig Vm
ig,ref
ig
ii
1
Voltage Controller Current loop
1 (1 − 2d) 2
id
Req sReq C + 1
vc
il
Figure 4.31: Voltage loop model of Scalar control based SAF
bus. An equivalent resistance, Req is placed across C. Req is an indication of the amount of real power consumed by the filter to meet its losses. The inner current loop is modeled as a unity gain block as seen in the figure. A PI will be a suitable controller for this plant. The zero of the PI controller cancels the pole contributed by the plant transfer function, R 1 C . The gain of the PI controller is adjusted eq to achieve desired bandwidth.
4.3. Scalar control based SAF
4.3.4
119
Experimental results
The hardware described in section 4.2.5 is used to verify the control technique. The operating conditions of the converter is given below • Input voltage - 173 V (line-line) • DC bus voltage - 400 V • Switching frequency - 20 kHz The feedback signals needed for implementing the control are the line currents and the DC bus voltage. Texas Instruments DSP TMS320LF2407 was used to implement the control. The SAF based on scalar control does both reactive and harmonic current compensation. In order to verify reactive current compensation, a three phase induction motor load was connected to the utility and the SAF supplied the reactive current demand of the motor. The rating of the motor is given below • Input voltage - 415 V (line-line) • Rated current - 4.9 A • Output power - 2.2 kW The motor is operated at 173 V (line-line). The phase voltage and the current drawn by the motor when the SAF is not operated is shown in Channel 1 (Ch. 1) and Channel 2 (Ch. 2) respectively of figure 4.32. It is observed in this figure that the phase current is lagging the phase voltage by 72o . The power factor under this condition is 0.3. The waveforms in figure 4.33 show the phase voltage and current in Channel 1 (Ch. 1) and Channel 2 (Ch. 2) respectively when the SAF is operational. It is seen in this case that the voltage and current are in phase. The input power factor is close to unity. The magnitude of the current has not changed from the previous case. The SAF only supplies the reactive current demanded by the load and the active current is supplied by the source. The current drawn by the induction motor in Channel 1 (Ch. 1), the filter current in Channel 2 (Ch. 2), the current drawn from the line in Channel 3 (Ch. 3) and phase voltage in Channel 4 (Ch. 4) is shown in figure 4.34. It is seen in this figure that the filter draws a leading current to compensate the lagging current drawn by the motor. The SAF supplies
120
Chapter 4. Three Phase Shunt Active Filter
Ch. 1 : R-phase voltage, scale:100V/Div., Ch. 2 : R-phase current, scale:1.25A/Div. Input voltage and current in R-phase of the induction motor is shown when SAF is not operated. Input current is lagging the voltage by a phase angle of 72 o . Figure 4.32: Induction motor voltage and current without SAF operational
Ch. 1 : R-phase voltage, scale:100V/Div., Ch. 2 : R-phase current, scale:1.25A/Div. Input voltage and current in R-phase of the induction motor is shown when the SAF is in operation. Input current is in phase with the voltage. Figure 4.33: Induction motor voltage and current with SAF operational
4.3. Scalar control based SAF
121
the reactive power demanded by the load. The current drawn from the source remains sinusoidal in phase with the input voltage. The compensation by the SAF for harmonics in the load is explained with the waveforms
Ch. 1 :R-phase current - motor, scale:2A/Div., Ch. 2 :R-phase current - SAF, scale:2A/Div., Ch. 3 : R-phase line current, scale:1.25A/Div., Ch. 4 : R-phase voltage, scale:200V/Div. The current drawn by the motor and the SAF are seen in Ch. 1 and Ch.2 respectively. The sum of these two currents gives the line current which is seen in Ch. 3. Figure 4.34: Motor current, SAF current, Input current and voltage with SAF operational given below. A three phase diode-bridge rectifier is connected to the AC source. The SAF supplies the harmonic currents demanded by the load so that the current drawn from the source remains sinusoidal. The input phase voltage and current in two phases of the diodebridge rectifier while delivering a load of 250 W is seen in figure 4.35. The harmonic spectrum of the R- and Y-phase currents in Channel 2 (Ch. 2) and Channel 4 (Ch. 4) respectively, is shown in figure 4.36. The THD of the current is found to be 29 %. The line voltage and line current waveforms when the SAF is operational is seen in figure 4.37. The SAF supplies the harmonic current demanded by the load so only the fundamental frequency active current comes from the source. The lesser the value of the inductance, better will be the harmonic compensation by the SAF. The value of the inductance chosen is also dependent on the maximum switching frequency of the converter. The maximum value at which the VSI can safely switch is 20 khz. The value of inductance chosen for this frequency of switching is 4 mH. The harmonic spectrum of the current after compen-
122
Chapter 4. Three Phase Shunt Active Filter
Ch. 1 : R-phase voltage, scale:200V/Div., Ch. 2 : R-phase current, scale:1.25A/Div., Ch. 3 : Y-phase voltage, scale:100V/Div., Ch. 4 : Y-phase current, scale:1.25A/Div. Input voltage and current in R- and Y-phase of the supply when a diode-bridge rectifier is connected to it. Lower order harmonic content is observed in the current waveform. Figure 4.35: Input voltage and current in R- and Y-phase of supply feeding a diode-bridge
Harmonic Currents as percentage of fundamental (%)
rectifier without SAF operational
100 90 80 70
THD = 29 %
60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Figure 4.36: Harmonic spectrum of line current, feeding diode-bridge rectifier without filtering by SAF
4.3. Scalar control based SAF
123
sation by the SAF is shown in figure 4.38. The THD of the compensated current is 11 %.
Ch. 1 : R-phase voltage, scale:100V/Div., Ch. 2 : R-phase current, scale:1.25A/Div., Ch. 3 : Y-phase voltage, scale:100V/Div., Ch. 4 : Y-phase current, scale:1.25A/Div. Input voltage and current in R- and Y-phase of the supply when SAF is operational. Harmonics are not observed in the line current waveform in the two phases. Figure 4.37: Input voltage and current in R- and Y-phase of supply, feeding a diode-bridge
Harmonic Currents as percentage of fundamental (%)
rectifier with SAF operational
100 90 80
THD = 11 %
70 60 50 40 30 20 10 100 200 300 400 500 600 700 800 900 1000 Frequency (hz)
Figure 4.38: Harmonic spectrum of line current, feeding diode-bridge rectifier after filtering by SAF
124
4.4
Chapter 4. Three Phase Shunt Active Filter
Comparison of Vector and Scalar control techniques
The control of the SAF based on vector and scalar control was described. It is inferred that scalar control is advantageous than vector control in the following aspects • Reduced number of feedback signals. • No need of phase transformations. • Analog as well as digital implementation possible. Implementing vector control using analog circuits is very complex. This is one of the main advantages of scalar control wherein both analog and digital implementations of the control are possible. The bandwidth of the current modulator in scalar control is dependent on the line inductance and the switching frequency. The bandwidth of the current modulator is crucial in determining the extent of harmonic compensation. With higher switching frequency and lower value of line inductance, currents with THD lesser than 10 % can be achieved. The bandwidth of the current controllers in vector control are dependent on the controller parameters.
4.5
Conclusion
This chapter described control techniques for three phase SAF. The first technique was based on synchronous reference frame theory. The modeling of the power circuit and the design of the controllers was described. Experimental waveforms were presented to validate the analysis. The second technique proposed in this thesis was based on scalar control. The control structure and modeling of the power circuit was explained. An equivalent circuit model was used to do the bandwidth analysis of the modulator. Experimental waveforms were presented to validate the control technique. It is concluded that scalar control is more advantageous than vector control in terms of control simplicity and the number of feedback signals used for implementing the control.
Chapter 5 Conclusions Low and medium power level AC-DC rectification, based on peak-charging and phasecontrolled rectifiers operated at low power factor and injected lower-order harmonics into the utility. The need for techniques to improve the power factor and reduce the harmonic content of the input current was felt. This resulted in the development of active techniques for power factor correction based on power semi-conductor devices like IGBTs and MOSFETs. The desired features of an active PFC technique are • Close to Unity Power Factor operation. • Less than 10 % Total Harmonic Distortion in line current. • Reduced number of feedback signals for controller implementation. The aim of this thesis was to develop PFC techniques for single and three phase AC-DC converters and to compare them with existing state-of-the-art techniques. The first part of the work focused on single phase Power Factor Correction techniques. The proposed control method for single phase PFC is called Scalar control. This technique was compared with the existing technique, average current mode control. On experimental verification of the two PFC techniques, it was observed that the proposed method, scalar control offered the following advantages over average current mode control • Input voltage sensorless operation. • Simpler control methodology. Besides these advantages, Scalar control based PFC technique produced low THD input current and close to UPF operation. Steady state instability is observed in Scalar under 125
126
Chapter 5. Conclusions
light load conditions. This problem can be minimized by appropriate choice of inductance and switching frequency of the converter. The second part of the work was on PFC techniques for three phase AC-DC converters. Scalar control, proposed for single phase PFC is extended to three phase also. This method was compared with the control based on synchronous reference frame theory, also called vector control. From the experimental analysis, it was inferred that scalar control was advantageous than vector control due to the following reasons • No need of phase transformation and Phase Locked Loop. • Simpler control methodology. • Reduced number of feedback signals for implementing the control. Unity power factor operation and low THD input current are observed in both control techniques. Bi-directional power flow capability, leading and lagging power factor operation are features that make Vector control attractive. The analysis on the possibility of Scalar control providing the two additional features provided by vector control, given above, is beyond the scope of this thesis. The last part of the work presented in this thesis is on three phase Shunt Active Filter. The proposed technique for harmonic and reactive current compensation is based on scalar control. The same controller used for three phase AC-DC rectifier is used here. This technique is compared with vector control of the SAF. The advantages attributed to scalar control over vector control in three phase AC-DC converter are applicable here. All six control techniques described in this thesis were implemented on an Intelligent Power Module based hardware. The power circuit configuration was based on the boost topology. The controllers were developed using Texas Instruments TMS320LF2407 processor. Steady state instability under light load conditions is observed in scalar control based converters. This problem can be minimized by appropriate choice of the system parameters like line inductance and switching frequency of the converter. The harmonic current compensation of Scalar control based SAF can be improved by reducing the value of the filter inductance. This demands an increase in the switching frequency of the converter to meet the current ripple requirement. High switching frequency MOSFET based converters needs to be developed to improve the performance of the scalar control based SAF.
Appendix A TMS320F2407 Based Digital Controller TMS320LF2407 Digital Power Processing platform provides a complete solution to Digital motor control and power quality management problems. The board comprises of TMS320LF2407A DSP chip from Texas Instruments along-with digital and analog signal processing circuits. The DSP controller communicates with PC for programming via one of the two ways • Via the XDS510PP-Plus in-circuit emulator through JTAG port. • Via RS-232 link through serial port.
A.1
Features of TMS320LF2407
• On chip memory - 32K X 16 Flash EEPROM, 2.5K X 16 RAM, 544 words of DualAccess RAM, 2K X 16 Single-Access RAM.
• Two 16-bit General purpose Timers - Eight 16-bit PWM Channels, Three 16-bit Full Compare units with programmable dead-band.
• External Memory Interface - 192K X 16 Total memory, 64K Program, 64K Data, 64K I/O.
• 10-bit Analog to Digital Converter. • Controller Area Network (CAN) 2.0B Module. • 16-bit Serial Peripheral Interface. • Serial Communication Interface. 127
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Appendix A. TMS320F2407 Based Digital Controller
A.2 A.2.1
TMS320LF2407 Board Components External Memory
The board has a total of 128K words of external, on-board memory. The memory has been partitioned in the following manner 64K - words, external program memory - SRAM 64K - words, external data memory - SRAM The on-board SRAM’s interface to the external address and data buses of the LF2407 device. One of the two PAL devices on the board has been programmed to control the write-enable (W E), output enable (OE) and Chip-select (CS) for the SRAM’s.
A.2.2
Analog-to-Digital Converter
The in-built Analog-to-Digital Converter (ADC) module consists of a 10-bit ADC with Sample-and-Hold (S/H) circuit. Functions of the ADC module include • 10-bit ADC core with built-in S/H. • 16-channel MUXed inputs. • Auto sequencing capability provides up to 16 auto conversions in a single session. • Digital value of input analog voltage is derived by v − V lo Digital Value = 1023 X V in −ref Vref lo ref high • Sequencer can operate in start/stop mode, allowing multiple time-sequenced triggers to synchronize conversion.
A.2.3
Digital-to-Analog Converter
The DSP board has an on-board, quad, 12-bit Digital-to-Analog Converter (DAC) module for code development. The four on-board DAC channels and the DAC update registers are mapped into the I/O space of the 2407 device. The DAC used in the board is a Burr-Brown DAC7625 device. It accepts 12-bit parallel input data, have double buffered DAC input logic and provides a read back mode of the internal input registers. The settling time of the device is 12 µsecs. By proper setting of jumpers, the DAC can be used either as uni-polar or bi-polar.
A.2. TMS320LF2407 Board Components
A.2.4
129
PWM Outputs
All PWM outputs of Event Manager A and B have been brought out on a connector through Octal bus transceivers, SN74LVTH245A. It has eight non-inverting bi-directional buffers with tri-state outputs. These transceivers are designed for low voltage (3.3 V) applications, but with the capability to provide an interface to a 5 V environment.
A.2.5
Clock Oscillator
The device clocks are generated from an external clock (ECS2200B) input to the XTAL1/CLKIN pin. In this case, an external oscillator clock (10 Mhz) is connected to the XTAL1/CLKIN pin. The on-chip PLL clock module can be programmed to multiply the 10 Mhz input frequency by a factor ranging from 0.5 to 4.0. This generates a maximum on-chip CPU clock frequency of 40 Mhz. The block diagram of the DSP based controller is shown in figure A.1.
CLOCK DIGITAL I/P
Scaling/Shifting circuit and anti-aliasing filter
POWER SUPPLY
ADDRESS BUS DATA BUS
TMS320LF2407
PWM output
EXTERNAL MEMORY
ADDRESS BUS
DAC LATCH
RS-232
CAN
JTAG
Figure A.1: Block diagram of the DSP board
References [1] Francisc C. Schwarz, ”A Time-Domain Analysis of the Power Factor for a Rectifier Filter System with Over- and Subcritical Inductance”, IEEE Transactions on Industrial Electronics and Control Instrumentation, Vol. IECI-20, No. 2, May 1973, pp.61-68. [2] C. Zhou, R. B. Ridley and F. C. Lee, ”Design and Analysis of Hysteretic Boost Power Factor Correction Circuit”, IEEE Power Electronics Specialist Conference, Record,1990. [3] Souvik Chattopadhyay, ”Carrier Control Methods for Resistor-Emulator Rectifiers and Impedance-Emulator Shunt Active Filters”, PhD Thesis, Dept. of Electrical Engineering, Indian Institute of Science, April 2002. [4] Parthasarathi Sensarma, ”Analysis and Development of a Distribution STATCOM for Power Quality Compensation,” PhD Thesis, Dept. of Electrical Engineering, Indian Institute of Science, July 2000. [5] UC3854 application notes [6] Robert W. Erickson, “Fundamentals of Power Electronics,” 2nd Edition, Kluwer Academic Publishers [7] R. D. Middlebrook, Slobodan Cuk, “A General Unified Approach to Modelling Switching-Converter Power Stages,”, IEEE Power Electronics Specialist Conference, 1976 record, pp. 18-34 (IEEE Publication 76CH1084-3). [8] V. Ramanarayanan, “Class notes on Switched Mode Power Conversion” 130
References
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[9] Shi-Ping Hsu, Art Brown, Loman Rensink, R. D. Middlebrook “Modeling & Analysis of Switching DC-to-DC converters in Constant-frequency Current-Programmed Mode,” in Advances in Switched-Mode Power Conversion , vol.1, pp. 169-186. [10] C. Zhou, M. M. Jovanovic, “Design trade-offs in Continuous Current-mode controlled Boost Power Factor Correction circuit,”Proceedings of High frequency Power Conversion Conference,Record, May 1992. [11] Rajib Datta, ”Rotor Side Control of Grid-Connected Wound Rotor Induction Machine and its Application to Wind Power Generation,” PhD Thesis, Dept. of Electrical Engineering, Indian Institute of Science, February 2000.
