Performance History of Laminate Technology

Performance History of Laminate Technology Organic Laminate Boards Rigid Printed Wiring Boards (PWBs) • Composite structure- organic resins reinfo...
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Performance History of Laminate Technology

Organic Laminate Boards

Rigid Printed Wiring Boards (PWBs) • Composite structure- organic resins reinforced with fiber • Fibers are glass ( continuous filament E-glass is most often used) or other materials chosen for expansion control or cost • Organic resins include epoxy,BT resin, polyimide, cyanate esters, PTFE, and phenolic • Metal foil is most often used for conductors

Classifications of Printed Wiring Boards

Single Sided PWB’s- Starting Material • Single layer of copper foil • Rigid dielectric fabricated from laminating multiple layers of unclad (no copper) laminate material to the desired thickness • Copper thick based on weight – 1 oz/ft2 = .00137 inches ( 1.4 mils) – 2 oz/ft2 = .00274 inches ( 2.8 mils) – 1/10 oz/ft2 = .14 mils etc.

PWB laminate • Glass is impregnated with resin. A-stage is totally uncured. • Partial curing and thickness control develops Bstage material, a material that is dry to the touch but will reflow and fully cure under additional heat and pressure • Final cured laminate is known as C-staged • Thickness of the laminate is determined by the number of B-stage layers used. B-stage laminate is typically from 4-7 mils thick • Copper foil is added and the stack is laminated

Typical Resin Properties • Material Epoxy Polyimide Cyanate Ester PTFE BT/epoxy

Tg E(106psi) CTE (ppm) K @I MHz

130 0.5 260 0.6 260 0.5 327 0.05 180 0.5

58 49 55 99 70

4.5 4.3 3.9 2.6 4.1

Fiber Material Properties

Z-Axis Expansion • Due to constraining X-Y expansion due to glass/fiber mesh, Zaxis expansion is greater due to the inherent high expansion of organics( 40-600 ppm/oC) • Lower CTE fibers ( kevlar, quartz) enhance Z axis effect, although they control X-Y expansion • Thermal expansion increases above Tg lead to very high expansion due to the increase in CTE above Tg • Z-axis expansion primary cause of barrel cracking in platedthru holes

Z- Axis Expansion for Various Resin/Fiber Combinations

Double sided PWBs • Circuitry on both sides, with electrical access between sides provided by plated- thru-holes (PTH) • Can be fabricated by subtractive or additive processes for interconnect definition • Subtractive processing includes drilling, metallizing (electroless Cu), imaging,electrolytic Cu plating, and etching. Electrolytic processing requires uniform conductive coating on the board for plating • Additive processing is also available and is especially important for fine line boards. Additive can start with a bare board for electroless copper plating or a thin foil to allow electroplating through a mask

Process for a Double Sided Board • • • • • • • •

Drill holes Electroless copper plate Define pattern photolithographically Electroplate copper and lead/tin solder Remove mask and etch Solder reflow ( fusing) Solder mask as appropriate Mechanical separation of individual boards

Evolution of a Thru-hole from Drilling to Etching

Drill

Electroless Copper Plate

Electrolytic Cu Plate

Sn-Pb Plate

Laminate Photoresist

Remove Resist

Expose and Develop

Etch

Cross-section of etching process

Multilayer PWBs • Multilayer PWBs have more than two layers of circuitry • Access to the internal metallization is by Plated-thru- holes, or for higher density board, blind vias • The internal layers are patterned and the copper is oxidized for enhanced adhesion • The inner layers are stacked up with B-stage layers and laminated in a heated platen press. The B-stage prepreg melts under pressure, flows and then cures • The remaining process is similar to a two sided PWB

MLB Process Flow

Lamination of 4 layer, foil construction multilayer Stackup

Alternative Multilayer Constructions

Foil-capped Stack-up for MLB

MLB with Blind and Buried Vias

Foil cap layup, Multilayer, PTH

Tool and Registration, Drill Drawings • Need datum system for slots, holes, and drill locations. Separate drill drawing must have drill locations from datum, drill sizes, number of holes in each size, and whether the holes will be plated or not. • Artwork must specify minimum annular ring for PTH’s and any artwork compensation required • If drill drawings gives finished hole sizes for PTH, holes must be drilled larger ( about 4 mils or 2X the plating thickness). Unplated holes should be drilled after plating

Drilling Requires the definition of: • tooling • entry and back-up material • drill speeds and feeds • drill bit design and care – use carbide bits, usually grade c2 – hits per drill-2000, can be repointed up to 3 times

• Deburring process • CNC programming

Factors Effecting Drilling

Drilling Processes • Carbide drills are available from 4 to 125 mils. • Drill machines are multiple spindle drilling machines with auto tool changes, capable of speeds in excess of 1000in/min and spindle speeds in excess of 100,000 rpm. • Numerical controlled drilling allows soft tooling and rapid changes. Position accuracy is within .001 inches or higher.

Laser Drilling • The need for small diameter holes in high performance laminates, especially blind vias, has lead to the development of laser drilling • Eximer lasers are used, especially through a metal mask • Optically multiplied (tripled and quadrupled) CO2 and YAG lasers are also used to produce individual laser drilled holes, at rates of 1 hole/20msec. CO2 produces clean holes in strengthened laminates, with equal removal of organic and glass fiber

Electroless Copper • Multi-step process which prepares the surface for the Pd activator and subsequent electroless plate • Typical process steps include: – cleaner – conditioner – microetch – predip – activator – acid dip electroless plate

Direct Metallization Techniques • Eliminated the electroless copper step. • Direct deposition of conductive palladium(usually a palladium/tin activator or the conversion of palladium to palladium sulfide),carbon/graphite or conductive polymers. • Many DMT work better than e;electroless copper on difficult resin systems such as PTFE, cyanate ester or polyimide

Pattern Development and Imaging • Photolithography- Coat the surface with a dry film or liquid ( subsequently baked and dried) photoresist. Exposure to UV light through a phototool. The resist coated laminate and phototool are held in intimate contact, usually by vacuum, to minimize scattering and diffraction effects • Correct exposure is critical to minimize loss or resolution ( overexposure) or lack of resist removal • Removal of unexposed resist is usually done by directed streams of solvent through high volume, low pressure nozzles

Electrolytic Copper • Electroplated copper is needed to insure there is sufficient thickness of copper in the PTHs or for interconnect thickness in an additive process • The most common solutions for electrolytic plating of copper used acid copper sulfate • Copper anodes are the source of copper • Organic brightners are added to improve the properties of the plated copper • Important variables are the plating solution, the anode-to-cathode separation, and the current density

Electrolytic Copper Plating Panel center is at area of lowest current density Anything that reduces voltage loss or current impedance will help plating uniformity Plating can be made more uniform leaving “robber” borders along edge of panel Plating average = amps/area X area to be plated. Plating baths are typically 20 to 30 amps/sq..ft

Etchants for Copper Removal • Alkaline ammonia- fast etch rates, tolerant to high dissolved copper. Made from ammonia salts of hydroxide, chloride, phosphate, nitrate, and bicarbonate • Cupric chloride - fine line processing, not recommended for solder plate processing.Solution of cupric chloride and hydrochloric acid • Ferric chloride- low cost and tolerant to high copper dissolution. Not recommended for solder or tin plate

Solder Mask Over Bare Copper • In this process, there is no Sn-Pb that served as a resist, either because it is removed or an additive process was employed. • A solder mask is applied to all regions to all regions except where solder is desired, such as bonding pads • Solder is applied by hot air solder leveling (HASL) • The surfaces can also be protected by an organic protective coating or electroless sacrificial metal coating (Au, Pd) •

Solder Masks • Used to protect surfaces from solder coating during soldering operations.After application of the solder mask, solder can be selectively applied to exposed pads, holes, etc.. • Solder masks can be temporary or permanent. • With increased conductor density, solder masks are required to minimize solder bridging between conductors.

Solder Mask Process Options

Solder Masks • Screen printable solder masks are usually epoxy based, have high adhesion and mechanical integrity. Resolution is lower than photodefinable systems • Photo-definable liquids are either epoxy, acrylate, or a mixture of the two,solids are of the latter two. Film thickness determines the resolution, with liquid masks having thinner coatings but dry masks allows “tenting” over PTHs • The major steps are cleaning, mask application, development, and curing

Flexible Circuits • Consists of a base flexible film, a metallic conductor, and an adhesive. • The metal foil is bonded by adhesive to the base film, etched to the desired pattern, and a top adhesively coated “cover coat” , with holes for solder pads, is laminated to the base structure. • Films are usually polyimide (Kapton from DuPont) or polyester. Polyimide is preferred for high performance applications due to high Tg and chemical stability

Metal Foils for Flex Circuits • Foils include rolled annealed copper, electrodeposited copper and other foils ( nickel for heaters) • Rolled annealed is a wrought foil with equi-axed grain structure and high ductility required for dynamic applications with repeated flexing • Electrodepositied foils have a rougher surface for enhanced adhesion and lower costs • Care must be exercised when using wrought films in flex circuits with PTHs as the plating will reduce flex capability, as cracks will initiate in the plated film. Areas that will be subjected to flexing should be protected from plating

Limitations to Conventional PWBs • Subtractive etching below 100 microns (4 mils) leads to extreme yield reductions • Mechanically drilled thru-holes below 250 microns ( 10 mils) becomes increasingly expensive • Thru-holes of any size greatly reduce routing efficiencies and capture pads reduce packaging efficiencies

High Density Interconnect (HDI) Substrates • Additive process over a deposited resin surface with 50 µ or below lines and spaces • Blind vias of 50 µ or less. • Current world wide microvia board production is estimated at $2800MM, with 80% in Japan and 5% in US.

Fine-line Plated-up Process • Fine line ( 3 mil lines/spaces) often occurs by a plate up process on a thin foil or film. • The desired pattern is define in a thick photoresist which can be developed with sharp sidewalls. Copper is electroplated, following the shape of the photoresist walls. • The photoresist is removed and the copper is partially etched, which reduces the plated copper but completely removes the initial copper layer

Comparison of Additive Versus Subtractive Plating

Blind Vias • Can be developed by blind drilling and plating • Can be developed in sequential buildup process through plating • Can be developed on individual layers and either laminated with anisotropic adhesives • Can be developed on individual layers and laminated into substrate

Blind Vias in PWB Technology

Laser drilled

Mechanically drilled

Plated thru in a single sided core process

Build-up Circuits • • • • •

Surface laminar circuits- SLC (IBM Japan) Sequential bonded film (DYCOstrates) Conductive adhesive bonded Build-up structure system (IBSS) Sequentially bonded cores (ALIVH)

Sequential Build-up • In SBU process, multilayer boards are built by adding photodefinable dielectrics to a standard PWB, forming microvias , plating and redoing the process for the desired number of layers

Multilevel Via Constructions

Conductive Adhesive Construction

Resin-Coated Copper • Thin resin-coated board ( thin copper on two sides, unfilled resin between) are used for many HDI applications. • Laser processing can be utilized for copper ablation ( YAG IR) and either a CO2 of Eximer to remove the dielectric down to the next copper layer • Conductive via filling can be done by plating or using conductive epoxies

µVia Process Flow

Product Development into Advanced Technologies

Build-up Technologies

Build-up Densities

Design Standards for 3 Mil Boards

Cost-Price Performance Crossover