What we will learn

• A detailed description of various ways of organizing memory • Discuss various memory-management techniques, including paging and segmentation • To provide a description hardware support • Address space augmentation: Swapping

Multi-Process Systems: Memory (1)

• Address space augmentation: Virtual Memory – Background – Demand Paging – Page Replacement – Allocation of Frames – Thrashing – Memory-Mapped Files – Allocating Kernel Memory – Other Considerations – Operating-System Examples

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Secondary Memory e.g. Disk or Tape

CPU Registers L1 Cache Memory

L2 Cache Memory

Faster access

“Main” Memory Rotating Magnetic Memory

Secondary

Larger storage

ly nt n ue tio eq a Fr rm e fo or In M sed U

Le Us ss F ed re CPU Registers Inf que or nt m ly ati on Primary Memory (Executable Memory) e.g. RAM

Primary (Executable)

Contemporary Memory Hierarchy & Dynamic Loading

The Basic Memory Hierarchy

Optical Memory Sequentially Accessed Memory

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Exploiting the Hierarchy

The cache principle

• Upward moves are (usually) copy operations – Require allocation in upper memory – Image exists in both higher & lower memories

• Place frequently-used info high, infrequently-used info low in the hierarchy

• Updates are first applied to upper memory • Downward move is (usually) destructive – Destroy image in upper memory – Update image in lower memory

• Reconfigure as process changes phases

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The Memory Manager (External view)

The Memory Manager (Abstract / logical view)

Application Program

• Translation system creates an address space, but its address are virtual instead of physical • A virtual address, x:

UNIX

– Is mapped to physical address y = Bt(x) if x is loaded at physical address y – Is mapped to ! if x is not loaded

Memory Mgr Process Mgr

File Mgr

Memory Mgr Process Mgr

File Mgr

Device Mgr

VirtualAlloc() VMQuery() VirtualLock() VirtualFree() ZeroMemory()

Device Mgr

exec() sbrk() getrlimit()

shmalloc()

Windows

Bt:Virtual Address " Physical Address # {!}

Hardware Operating Systems and Distributed Systems

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7

• The map, Bt, changes as the process executes -- it is “time varying”Operating Systems and Distributed Systems

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The Memory Manager (Abstract / logical view)

The Memory Manager (Internal view) Process Address Space

Bt

Absolute Program Address Space

!

Primary Memory

0

User Process Address Space

y = Bt(x)

virtual address x 3GB

Supervisor Process Address Space

4GB

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The Memory Manager (Hardware view) CPU chip CPU

MMU

Virtual addresses from CPU to MMU

Memory Physical addresses on bus, in memory

Disk controller

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Memory Manager • Requirements

• Program uses logical or virtual addresses – Addresses local to the process – Hardware translates virtual address to physical address

• Translation done by the Memory Management Unit – Usually on the same chip as the CPU – Only physical addresses leave the CPU/MMU chip

• Physical memory indexed by physical addresses

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– Minimize executable memory access time – Maximize executable memory size – Executable memory must be cost-effective

• Today’s memory manager: – Allocates primary memory to processes – Maps process address space to primary memory – Minimizes access time using cost-effective memory configuration – May use static or dynamic techniques Operating Systems and Distributed Systems

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The big picture

Memory and multiprogramming • Memory needs at least two things for multiprogramming

Swappig

Augmenting address space

– Allocation/Relocation strategies – Protection

Fixed dimension

Non contiguous allocation

– Variables and procedures can’t use absolute locations in memory – Several ways to guarantee this

Process address space

Memory organization (allocation) Contiguous allocation

• The OS must keep processes’ memory separate

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HW support

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Limit & relocation registers

Paging Paging & Segmentation

Variable dimension

Segmentation

Variable partitioning Dynamic allocation

Fixed partitioning

Allocation/relocation strategies

Dedicated registers

Table based partitioning

Page table

TLB

Segment table

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Protection

• Fixed-Partition used only in batch systems • Variable-Partition used everywhere (except in virtual memory) • Swapping systems

• The hw and operating system must co-operate to ensure that different processes do not modify each other’s memory • The hw provides special registers that can be read in user mode, but only modified by instructions in supervisor mode • Simple solution: the physical memory is divided between processes in contiguous chunks by the OS and the boundsare stored in special registers – the hardware checks every program access to ensure it is within bounds

– Popularized in timesharing – Relies on dynamic address relocation – Now dated

• Dynamic Loading (Virtual Memory) – Exploit the memory hierarchy – Paging -- mainstream in contemporary systems – Segmentation -- the future Operating Systems and Distributed Systems

Frame allocation Page replacement

• The OS cannot be certain where a program will be loaded in memory

– Protect a process from other processes reading or modifying its own memory – Protect a process from modifying its own memory in undesirable ways (such as writing to program code)

Page request Virtual Memory

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The big picture

Protection

Swappig

Augmenting address space

• Virtual memory allows protection without the requirement that pages be pre-allocated in contiguous chunks • Physical pages are allocated based on program needs and physical pages belonging to different processes may be adjacent – efficient use of memory • Each page has certain read/write properties for user/ kernel that is checked on every access – a program’s executable can not be modified – part of kernel data cannot be modified/read by user – page tables can be modified by kernel and read by user

Fixed dimension

Non contiguous allocation

Process address space

• Assumes a single hunk of memory per process

Paging Paging & Segmentation

Variable dimension

Segmentation

Variable partitioning Dynamic allocation

Fixed partitioning

HW support

Limit & relocation registers

Table based partitioning

Page table

Dedicated registers

TLB

Segment table

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HW protection: Base and limit registers

• Special CPU registers: base & limit

0xFFFF

– Access to the registers limited to system mode – Registers contain

Process partition

– Resident operating system, usually held in low memory with interrupt vector – User processes then held in high memory

Memory organization (allocation) Contiguous allocation

Contiguous Allocation • Main memory usually into two partitions:

Frame allocation Page replacement

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Page request Virtual Memory

0xFFFF

0x2000

Limit Process partition

• Base: start of the process’s memory partition • Limit: length of the process’s memory partition

Base 0x9000

• Address generation y = Bt(x) – Physical address y: location in actual memory – Logical address x: location from the process’s point of view

OS 0

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– Bt(x) = base + logical address – ! : Logical address larger than limit 19

OS 0

Logical address: 0x1204 Physical address: 0x1204+0x9000 = 0xa204

=> error

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CPU

Contiguous Allocation (Cont.)

HW protection: Runtime Bound Checking

• Multiple-partition allocation – Hole – block of available memory; holes of various size are scattered throughout memory – When a process arrives, it is allocated memory from a hole large enough to accommodate it – Operating system maintains information about: a) allocated partitions b) free partitions (hole)

Relative Address

+ Relocation Register 0xFFFF


more space needed for free lists

D 24

A 32

B 8

Bitmap 27

C 16

Memory regions

Memory regions

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A 0 6

-

6

4

D 26 3

- 29 3

B 10 3

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D 24

- 13 4

32

C 17 9

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Allocating memory

Freeing memory

• Search through region list to find a large enough space • Suppose there are several choices: which one to use? – First fit: the first suitable hole on the list – Next fit: the first suitable after the previously allocated hole – Best fit: the smallest hole that is larger than the desired region (wastes least space?) – Worst fit: the largest available hole (leaves largest fragment) • Option: maintain separate queues for different-size holes Allocate 20 blocks first fit Allocate 12 blocks next fit

6

5

- 202 10

-

19 14

- 302 20

– Merge adjacent free regions into a single region – May involve merging two regions with the just-freed area

Allocate 13 blocks best fit Allocate 15 blocks worst fit

1 -

• Allocation structures must be updated when memory is freed • Easy with bitmaps: just set the appropriate bits in the bitmap • Linked lists: modify adjacent elements as needed

5 -

18

52 25

- 102 30

- 135 16

- 350 30

- 411 19

- 510 3

A

X

A

X X

B

A

B

A B

B

X

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Buddy allocation

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Fragmentation • External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous • Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used • Reduce external fragmentation by compaction

• Goal: make it easy to merge regions together after allocation • Use multiple bitmaps – Track blocks of size 2d for values of d between (say) 12 and 17 – Each bitmap tracks free blocks in the same region of different sizes

• Keep a free list for each block size as well • Store one bit per two blocks – Blocks paired with “buddy”: buddies differ in block number only in their lowest-order bit – Bit == 0: both buddies free or both buddies allocated – Bit == 1: exactly one of the buddies is allocated, and the other is free

– Shuffle memory contents to place all free memory together in one large block – Compaction is possible only if relocation is dynamic, and is done at execution time – I/O problem

12 13 14 15 16 17

• Latch job in memory while it is involved in I/O • Do I/O only into OS buffers Operating Systems and Distributed Systems

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The big picture

Paging

Swappig

Augmenting address space

• Logical address space of a process can be non contiguous; process is allocated physical memory whenever the latter is available • Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes)

Page request Virtual Memory

Frame allocation Page replacement Fixed dimension

Non contiguous allocation

Process address space

Memory organization (allocation) Contiguous allocation

Paging Paging & Segmentation

Variable dimension

HW support

• To run a program of size n pages, need to find n free frames and load program

Variable partitioning Dynamic allocation

Fixed partitioning

Limit & relocation registers

• Divide logical memory into blocks of same size called pages • Keep track of all free frames

Segmentation

• y = Bt(x) : Set up a page table to translate logical to physical

Table based partitioning

Page table

Dedicated registers

TLB

addresses • Internal fragmentation

Segment table

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Paging and page tables • Virtual addresses mapped to physical addresses – All addresses in the same virtual page are in the same physical page – Page table entry (PTE) contains translation for a single page

• Table translates virtual page number to physical page number – Not all virtual memory has a physical page – Not every physical page need be used

• Example: – 64 KB virtual memory – 32 KB physical memory

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What’s in a page table entry? • Each entry in the page table contains

60–64K 56–60K 52–56K 48–52K 44–48K 40–44K 36–40K 32–36K 28–32K 24–28K 20–24K 16–20K 12–16K 8–12K 4–8K 0–4K

– Valid bit: set if this logical page number has a corresponding physical frame in memory

-

• If not valid, remainder of PTE is irrelevant

6 5 1

-

3 0

-

4 7

Virtual address space

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– Page frame number: page in physical memory – Referenced (Used) bit: set if data on the page has been accessed – Dirty (modified) bit :set if data on the page has been modified – Protection information

28–32K 24–28K 20–24K 16–20K 12–16K 8–12K 4–8K 0–4K

Protection

Physical memory

D

Dirty bit

35

R

V

Referenced or Used bit

Page frame number

Valid bit

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Paging model : Addresses

Paging model

• Suppose there are

• A page is a fixed of virtual addresses • A page frame is a fixed size, 2h, block of physical memory (the same size as a page) • When a virtual address, x, in page i is referenced by the CPU size, 2h, block

– G= 2g&2h=2g+h virtual addresses – H= 2j&2h=2j+h physical addresses

assigned to a process – Each page/page frame is 2h addresses – There are 2g pages in the virtual address space – 2j page frames are allocated to the process

– If page i is loaded at page frame j, the virtual address is relocated to page frame j – If page is not loaded, the OS interrupts the process and loads the page into a page frame

• Rather than map individual addresses – Bt maps the 2g pages to the 2j page frames – That is, page_framej = Bt(pagei) – Address k in pagei corresponds to address k in page_framej

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Paging model: Address Translation

Example • How many entries would there be in a process page table in a system with 32-bit addresses and a 1K page size? 1K= 1024=210=2h , h=10 G=232 N= 2g = G/2h = 232 / 210= 222

g=22

N=212!210 = 4096K or over 4 million.

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• • • •

Let N = {d0, d1, … dn-1} be the pages Let M = {b0, b1, …, bm-1} be page frames Virtual address i, satisfies 0'i