Memristive Tunnel Junctions for Neuromorphic Circuits

ESA, ACT ESTEC April 29, 2015 Memristive Tunnel Junctions for Neuromorphic Circuits Andy Thomas Fakultät für Physik Acknowledgments L. Schnatmann ...
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ESA, ACT ESTEC April 29, 2015

Memristive Tunnel Junctions for Neuromorphic Circuits Andy Thomas Fakultät für Physik

Acknowledgments

L. Schnatmann

N. Shepheard

M. Schirmer

J. Sterz

O. Simon

Center for Spinelectronic Materials and Devices S. Niehörster

Z. Kugler

I.-M. Imort

J. Münchenberger

S. Fabretti

O. Schebaum

M. Schäfers

G. Reiss

Ministerium für Innovation, Wissenschaft und Forschung des Landes NordrheinWestfalen

A. Hütten

2

Collaborations Spin electronic C. Felser, MPI Dresden J. Moodera, M.I.T. T. Kampfrath, FHI Berlin K. Nielsch, U Hamburg

Spin caloritronics

Memristive systems C. Kaltschmidt, U Bielefeld E. Chicca, U. Rückert, CITEC Bielefeld

memristor

M. Münzenberg, U Greifswald S. Goennenwein, WMI Garching C. Heiliger, U Gießen M. Kläui, U Mainz

3

Why neuromorphic circuits? 1 Introduction Scientific curiosity Maximum reduction?

R Lochkartenleser

Avoid von Neumann bottleneck

Memristors have attracted great interest for a variety of applications in recent years. CC An obvious use would be as a memory device [17, 52, 50] or, more ambitiously, a reconfigurable logic device [88, 10, 89, 11, 64]. However, the most interesting Kontrolleinheit implementation of memristivepostsynaptic devices is neuromorphic computing. cell im Neuromorphic pu computing aims to use biological mechanisms operating within lse s synapse the brain as a blueprint to construct novel computer architectures. Carver Mead built the foundation of this field and proposed large-scale adaptive analogue systems axon presynaptic cell because of their robustness as well as good power efficiency [61]. The efficiency of Arithmetische Speicher these systems is particularly promising, as shown in Table 1. Einheit synapse

dendrite

CA

M

Table 1 Comparison of the power consumption of three different technologies [74]. A biological neuron draws less power and consumes less area than a digital computer or silicon neuron.

Energy consumption (J/spike) Size (µm2 )

Digital computer Silicon neuron

Biological neuron

10 5 108

10 10

[74] C.S. Poon, Frontiers in neuroscience 5 (2011) 1

10 8 3 ⇥ 103

11

Efficiency

Biological neural networks

Biological neural networks need neurons and synapses

neurons are connected via the synapses.

postsynaptic cell

im pu

lse

s

synapse

Neurons integrate signals and fire when exceeding threshold

axon

presynaptic cell

dendrite

synapse

voltage threshold triggers pulse I(t)

im

pu

C

lse

s

presynaptic cell

R

pulse triggers switch

postsynaptic cell

leaky integrate and fire

synapse voltage threshold triggers pulse I(t)

Thomas, J. Phys D: Appl. Phys. 46 (2013) 093001, Thomas, Kaltschmidt, Memristor Networks, Ed. Adamatzky, Chua (2014) 151-172

oversampled ΣΔ modulators

= 1-Bit AD converter 6

Biological synapse Axon

Pre-synpase

Glu

synaptic cleft

vesicle fusion

Glu

Glu Glu

Glu

vesicles containing neurotransmitters

Glu

Post-synapse Ca2+

gene expression via CREB, NF-kappaB

Simplify the mechanisms via a simple model: One effective connection strength. Mayford, Siegelbaum, Kandel, Cold Spring Harbor Perspectives in Biology 4(6), a005,751 (2012) 


7

Electronic symbols J. Phys. D: Appl. Phys. 46 (2013) 093001

Topical Review

voltage threshold triggers pulse I(t)

im pu

synapse

lse

s

presynaptic cell C R

excitatory

postsynaptic cell pulse triggers switch

inhibitatory

neuron

Figure 13. Schematic symbols for synapses and neurons as used in the following paragraphs.

Symbols

of the research on this topic and explained the reasoning in the following way [75]: For many problems, particularly those in which the input data are ill-conditioned and the computation can be specified in a relative manner, biological solutions are many orders of magnitude more effective than those we have Figure 12. Integrate-and-fire circuits: the perfect integrate-and-fire model consists of a capacitor, threshold detector and switch (without been able to implement using digital methods. [...] LargeReview 46resistor). (2013) 093001 Topical Review Once the voltage reaches a threshold,Topical the spike is fired and scale adaptive analog systems are more robust to component the switch is closed to shunt the capacitor. In the leaky version, a 093001 Review systems, degradation and failure than are moreTopical conventional resistor is added that slowlyvoltage drains the capacitor with time. This threshold excitatory excitatory and they use far less power. The need for less power is corresponds to leakage current through a membrane in a living cell. triggers pulse voltage threshold particularly obvious if we compare the performance of the excitatory triggers pulse brain of even an invertebrate with a computer CPU and contrast integrate-and-fire [68–71]. The rather simple model captures the power consumption. However, there are some tasks that neuron setwo of the most important aspects of neuron neuronal excitability;synapse are difficult for a human and easy for a computer, such as inhibitatory inhibitatory specifically, the neuron integrates the incoming signals and multiplying two long numbers, and synapse neuron other problems that a inhibitatory generates the spikes once a certain threshold is Figure human cansymbols easily solve computers fail to solve. 13. Schematic for but synapses and neurons as used in ematic symbols for synapses and neurons as usedexceeded in (figure R 12). In 2008, the use of memristors to mimic biological the following paragraphs. aragraphs. Figure 13. Schematic symbols synapses and neurons as used in pulse triggersusing two simple electric mechanisms,forsuch This behaviour is often explained as STDP, was already hypothesized the following paragraphs. switch circuits [72]. pulse The perfect [76]. Snider implemented the spike time dependence using triggersintegrate-and-fire circuitofconsists the research on this topic and explained the reasoning in the capacitor, threshold detectorthe andreasoning switch. Once a spike memristive h of onathis topicswitch and explained in the nanodevices as synapses and conventional CMOS 8 following is fired, the switch closes and shunts the capacitor. An way [75]: For many problems, particularly those in synapse

presynaptic cell

postsynaptic cell

Biological synapses 100

potentiation (%)

Exhibit LTP, LTD, STDP

Long-term potentiation (LTP)

50

3

input

γ

0

2 -50

β

1 0

1

2 time (h)

3

α

4

change (%) synaptic strength

outp

(a)

100

1.0

Long-term depression (LTD)

ut

Spike-time dependent plasticity (STDP)

(b)

50

0.5

0 -50

0.0

-60

40

60

T. Bliss at al, Nature 361 (1993) 31, Y. Goda et al, Neuron 16 (1996) 103, S. Cassenaer et al, Nature 448 (2007) 709

9

-10

0

10

20

30

-40

-20 0 20 spike timing (ms)

time (min)

Observations in a biological neural network 7 The synapses exhibit LTP (cooperative, associative, and input-specific), LTD, and STDP.

eported that ltp is characterized by three basic ity and input-specificity [43]. We will discuss these g paragraphs. CONTENTS

Cooperative

8

Associative

G. Barrioneuvo, Natl. Acad. Sci. 80 (1983) 7347

Figure 8. The application of the weak stimulus W or a strong stimulus S does not lead to a potentiation. If W and S are applied at the same time, long-term potentiation can be observed. Reprinted from Proc. Nat. Acad. Sci. [48], Copyright (1983).

Input-specific: post tetanus (min) required Pre by 5 general 10 15 B.L. McNaughton, Brain. Res. 157 (1978) 277

d high-intensity stimulus (b) was applied to a fibre. The lowced a reaction, but it was short lasting. The high-intensity

causality

Tetanised pathway (%) 100

390 380 332

Spike timing dependent plasticity (STDP) 1

3

input

γ 2

β

1

Spike-time dependent plasticity (STDP)

2 output

α outp

(a)

ut

coincidence detector

change (%)

α 100

potentiate α

(b)

1

50

2

0 -50 -60

-40

-20 0 20 spike timing (ms)

40

60

output depress α

S. Cassenaer et al, Nature 448 (2007) 709

11

Memristor

Thin film samples @ Bielefeld Thin film devices Memristors: artificial neural networks integration with CMOS hybrid samples with biological neurons

Materials ‘development’: Ferromagnets, e.g. Heusler (HMF) SC: e.g. Heusler, MgB2 Oxides: e.g. Ta-O, HfO2, MgO Insulator Metal Lithography: optical e-beam ion beam etching Spintronic devices: sensors memory logic

Spin caloritronics: TMS vs TMR thermal spin transfer torque spin pumping

13

Sample preparation Thin film (co-)deposition on Si-wafer, MgO, STO, ..., substrates Optional in- and ex-situ anneal, ex-situ optional field cool Lithography (e-beam, optical), subsequent ion-beam etching Transport measurements (0.3-500K, up to 4T)

Magnetic Tunnel Junction

Meservey-TedrowTunnel Junction

Memristor

Ferromagnet

Superconductor

Metal

Insulator

Insulator

Insulator

Ferromagnet

Ferromagnet

Metal

Examples of the prepared thin film devices

14

Memristive tunnel junctions

!"$*+()$ !"#$%&'()$ ,-$*+()$

Electrically controlled, two terminal, bipolar, analog devices

Metal

10 5 0 -5 -10

Current [mA]

current

Abbildung 1: Stack

0

Insulator Metal

v=v0 sin(ωt)

Ta/TaO/Pd

-0.4

0 voltage

0.0 Voltage [V]

0.4

152 Abbildung 2: Loop mit Switching Effekt von 120% (MgO 12%)

resistance (Ω)

• • • ••

151







Die oberen 3 Kurven wurden aus der gleichen Probe generiert. Die Barriere wurde hergestellt indem 2nm Ta mit Sauerstoffplasma oxidiert wurden. Die Beschleunigugnsspannung betrug -80V und die Oxidationszeit betrug 200s.



150

• •

• • • • •

• •

149 0

20

40 flux (Vs)





• •

60

Thomas, J. Phys D: Appl. Phys. 46 (2013) 093001, Krzysteczko,..., AT, Appl. Phys. Lett. 95 (2009) 112508 Semicond. Sci. Technol. 29 (2014), guest Editor: A. Thomas

80

current flows one direction => turn knob one direction

current flows other direction => turn knob other direction

+I: resistance up

-I: resistance down 1

15

Memristor based synapses

(V)

mains stable when the activity is terminated.

Long term potentiation and depression 2 4 6 8 10 12

-0.5 0

Time (min)

2

Biological System 100

223 3

2

221

1

R 220 (Ω) 219

-50 0

218

1

2 time (h)

3

4

neuron

Successive pulses cause successive potentiation/ depression

0

0

1.0

0.5

Figure 50: The effect of 0.0 subsequent train application. -10 0 10 20 The resistive states are numtime (min) bered. The state zero is the result of the refreshing procedure shown in fig.at51. T. Bliss al,The Nature 361 (1993) other states are induced by 31, Y. Goda et al, Neuron 16 standard spike trains.

4

222

50

neuron

synaptic strength

time (min)

potentiation (%)

conductance change (%)

LTP in figure 1 48 are applied. They are characterized by only two parameters: the amplitude of the sine profile number I vmax and theexcitatory of spikes per train Nsp . 0 A typical measurement is shown in figure 49. The graph consists 0.5 of three traces. The bottom trace plots the applied voltage. synapse inhibitatory I The middle trace displays the corresponding flux. The top trace excitatory shows that due to the voltage treatment, the resistance is driven 0.0 from a lower stable level to a higher stable level. This is exactly how an artificial synapse should respond.LTDThe activity at synapse inhibitatory -0.5 the synaptic connection leads a stable modification thereof—the activity is0remembered. 5 10

30

(1996) 103

217 0

10

20

30

Time (min)

40

50 17

Pulse shaping for spike timing dependent plasticity 3

input

γ 2

β

1

Take real properties

into account

R 184 (Ω) 180

α outp

-0.55

ut

change (%) (b)

RRL,P L

176.0

(a)

100

RRH H,P

190.9 188

vpre

t>0

vpre

50

0.0 Voltage (V)

0.55

t1000 Neurons) Neuromorphic nanoscale memristor synapses Vdd Vdd

Vdd

I

Vdd

Iw

Ith

Vdd

Vw

IwN

Vw Vw Vw

VinN

Vw

Vin4

Isyn

existing neuromorphic chip design + memristor pads + additional electronics = neuronal circuit with synaptic weights

Vin3 Vin2 Vin1

(a)

(b)

chip design (AG E.synapse. Chicca, Citec Bielefeld), circuit implementing a Figure Neuromorphic 6: Neuromorphic memristive (a) Schematic array of memristive synapses, with independent inputs and synaptic weights, but wi Memristor preparation and lithography (AG A. Thomas, U Bielefeld) shared temporal dynamics. (b) SPICE simulations of the circuit in Fig. 6a showing t output Isyn EPSC in response to a pre-synaptic input spike, for 4 di↵erent memrist G. Indiveri et al., Nanotech. 24 (2013) 384010 23 conductance values.

Take home message Memristive System potentiation (%)

100

LTP

1 I

excitatory

0 synapse

inhibitatory

0.5 I

0.0

excitatory

LTD

synapse

inhibitatory

-0.5

neuron

50

0

-50

neuron

0

synaptic strength

conductance change (%)

2

Biological System

1.0

5

2 0.5 1

α (a)

Δ R (Ω)

STDP

-10

0

10

outp

20

ut

30

time (min)

(b)

50 0 -50

0

-60

-40

-20 0 20 spike timing (ms)

40

60

-4 -8 -200

450

(Ω)

Change (%)

100

4

4

β

change (%)

8

3

γ

10 time (min)

2 time (h)

3

input

0.0

0

1

back-hopping

-100

0 spike timing (s)

100

200

T. Bliss at al, Nature 361 (1993) 31,

Y. Goda et al, Neuron 16 (1996) 103

S. Cassenaer et al, Nature 448 (2007) 709

25