LH60 Single Phase Power Meter Reference Design

Document Number: DRM133 Rev. 0, 7/2012

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 2

Freescale Semiconductor, Inc.

Contents Section number

Title

Page

Chapter 1 Introduction 1.1

Overview.........................................................................................................................................................................7

Chapter 2 Design Requirements 2.1

Basic requirements..........................................................................................................................................................9

2.2

Hardware requirements...................................................................................................................................................9

2.3

Software requirements....................................................................................................................................................9

2.4

Applicable standards.......................................................................................................................................................10

Chapter 3 Power Meter 3.1

Power Meter Demo Use..................................................................................................................................................11

3.2

Display............................................................................................................................................................................13

3.3

User button......................................................................................................................................................................15

3.4

Power pulse LED............................................................................................................................................................15

3.5

Power Pulse open collector pulse output........................................................................................................................15

3.6

RS232 interface...............................................................................................................................................................15

3.7

Infrared interface.............................................................................................................................................................16

3.8

Tamper switch ................................................................................................................................................................16

Chapter 4 PCB Components 4.1

PCB components placement...........................................................................................................................................17

Chapter 5 Calibration 5.1

Meter calibration.............................................................................................................................................................19

5.2

ADC calibration..............................................................................................................................................................19

5.3

Power Meter calibration..................................................................................................................................................20

5.4

Date and Time setting.....................................................................................................................................................21

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Section number

Title

Page

5.5

Analogue to digital converter calibration.......................................................................................................................23

5.6

Power meter calibration - software implementation.......................................................................................................24

5.7

Power factor calibration..................................................................................................................................................25

5.8

Measurement calibration mathematical background......................................................................................................25

5.9

Voltage calibration..........................................................................................................................................................26

5.10 Power calibration............................................................................................................................................................26 5.11 Pulse number setting.......................................................................................................................................................27 5.12 Filters setting...................................................................................................................................................................27 5.13 Counter............................................................................................................................................................................28

Chapter 6 Power Meter Accuracy 6.1

Power meter accuracy ....................................................................................................................................................29

Chapter 7 Hardware 7.1

Power supply...................................................................................................................................................................33

7.2

LED energy pulse output................................................................................................................................................35

7.3

Infrared interface.............................................................................................................................................................36

7.4

RS232 interface...............................................................................................................................................................36

7.5

Display............................................................................................................................................................................37

7.6

Buttons............................................................................................................................................................................37

7.7

Analogue values measurement.......................................................................................................................................38

7.8

Voltage measurement signal path...................................................................................................................................39

7.9

Current signal path..........................................................................................................................................................42

7.10 DC bias circuit................................................................................................................................................................44 7.11 MCU...............................................................................................................................................................................45

Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage 8.1

HC9S08LH64 MCU periphery, setting and use.............................................................................................................47

8.2

Clock setting ..................................................................................................................................................................49

8.3

TOD setting.....................................................................................................................................................................50 LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012

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Section number

Title

Page

8.4

16-bit SAR AD Converter setting...................................................................................................................................50

8.5

Timer settings..................................................................................................................................................................53

8.6

Timer 1 setting................................................................................................................................................................55

8.7

Voltage reference............................................................................................................................................................55

8.8

Analogue comparator......................................................................................................................................................56

8.9

LCD module....................................................................................................................................................................56

8.10 Keyboard interrupt..........................................................................................................................................................57

Chapter 9 Software 9.1

Software..........................................................................................................................................................................59

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Chapter 1 Introduction 1.1 Overview The scope of this reference design is the construction and features of a static single phase power meter with direct measurement. Static means that the power meter does not contain any mechanical parts. Static meters are microcontroller based. Current flowing to the load is sensed on a shunt resistor, this is called direct measurement. Voltage and current are measured using a high precision AD converter. Power is then calculated from the measured values. Finally, the power is summed in time to get the total active energy [Wh]. Older electro-mechanical power meters are today being replaced by electronic ones, many benefits result from this. The first big advantage is:It is easier and more cost effective to have a mechanical construction with no moving parts. An electronic power meter has better accuracy and a wider dynamic range. An electromechanical power meter has a standard dynamic range of 1:80 at 2% accuracy. Today static PMs have a dynamic range of power measurement of approximately 1:1000 with 1% accuracy. Considering that voltage is stable in the mains, the dynamic range of the power meter is given by the dynamic range of the current measurement. An electro-mechanical power meter registers and displays only an active energy value, whereas an electronic power meter can measure and show additional information such as active power, voltage and current RMS and peak values, line frequency, power factor, or temperature. Those values are read out via electronic interfaces such as RS232, RS485, MBUS, or IRDA. A static power meter also provides enhanced security. Tampering is an unpleasant phenomena today, as electricity rates are increasing. Electronic based power meters may sense and report tampering attempts, as a current flow direction change, a partial earth or missing neutral condition, or a lid removal.

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Overview

Power consumption is also an important part of the design. Millions of power meters installed have a significant overall power consumption, therefore, the power budget for a PM is strictly limited. Total losses in the current sensor and meter electronics are limited to 2 W and 10 VA. Power meters are subject to various standards. A static single phase power meter must be designed to be compliant with the EN62056 and EN50470 EU regulations. Particular requirements for static electricity meters for active energy (class indexes A, B, and C) can be found in the EN50470-3. The standard describes the requirement for voltage, current circuits, self-power consumption, and various tests on accuracy, tests on the influence of noise, temperature, overvoltage, undervoltage, overcurrent, or harmonics. The EN62056 standard describes local data exchange and describes how to use COSEM over a local port (optical or current loop).

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Chapter 2 Design Requirements 2.1 Basic requirements

• An HC9S08LH64 based 1-ph static direct power meter design for cost sensitive markets (shunt resistor based) • 5(60) A = 5 A nominal current (60 A max) • 120 V/230 V operation • Standard low-end metering functionality (V, A, kW, kWh, and real time clock) • Precision (accuracy) IEC50470-3 class B 1% • 50 Hz or 60 Hz operation • Serial interface for FreeMASTER visualization, demonstration • Calibration ability

2.2 Hardware requirements • • • • • • •

Live “L” current to be measured by a shunt resistor with a low-cost op-amp Voltage sensing done by a resistor divider Simple user interface — One button for the user interface, one tamper Energy output pulse optical (LED) interface — One LED, active power Opto-isolated pulse output (optocoupler) — Active energy IIC interface with an MMA7660 3-axis accelerometer for tamper detection LCD interface — Possibly using an FSL LCD device or, preferably a display that also shows other information required by the standards (a number specifying the information type on the display). • Infrared interface hardware for metering data reading (IEC1107) • RS232 serial interface, opto-isolated

2.3 Software requirements • Software for core metering

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Applicable standards

• • • • • •

User interface via an LCD and buttons, LCD driver Counters and settings stored in the FLASH memory and the FLASH driver FreeMASTER interface for demonstration purposes / meter calibration The application is tested for safety (CE). The application is calibrated and verified for accuracy. The application should be tested for EMC or EMI compatibility according to the customer requirements.

2.4 Applicable standards • • • •

EN50470-3 EN 62056-21 EN 61000-4-4 EN 61000-4-5

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Chapter 3 Power Meter 3.1 Power Meter Demo Use

The Power Meter demo is enclosed in a plastic case. It has standard dimensions and allows users to connect the meter to their accuracy measurement testing equipment. The power meter provides standard interfaces such as display, user button, pulse output and open collector output, as well as the RS232 bus.

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Power Meter Demo Use

Figure 3-1. Power meter user interface

The demo power meter is connected to the mains and to the load by the following wiring diagram. After the power supply is switched on, the power meter starts to count the energy flowing.

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Chapter 3 Power Meter

kWh

1

2 3 4

5

6

7

8

9 10 12

+ 13 14 15 16 17 18

L LOAD

N Figure 3-2. Wiring diagram

3.2 Display

The following values are read on the display. After the power meter is on (supplied), the display is permanently lit. During power outage, the power meter is backed up by a battery and keeps real time. After pressing a button, the display is switched on for 10 sec. Table 3-1. Display readings Order

Vaue

Unit

Format

OBIS code

1

Active power

0.001 [W]

0.001 W

1.7.0

2

Reactive power

0.001 [VAr]

0.001 VAr

3.7.0

3

Apparent power

[VA]

0.001 VA

9.7.0

4

Active energy

[Wh]

0.001 Wh

1.8.0

5

Line RMS voltage

[V]

0.1 V

32.7.0

6

Line RMS current

[A]

0.001 A

32.7.1

7

Time

hour, min, sec

HH MM SS

0.9.1

8

Date

day, month, year

DD MM YY

0.9.2

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Display

Figure 3-3. Display readings

Instantaneous values — Active power, reactive power, apparent power, current voltage, time, date Counters — Active energy Active Power and its sum counter the Active Energy value are the only accurate values that meet IEC50470-3 requirements. All other values are calibrated or set, but accuracy is not tested nor required. The Active Energy value is stored in an internal flash memory. LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 14

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Chapter 3 Power Meter

Reactive power is calculated only with limited accuracy and dynamic range. The value may be used for phase error calibration. The value is also used for apparent power calculation using the triangle method. Voltage and current values are informal as well. Values on the display are by default filtered to have a long averaged signal for calibration using the display value. Data is displayed for an average of 8 seconds. The filter may be switched off. See the calibration chapter.

3.3 User button Pressing the user button changes the readings on the display.

3.4 Power pulse LED The power pulse LED is used to calibrate and test the meter's active power accuracy. By default, the impulse number is set to 2000 pulses/kWh. This impulse number may be changed in runtime. See calibration procedure. The maximum LED flashing frequency is 100 Hz, therefore the impulse number must be set accordingly. Pulses are aligned to a mains zero-crossing, which causes a pulse jitter of around 10 ms. This must be taken into account during accuracy measurement. The jitter influences the minimal testing time. The testing time must be at least 10 seconds.

3.5 Power Pulse open collector pulse output The open collector interface copies only the LED signal.

3.6 RS232 interface The RS232 interface is opto-isolated, it may be connected directly to the computer. Due to the optocoupler used for galvanic isolation, the maximal speed is limited to 14400 bps. FreeMASTER PC software is used as the meter interface, therefore FreeMASTER communication protocol is implemented in the software. See and download FreeMASTER from: http://www.freescale.com/Freemaster. Documentation contains a full protocol description. LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

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Infrared interface

3.7 Infrared interface The infrared interface is not active and does not have software support.

3.8 Tamper switch A tamper switch is placed on the PCB and is activated when the box cover is removed. The event may be read / cleared in the FreeMASTER software.

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Chapter 4 PCB Components 4.1 PCB components placement

The PCB layout in the following figure shows the component placement. The power meter consists of the following blocks: • Display is driven directly by the MCU • User button to change display readings • Tamper button is located below the user button and is activated after the box is opened • Power pulse LED — Flashing power pulse of 2000 pulses/kWh, used for meter calibration • Open collector connector with the same signal as on the LED power pulse • BDM connector — Firmware debugging and firmware loading interface • Current gain stage — The power meter uses only one operational amplifier to amplify the signal from the shunt • Bias circuit • UART connector • Infrared interface • Voltage divider

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PCB components placement

Figure 4-1. Power meter printed circuit board component placement

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Chapter 5 Calibration 5.1 Meter calibration There are two independent calibration procedures which must be performed to have the meter calibrated properly. As a first step, the HC9S08LH64 ADC has to be calibrated to have the accuracy and linearity claimed in the documentation. This calibration is done once only, and the calibration values are stored in FLASH memory. These calibration values are stored in the HC9S08LH64’s nonvolatile FLASH memory, and no external EEPROM is used. This also means, if new firmware is loaded, the calibration coefficient may be lost. To avoid this loss, the debugger/flasher must be set up correctly to skip the memory region containing the coefficients. The second calibration step is that the power meter values are measured. Although 1% components are used for the meter hardware — for the voltage divider and for the operational amplifier operational network to amplify the signal from the shunt resistor, the meter must be calibrated to achieve the accuracy required. Calibration is done by changing the calibration coefficient stored in FLASH memory. There are calibration coefficients for active power, voltage, current, phase correction (power factor), as well as date and time, and the pulse number may be set. For meter calibration, the FreeMASTER PC software is used.

5.2 ADC calibration

If ADC calibration coefficients are not present in FLASH memory, the power meter asks (on display) for calibration to be run after a power-on (battery must be removed). • Plug the meter into the power supply • If the ADC does not have a calibration coefficient, Calib appears on the display for 15 seconds • Press the user button

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Power Meter calibration

• If the calibration process finishes successfully, Calib will not appear any more. • If calibration failed, ERR calib appears on the display. You must then run the procedure again

5.3 Power Meter calibration FreeMASTER PC software is used for power meter calibration. Install FreeMASTER on your computer. Open the FreeMASTER project LH64PWMTRv1.pmp that comes with the software package. The connection must then be set. The RS232 serial bus is used for communication. The power meter offers a galvanic isolated RS232 bus. Open the FreeMASTER menu Project -> Options and Comm card, and choose the port used on the computer. Communication speed should be set to 9600bps.

Figure 5-1. FreeMASTER communication parameters setting

All variables shown in FreeMASTER take their actual address from the Project.abs file, so the path to this file must be set correctly.

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Chapter 5 Calibration

Figure 5-2. Path to the Project.abs file

To stop communication between a PC and power meter, the STOP icon must be pressed.

Figure 5-3. Communication enable/disable icon in the toolbar

In the FreeMASTER project file, there are several branches in a tree menu, such as Date and Time, PWMTR_calib, ADC_Calib, and Counters. Each branch shows a group of variables used for calibration or setting.

5.4 Date and Time setting

Date and time variables are stored in the corresponding values: • dt.date.year • dt.date.month • dt.date.day • dt.time.hour • dt.time.min • dt.time.sec LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012

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Date and Time setting

They can be found only in the non-initialized RAM memory. If the power supply is lost, the values are initialized to their default (1.5.2011, 02:03:04). If the battery is plugged in, real time is preserved during power outage. Day and time values have a binary coded hexadecimal format, and must be set in the following way. 10th May 2011, has the following format: dt.date.year = 0x11; dt.date.month = 0x05; dt.date.day = 0x10; 4 h:53 min:43sec, has the following format: dt.time.hour = 0x04; dt.time.min = 0x53; dt.time.sec = 0x43

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Chapter 5 Calibration

5.5 Analogue to digital converter calibration

Figure 5-4. ADC calibration coefficients

The HC9S08LH64’s ADC converter must be calibrated as described in the ADC calibration chapter. During the self-calibration process, the ADC calibration registers (black values) are changed to linearize the ADC transfer function, set the offset and gain. When the calibration process ends, the values are stored in FLASH and used during the next meter power-up. If the FLASH values are 0xFF, the ADC converter has not been calibrated which may affect the meter accuracy. LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

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Power meter calibration - software implementation

5.6 Power meter calibration - software implementation All values measured by the power meter must be calibrated.

Figure 5-5. Power meter values calibration

Calibration coefficients used by the power meter are stored in structure sCalib. typedef struct { sCalibSig u; sCalibSig i; sCalibSig p; UWord16 fi; Word32 pulsDivider; UWord8 psFiltOn; UWord8 pdFiltOn; UWord8 irfFiltOn;

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Chapter 5 Calibration }sCalib; where sCalibSig is typedef struct { Word16 offs; UWord16 gain; }sCalibSig;

There are two instances of the sCalib structure, in RAM and FLASH memory. The RAM instance calibRam is used in runtime for all processed calculations. On powerup, the calibRam variable instance is initialized from its FLASH counterpart calibFl. If the FLASH instance calibration constant is changed, the RAM instance must also be changed using FreeMASTER. Double-click the value and rewrite the desired value. To propagate this RAM located value to the FLASH counterpart, the _calib_sm variable (the red one) must be changed to 2 (choose the Write to FLASH item from the combo box menu). This will start the FLASH state machine and copy values from RAM to FLASH. Writing is executed in runtime and does not affect the meter's function.

5.7 Power factor calibration As the first step in the power meter calibration process, the power factor must be set correctly. Parameter calibRam.fi sets the time lag between sampling voltage and current. See the Section PCB components placement. A good practice is to set equivalent active and reactive loads and try to have the active and reactive values be the same. An absolute energy value does not matter. This will be calibrated in further steps. Increasing calibRam.fi adds an inductive part to the reactive load, whilst decreasing adds a capacitive part. calibRam.fi must be in the range or the software will crash.

5.8 Measurement calibration mathematical background The calibration process is executed in two steps. First an offset is added to the sample, and then a gain is applied. samplecalibrated = gain * (sampleorig + offset) Where: gain is the fraction gaincoefficient / 2048 LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

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Voltage calibration

gaincoefficient (variables like calibRam.u.gain, calibRam.p.gain) may be in the interval to prevent an arithmetic overflow.

5.9 Voltage calibration The voltage offset calibration value is calculated automatically in the power meter firmware. After the metering algorithm has locked to a mains zero-crossing event, the voltage mean value is calculated and this value is used as the offset calibration coefficient. The actual voltage offset is present in the calibRam.u.offs variable. The offset value calibFl.u.offs in the FLASH is used after start-up to speed up offset stabilization. The offset calibration coefficient is calculated automatically in the firmware for both the voltage and current. A “Write to FLASH” command will also update those values. The values must be stable prior. Voltage gain must be set after the offset value is stable. Voltage is calculated with the following formula

For example, if the voltage value on display is 200 V, the real voltage is 230 V, calibRam.u.gain = 2048, then change calibRam.u.gain to 2048*230/200 = 2355 and write value to the variable using FreeMASTER. Then check the actual voltage value on the display. If needed, the previous step may be repeated to get a better result. When the voltage value is accurate, set _calib_sm to “Write to FLASH” and store the setting to FLASH.

5.10 Power calibration Typically, power is calibrated in only a single point – gain. Differnt to voltage calibration, the power offset is not calibrated by means of software, but may be set by the user. Offset calibration is used if better power accuracy is needed for small loads. Then, calibration is done in two steps. The first step is setting the gain calibRam.p.gain. Gain is set in the same manner as voltage. Gain is typically set when a higher load is applied to obtain optimal performance (~0.7*Imax).

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Chapter 5 Calibration

The second step is to set the power offset. Offset should be set with some light load (~ Imin) to obtain optimal results. The offset value calibRam.p.offs is added to each sample, so a positive value will increase power while a negative value will decrease the actual power value. Both steps may be repeated several times to obtain optimal results. The same coefficients calibRam.p.offs and calibRam.p.gain are applied for reactive power calculation, so the reactive power does not need to be calibrated separately.

5.11 Pulse number setting The pulse number specifies how many pulses are sent to the LED for 1kWh. By default, there is a preset value of 2000 pulses/kWh. The pulse number may be changed in the following manner. The required pulse number is IMP_NUM = 10000imp/kWh calibRam.pulsDivider coefficient must be set calibRam.pulsDivider = (10000000000) / IMP_NUM The result must not have a remainder To get the pulse number to 10000 imp/kWh, the calibration coefficient must be set to calibRam.pulsDivider = 1000000

5.12 Filters setting There are several floating average filters used in the power meter algorithm and they may be switched on or off as needed. Instantaneous power is filtered by a floating average filter to obtain a smoother result variation over the LED energy pulse output. The filter has 32 taps, a power calculation is executed each 10 ms, the final filter time is therefore 320 ms. The filter may be switched on or off by the calibFl.psFiltOn coefficient. Instantaneous power displayed on the LCD display is also filtered by an average filter, 8 taps long. This filter may be switched on or off using the calibRam.pdFiltOn coefficient. These parameters have the same behavior as the previous coefficients and must be stored to FLASH memory using _calib_sm, after a turn on reset.

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Counter

5.13 Counter There is only one active energy counter, cnt.e. This counter is backed up in FLASH memory. To reset the counter value, rewrite its value and propagate to FLASH using _calib_sm as in previous cases.

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Chapter 6 Power Meter Accuracy 6.1 Power meter accuracy The power meter was tested in a certification lab for its accuracy. On the following charts there are accuracy measurements of two power meters, meter serial numbers 2 and 4. Accuracy is measured with different loads and different load power factors. There are three power factors used: PF = 1 PF = 0.5i PF = -0.8c. Each current point in the chart has been measured several times. The blue line represents an averaging out of all measurements for a single current setting, the red line is the maximal error among the samples, green the minimal error, and delta is (errmax-errmin).

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Power meter accuracy

-3,000

LH64 Power Meter 2, (5)60A, PF = 1, sw 3.0, single gain

2,000

1,500

EN 50470 Class B error limit 1,000

error [%]

0,500

0,000

-0,500

-1,000

-1,500 current [A] -2,000 error mean [%]

0,02

0,03

0,05

0,1

0,15

0,2

0,25

0,3

0,4

0,5

1

1,3

2

2,5

3

4

5

10

20

30

40

60

1,243

1,469

0,291

-0,268

0,390

0,437

0,121

0,353

0,173

-0,002

-0,028

0,084

0,164

0,162

0,112

0,039

0,041

-0,016

-0,082

-0,103

-0,052

-0,090

error max [%]

3,393

2,002

0,654

0,480

0,468

0,480

0,310

0,422

0,226

0,070

-0,005

0,134

0,204

0,186

0,128

0,102

0,052

0,048

-0,078

-0,024

0,327

0,255

error min [%]

-1,435

0,838

0,044

-0,742

0,311

0,354

0,001

0,321

0,110

-0,069

-0,043

0,036

0,138

0,114

0,096

-0,018

0,030

-0,223

-0,088

-0,128

-0,154

-0,138

Δ error [%]

4,828

1,164

0,610

1,222

0,157

0,126

0,308

0,101

0,115

0,139

0,038

0,098

0,066

0,072

0,032

0,120

0,022

0,272

0,010

0,104

0,481

0,392

time [sec]

160

100

65

80

100

80

60

50

40

30

40

30

20

16

13

10

8

4

8

5

15

10

Figure 6-1. Power meter 2, active energy, power factor 1

LH64 Power Meter 4, (5)60A, PF = 1, sw 3.0, single gain

2,000

1,500

EN 50470 Class B error limit 1,000

error [%]

0,500

0,000

-0,500

-1,000

-1,500

current [A] -2,000

0,02

0,03

0,05

0,1

0,15

0,2

0,25

0,3

0,4

0,5

1

1,3

2

2,5

3

4

5

10

20

30

40

60

error mean [%]

2,300

2,110

0,762

0,276

0,042

-0,085

-0,063

-0,187

-0,219

-0,251

-0,156

-0,120

-0,063

-0,056

0,021

0,058

0,031

-0,013

-0,053

-0,120

-0,052

-0,080

error max [%]

3,279

3,179

0,800

0,424

0,089

-0,041

0,086

-0,110

-0,162

-0,227

-0,133

-0,097

-0,014

-0,006

0,050

0,096

0,050

0,048

0,048

0,096

-0,026

-0,036

error min [%]

1,048

1,311

0,699

0,125

0,006

-0,140

-0,142

-0,233

-0,247

-0,292

-0,182

-0,132

-0,108

-0,096

-0,036

-0,002

-0,076

-0,216

-0,086

-0,115

-0,098

-0,138

Δ error [%]

2,231

1,869

0,102

0,299

0,083

0,099

0,229

0,123

0,085

0,065

0,049

0,035

0,094

0,090

0,086

0,098

0,126

0,264

0,134

0,212

0,072

0,102

time [sec]

160

100

65

80

100

80

60

50

40

30

40

30

20

16

13

10

8

4

8

5

15

10

Figure 6-2. Power meter 4, active energy, power factor 1

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Chapter 6 Power Meter Accuracy

LH64 Power Meter 2, (5)60A, PF = 0,5i, sw 3.0, single gain

2,000

1,500

EN 50470 Class B error limit 1,000

error [%]

0,500

0,000

-0,500

-1,000

-1,500

-2,000

current [A] 0,25

0,5

1

2,5

5

60

error mean [%]

0,233

0,322

0,120

0,399

0,280

0,175

error max [%]

0,329

0,704

0,170

0,687

0,394

0,408

error min [%]

0,094

0,019

0,082

0,291

0,204

0,072

Δ error [%]

0,235

0,685

0,088

0,396

0,189

0,336

time [sec]

130,00

60,00

80,00

30,00

16,00

20,00

Figure 6-3. Power meter 2, active energy, power factor 0.5

LH64 Power Meter 4, (5)60A, PF = 0,5i, sw 3.0, single gain

2,000

1,500

EN 50470 Class B error limit 1,000

error [%]

0,500

0,000

-0,500

-1,000

-1,500

-2,000 error mean [%]

current [A] 0,25

0,5

1

2,5

5

60

0,099

-0,059

0,119

-0,055

0,202

0,233

error max [%]

0,293

0,269

0,067

0,365

0,327

error min [%]

-0,041

-0,305

-0,117

0,110

0,144

0,026

Δ error [%]

0,335

0,575

0,184

0,255

0,183

0,382

time [sec]

130,00

60,00

80,00

30,00

16,00

20,00

0,408

Figure 6-4. Power meter 4, active energy, power factor 0.5

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

31

Power meter accuracy

LH64 Power Meter 2, (5)60A, PF = -0,8c, sw 3.0, single gain

2,000

1,500

EN 50470 Class B error limit 1,000

error [%]

0,500

0,000

-0,500

-1,000

-1,500 current [A]

-2,000

0,25

0,5

1

2,5

5

60

error mean [%]

0,148

-0,165

-0,078

0,048

-0,123

-0,248

error max [%]

0,400

-0,100

-0,006

0,108

-0,066

-0,182

error min [%]

-0,125

-0,261

-0,262

-0,022

-0,210

-0,289

Δ error [%]

-0,525

-0,161

-0,257

-0,130

-0,144

-0,107

time [sec]

70

40

50

40

10

15

Figure 6-5. Power meter 2, active energy, power factor -0.8

LH64 Power Meter 4, (5)60A, PF = -0,8c, sw 3.0, single gain

2,000

1,500

EN 50470 Class B error limit 1,000

error [%]

0,500

0,000

-0,500

-1,000

-1,500 current [A]

-2,000

0,25

0,5

1

2,5

5

60

error mean [%]

-0,268

-0,336

-0,205

-0,130

-0,087

-0,211

error max [%]

-0,129

-0,257

-0,179

-0,082

0,014

-0,170

error min [%]

-0,348

-0,463

-0,225

-0,158

-0,144

-0,273

Δ error [%]

-0,219

-0,206

-0,046

-0,076

-0,158

-0,104

time [sec]

70

40

50

40

10

15

Figure 6-6. Power meter 4, active energy, power factor - 0.8

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Chapter 7 Hardware 7.1 Power supply The power meter power supply is made from a capacitor divider. The main reason to use a capacitive divider is to keep the BOM cost low. The main disadvantages are a high reactive power and limited sourcing capabilities. By the European standard EN 50470, a power meter’s self-power consumption should not exceed 2 W in a current circuit (typically consumed on the shunt resistor), and 10 VA in the voltage circuit (typically the meter's self-consumption). The power supply shown in picture 16 is able to supply 3.7 V at 10 mA. Mains voltage is lowered on the capacitor C21 and current flows via diode D2 to the bulk capacitor C27. Resistor R2 limits the maximal current peak flowing via C21 during hot plug-in or other fast voltage transitions. Varistor U2 limits overvoltage on the mains to protect the voltage circuits of the power meter. Zener diode D1 limits the maximum voltage on the bulk capacitor C27 to 15 V. J2

A B

1

LINE_OUT

2

LINE_IN

GND

R2 30

U2 20S0271 L1 135 OHM@100MHZ 1 2

2

CON_3_TB

1

3

C

N

C21 470nF R40 1.0M

D1 1SMC12AT3

2

R41 1.0M

1 Vsupply D2 SM4007

Figure 7-1. Schematic — capacitive power supply

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Power supply

Voltage on the bulk capacitor C27 is regulated to 3.7 V on the linear voltage regulator U7. The batch of capacitors C30, C29, and C28 are used to smooth the output voltage. Zener diode D5 serves as protection of the voltage bus from over or undervoltages to avoid latch-up of the MCU. R7 68K

R8 33K

C22 0.1UF

GND Vsupply

U7

8

ADJ

C31 0.1UF

GND

OUT_INH

2 3 6 7

C27 470UF

+

OUT

1

VDD

5

GND1 GND2 GND3 GND4

4

IN

+ C30 47UF

LM2931CDG

GND

GND

GND

C28 0.1UF GND

D5 MMSZ5231BT1G

C29 100 PF GND

GND

GND

Figure 7-2. Power supply, linear stabilizer 3.7 V

VDDA

BAT54SW U5

2

2

1

C32 0.1UF

3

L2 1uH

1 GND

2

2

R17 0

TP8 VDDBCK

3

TP9

1

D6

1

C33 1.0UF

C37 100PF

BAT54CLT1

VDD

BT1

VDDA_AP

TP5

VDDAMCU

TP7

GNDA

1

L3

1uH

GND

2 GNDA

BATTERY

Figure 7-3. Schematic – battery backup

Average current consumption in the stop mode is 1.5 uA, keeping the RTC (using a 32.7 kHz oscillator and the TOD module), and KBI. When the LCD is lighting all segments there is an additional 1 uA current drawn in STOP mode. The CR2032 battery has 3 V at 220 mAh and a self-discharge < 2%, the battery can then supply the processor in STOP mode for ~ 8 years. LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 34

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Chapter 7 Hardware

To get a better noise background, the analogue and digital power supply buses are split by the L1 and L2 coils. The analogue power supply bus must be clean to get good measurement results.

7.2 LED energy pulse output There are several communication interfaces included in the design. The simplest one is the energy pulse output. The LED energy pulse output, blinks after a defined amount of energy (given by the pulse number) flows through the power meter. The LED power pulse output is used primarily for meteorology purposes and meter calibration. The pulse number of pulse/kWh may be set within FreeMaster. Optical energy pulse output is composed of the D13 LED and resistor R20. The same signal drives the opto-isolated output. An optocoupler may be used for small load switching with a maximum collector-to-emitter voltage of VCEO = 70 V, and a maximum collector current of up to 10 mA. Output from this interface is accessible on the J5 connector. L E D E n e rg y o u tp u t

TP14 LED_PULSE

R20 100

D13

2

1

VDD

LED RED

E n e r g y O u tp u t P u ls e In te r fa c e

U10

1

VDD

TP20 EOC_PULSE

4EOC_OE 1

R33 330

2 2

J5

EOC

A B

3EOC_OC

SFH6106-4

Figure 7-4. Schematic — open collector energy pulse output LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

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Infrared interface

7.3 Infrared interface The infrared IrDA interface consists of the Q1 Photo Transistor and the D12 IR emitting diode. The hardware complies with the EN62056-21 European standard.

7.4 RS232 interface

TP10 R18 330

TXD1

U8

2

TP11

3 TP12

VDD

1

4

D7 MMSD4148T1G

R19 4.7K

2

1

2 4 6 8 10 HDR 2X5

2

SFH6106-4

TP13

J4

1 3 5 7 9

D10 C39 MMSD4148T1G 2.2 UF 1 1 2

D9 MMSD4148T1G

4 GND R29 2K TP18 RXD1

TP16

1

U9

+

VDD

TP17

3

2

R30 1.0K

SFH6106-4

Figure 7-5. Schematic — RS232 bus

The opto-isolated RS232 interface is provided for setting calibration and monitoring purposes with FreeMASTER used as the PC interface. Rx and Tx signals are isolated using the U8 and U9 optocouplers. The MCU uses a standard TTL logic (0 to 3.3 V). The optocouplers are supplied from the VDD bus on the MCU side.

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Chapter 7 Hardware

The RS232 periphery uses a ± 12 V voltage level bus on the PC side. Positive supply voltage is stolen from the RTS signal, the negative voltage is taken out of the DTR and TXR signals via D9, and D7, and the charge is stored in the C39 bulk capacitor. Optocoupler electro-optical features limit the RS232 communication speed to a maximum of 14400 bps.

7.5 Display The 3.3 V LCD display with 110 segments is directly connected to the MCU’s LCD periphery. The MCU uses an internal charge pump with only four external capacitors (C15 – C18) to create the voltage levels needed for LCD driving. The LCD periphery provides contrast control and all bias voltages necessary for the LCD.

LCD16 LCD17 LCD18 LCD19 LCD20 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD43 LCD42 LCD41 LCD40 LCD39 LCD38

VDD

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19

R38 330 37

12 CHARACTERS

GND

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

BSS138LT1G Q2

LCD4 LCD5 LCD6 LCD7 LCD8 LCD9 LCD10 LCD11 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37

2

BK_LIGHT 1

LCD DISPALY

3

38

DS1 CC242-7002-001

Figure 7-6. Schematic - LCD display

7.6 Buttons The power meter uses two buttons for interaction. Push Button SW1 is used to change readings on the LCD display. The tamper button SW2 is used to simulate a tampering event. After it is pushed, the event and its corresponding time is written to the FLASH nonvolatile memory. A button press must be able to wake the MCU out of STOP3 mode, switches are connected to pins with the KBI function. Pull-up resistors in the KBI module are used to bias voltage on the pins to the VDD level. LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

37

Analogue values measurement

Button circuit topology with a capacitor is used to avoid cross current flow if a button is stacked. After the SW2 button is pressed, the corresponding capacitor C12 is grounded and the voltage level on the pin goes to logic low level for a brief moment (voltage drop on the internal pull-up). A minimal pull-up resistor of 17 ktogether with 270 nF, gives ~ 2mS of a voltage drop from VDD to a level close to the system ground when the button is pressed. T A M P E R B u tto n

P u s h B u tto n

SW_TAMPER SW1 C12 0.27uF 1

SW2 3

C13 0.27uF

2

SW1 3

1

2

D2F-01L

D2F-01L GND

GND

Figure 7-7. Schematic - buttons

7.7 Analogue values measurement For accurate power measurement, it is essential to sample the voltage and corresponding current flowing to the load in a precise time—simultaneously, and with the best possible accuracy. The HC9S08LH64 uses a 16-bit SAR AD Converter offering a 14.2 ENOB at 32AVG The power meter required accuracy is 5(60) A at 1% (B class described in the EN50470-3 European standard). This translates into the following table: Table 7-1. Power meter metrology current points Istart

Imin

Current [A]

0.02

0.25

Accuracy [%]

one pulse in 30 min 1.5

Itransition

Ireference

Imax

0.5

5

60

1

1

1

From the table, the dynamic range of the measured current is 1:240. Class B allows a 1.5% error in the interval ~ , therfore take a 1.5% accuracy into account.

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Chapter 7 Hardware

The ADC parameter (use ENOB for simplicity) required to meet the power meter measurement dynamic range of 240, with a specified accuracy of 1.5%, is The HC9S08LH64 provides an AD converter with a 14.2 ENOB sufficient for the current dynamic range defined. The accuracy of energy calculation is further improved by averaging in the calculation algorithm. The HC9S08LH64 provides a trimmable voltage reference based on the band gap diode. The voltage reference is used as the ADC converter reference voltage. This determines the ADC input signal range to . All signals measured must be conditioned to this level.

7.8 Voltage measurement signal path It is essential to measure voltage properly to get a precise power measurement. The power meter is designed for a nominal mains voltage of Un = 230 V. The power meter must properly measure voltage in the range * Un, the voltage circuit must then be designed to measure a 10% overvoltage. Nominal voltage Un = 230 VRMS Take a 10% overvoltage into account Umax = 10% * 230VRMS = 253VRMS Umaxpp = 253VRMS * 1.4142 * 2 = 715VPP The internal ADC reference voltage is 1.2 V, the signal must be fitted to the level of 1.2 Vpp The 0.6 V DC offset must be added to shift a negative signal a half wave above the GND. The voltage divider is made of the R23, R24, R25, and R26 resistors against R21, therefore: 660 k/ 1 k715 V / 1.2 V. The R24 resistor is biased by the 0.6 V DC offset signal (DC_BIAS) to add the DC offset to the fitted signal. Precise metal-film resistors are used to get a low noise background, low temperature coefficient, and a higher maximal voltage.

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39

DC_BIAS

Voltage measurement signal path

R21 1k

TP15 N

C43 47nF

R23 180k

R24 150K

R25 180k

R26 150K

D11 1 GNDA

VOLTAGE

C41 100PF

3 2

VDDA_AP

R27 51

GNDA

BAV99LT1

Figure 7-8. Schematic — voltage divider

The HC9S08LH64 has only one AD converter, therefore, it is not able to sample voltage and current simultaneously. To be able to sample voltage and current at exactly the same point on the waveform, you can phase shift the voltage signal to shift in time. To shift the voltage signal, the capacitor C is added to the voltage divider. There is a vector diagram in picture 26. DC BIAS 0.6V

I C

R1

R2

N

VOLTAGE

Un

Uo

GNDA

GNDA

Figure 7-9. Schematic simplified — voltage divider with a phase shifting capacitor

UR2

Un

UR1

α

I UC

Figure 7-10. Voltage divider vector diagram a potom unicode 03b1 pozor The mains voltage in the power CTRL+U meter Un is spread over C, R2 and R1. The Uo voltage numericka klavesnice nefunguje (connected to the ADC converter) is equal to the R1 voltage shifted by the DC voltage bias. LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 40

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Chapter 7 Hardware

UO=UR1 + DC_BIAS Capacitor C adds a phase shift to the voltage signal. The phase shift on the voltage signal path, together with the time delay introduced on other elements (operational amplifier, shunt resistor, and so on) and the corresponding error phase shift err, provides the possibility to sample the current and voltage signals simultaneously but at a different real time. phase shift α introduced on C

Correct sampling of voltage and current to remove phase shift error

u(t)

error phase shift on shunt resistor, operational amplifier etc. αerr

phase shift α + αerr

i(t) u(0) i(0)

OA

M U X

ADC

voltage and curren samples taken on same point on vaweform but in the different time

trigger

Figure 7-11. Voltage sample time shifting

To see an ADC sample timing in Table 7-2 . The voltage sample is postponed by 155 S against the current sample (~2.8 degrees on a 50 Hz sine wave), therefore the C40 – R21 combination together with the time delay on the Operational Amplifier should shift the voltage waveform by approximately this value. The parasitic phase shift on both signal paths have variations. A precise voltage sampling time should preferably be calibrated during the calibration process. See Section Power factor calibration. One sample here means a two channel measurement, voltage and current. The ADC setting determines the ADC measurement time (tcu and tci). The sample period (ts) and voltage to current time lag (tv) are set by the TPM2 timer modulo and compare time. See Section 16-bit SAR AD Converter setting

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

41

Current signal path

voltage sample tcu

current sample tci

voltage sample

current sample tci

voltage sample

t

tv ts

voltage sample tcu

t

tv ts

Figure 7-12. ADC sampling Table 7-2. ADC timing samples of voltage and current S

number of samples -> 64 sample per mains period (50Hz)

64*50=3200 samples

ts

Sampling time — both current and voltage samples are taken during this period, indicating that each measurement has the ideally allocated time of a half period

1/3200 = 312.5 uS

tci

Actual current sample conversion time — given by the ADC setting

129 uS

tcu

Voltage sample conversion time — given 100 uS by the ADC setting

tv

Voltage sample time lag against current 155 uS sample — ideally should be calibrated to get a precise phase shift compensation default value

D

voltage sample angle lag against current 2.8 degree sample (tv in degrees of the mains sine wave)

7.9 Current signal path Current flowing from the utility provider to the load is sensed on the shunt resistor. In the single phase systems, the shunt resistor may be used with the advantage that no galvanic isolation is needed. Shunt resistors are cheap, linear, and stable. The only restriction is the maximal allowed power loss on the sensing element. Maximal power loss in the current circuit by the European regulation EN 50470 is 2.5 VA for a class A meter and respectively 4 VA for B and C class meters.

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Chapter 7 Hardware

This limitation determines the maximal resistance of the shunt resistor to be 690 at 60 Amax. It is also an advantage to keep the shunt resistivity low to avoid heating the element when the current is high. A standard 170 shunt resistor is used in the design. As the maximal output voltage from the sensing element is R * I = 170 RMS = 10.2mVRMS , the voltage signal has to be amplified to 1.1 VPP and the 0.6 V DC offset must be added to fit the AD converter input range. A single stage operational amplifier with a gain of 31 (R3 / R5) is used to gain the signal. The low cost MC33501 rail to rail operational amplifier is used. The operational amplifier can operate up to 50 mV above the ground so the signal range must fall into the V interval. Get the peak-peak voltage value out of the RMS: 10.2 mVRMS * 2 * 1.4142 = 28,9 mVPP. Using a gain of 31, the signal has a ~900 mV output swing (28.9 mVPP * 31 = 900 VPP) The output signal is shifted by 0.6 V DC (DC_BIAS signal).

Figure 7-13. Shunt resistor connection

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43

DC bias circuit C23 10 PF R3 47k

VDDA_AP

LINE_OUT

U3

2

R5 1.5K R11 1.5K

TP2

VCC

4

-

3

+

1

R10 51

CURRENT

5

VEE MC33501SNT1G

R12 47k

LINE_IN

C26 100PF

GNDA

GNDA

DC_BIAS

Figure 7-14. Schematic — mains current sensing – shunt signal amplifier

Add an R-C filter to the ADC input. The capacitor should have a big enough value to be able to supply the necessary charge to the SAR sampling — hold capacitor to avoid accuracy deterioration.

7.10 DC bias circuit The 0.6 V DC voltage is used to shift AC signals to the V voltage range. DC voltage is divided on the R13 – R16 voltage divider and buffered on the U4 operational amplifier.

2

VDDA_AP

VDDA

R13 1.8K

GNDA

4

-

3

+

TP6

1

5

R16 1k

U4 VCC

DC_BIAS

VEE MC33501SNT1G

C36 0.1UF

C38 0.1UF

GNDA

GNDA

GNDA

Figure 7-15. Schematic — bias voltage

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Chapter 7 Hardware

7.11 MCU There is a BDM interface present that allows code download and debugging. As a bus clock reference, the 32.768 kHz quartz crystal is used to easily derive a second period for the RTC. C16 0.1UF

C17 0.1UF

C18 0.1UF

VDDAMCU

VDDAMCU GNDA

BK_LIGHT

15 16 32 29 20 17 18 19 28 24 27

PTD0/LCD0 PTD1/LCD1 PTD2/LCD2 PTD3/LCD3 PTD4/LCD4 PTD5/LCD5 PTD6/LCD6 PTD7/LCD7

GND

PTE1/LCD14 PTE2/LCD15 PTE3/LCD16 PTE4/LCD17 PTE5/LCD18 PTE6/LCD19 PTE7/LCD20

6 5 4 3 2 1 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 80 79 78 77 76 75 74

LCD8 LCD9 LCD10 LCD11 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37 LCD38 LCD39 LCD40 LCD41

LCD16 LCD17 LCD18 LCD19 LCD20

EXTAL

2

PTC0/RxD1 PTC1/TxD1 PTC2/TPM1CH0 PTC3/TPM1CH1 PTC4/TPM2CH0 PTC5/TPM2CH1 PTC6/ACMPO /BKGD/MS PTC7/IRQ/TCLK

33

LCD4 LCD5 LCD6 LCD7

14 13 12 11 10 9 8 7

PTB0/EXTAL PTB1/XTAL PTB2/RESET PTB4/MISO/SDA PTB5/MOSI/SCL PTB6/RxD2/SPSCK PTB7/TxD2/SS

VSSAD

39 RXD1 40 TXD1 EOC_PULSE 41 LED_PULSE 42 43 44 45 BKGD 46 INT

LCD8 LCD9 LCD10 LCD11 LCD12 LCD13/PTE0 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37 LCD38 LCD39 LCD40 LCD41

PTA0/SS/KBIP0/ADP4 PTA1/SPSCK/KBIP1/ADP5 PTA2/MISO/SDA/KBIP2/ PTA3/MOSI/SCL/KBIP3/ PTA4/KBIP4/ADP8/LCD43 PTA5/KBIP5/ADP9/LCD42 PTA6/KBIP6/ADP10/ACMP+ PTA7/KBIP7/ADP11/ACMP

VSS

VOLTAGE 47 SW_TAMPER 48 49 SW1 50 51 LCD43 52 R6 LCD42 21 VOLTAGE 100K 22 DC_BIAS R9 30 100K EXTAL 31 XTAL 34 RESET 35 36 37 RXD2 38 TXD2 R4 100K

DADM0 DADP0

23

VDD

26 25

VCAP1 VCAP2 VDD VDDAD VLCD VLL1 VLL2 VLL3 VREFH VREFL VREFO1

DC_BIAS CURRENT

VREFO1

C20 VDDBCK 0.1UF

U1

GND

Y1 32.768KHz

XTAL

1

GND

C15 0.1UF

MC9S08LH64CLK GNDA

Figure 7-16. MCU

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

45

MCU

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Freescale Semiconductor, Inc.

Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage 8.1 HC9S08LH64 MCU periphery, setting and use The HC9S08LH64 has a set of features and peripheries mixed to design a power meter based on this MCU.

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47

HC9S08LH64 MCU periphery, setting and use

I2C

COP

BDM

LVD

GPI/O

KBI

I2C

I2C

2ch 16-bit TPM

SPI

2xSCI

16-bit SAR

VREF

ACMP

4k RAM

TOD

DUAL FLASH ARRAY 2 x 32kB

ICS

S08 core 40MHz

LCD 8 x 36 = 288

Figure 8-1. HC9S08LH64 MCU block diagram

• The CPU, up to 40 MHz at 3.6 V to 2.1 V (1.8 V at 20 MHz), BDM debugging tool, 32 interrupt sources • 4 kB RAM • Up to 64 kB FLASH in two arrays, firmware update in runtime, and EEPROM emulation • Two ultra-low-power stop modes, low power run mode, and gated peripherals clock • 16-bit high speed SAR ADC, two result registers for shorter interrupt service routines, an internally connected TPM2 module for hardware triggering, hardware averaging, and differential input • Precise voltage reference of 1.2 V at 40 ppm/°C , trimmable by an 8-bit register through a 0.5 mV step LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 48

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Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage

• TPMx—Two 2-channel (TPM1 and TPM2), selectable input capture, output compare, buffered edge, or centre-aligned PWM on each channel • LCD 288 segment driver, low power consumption, internal charge pump • Time Of Date (TOD) module quarter second counter with a match register to keep the RTC, ultra low power external oscillator running in the STOP mode clocking the TOD • Analogue comparator, analogue comparator with selectable interrupt on rising, falling, or either edge of the comparator output. Compare option to a fixed internal reference voltage; outputs can be optionally routed to the TPM • SCIx — Two full-duplex non-return to zero (NRZ) modules (SCI1 and SCI2) Slave Extended Break Detection; wake-up on active edge • SPI — Full-duplex or single-wire bidirectional, double-buffered transmit and receive; Master or Slave mode, MSB-first or LSB-first shifting SPI, and SCI I2C • IIC — Inter-integrated circuit bus module to operate up to 100 kbps with maximum bus loading. Multi-master operation, programmable slave address, interrupt-driven byte-by-byte data transfer, Broadcast mode, and 10-bit addressing

8.2 Clock setting The power meter uses a 32.768 kHz crystal resonator as its main time reference. The FLL module multiplies this clock by 1216 to the 39.84 MHz used for the CPU. This signal is divided by 2 resulting in 19.9230656 MHz for the bus clock. The 32.768 kHz signal feeds the TOD module directly to keep the RTC, therefore the crystal must be oscillating in either STOP3 mode. Real time is refreshed in a one second period. The MCU wakes and refreshes the calendar. To achieve very low current consumption in both run and stop modes the oscillator runs in the low power mode. The FLL is set to multiply the input signal by 1216 ICSSC = ICSSC_DRST_DRS0_MASK | ICSSC_DMX32_MASK Output from the FLL is not divided (39.7 MHz is used for the CPU and 19.9 MHz for peripherals), and a low frequency range is used for the crystal oscillator (ICSC2_RANGE = 0) with a low gain (ICSC2_RANGE = 0) to achieve low standby current in the STOP mode, so crystal oscillation is enabled in both run and stop modes ICSC2 = ICSC2_LP_MASK | ICSC2_EREFS_MASK | ICSC2_ERCLKEN_MASK | ICSC2_EREFSTEN_MASK

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49

TOD setting

The FLL output is used as a clock source (ICSC1_CLKS = 0), and the external crystal oscillator output is used as an input to the FLL as it is (not divided) ICSC1 = 0; The HC9S08LH64 offers the possibility to gate the clock to the peripherals. To conserve energy, the clock to all modules is disabled (except the flash) by default, and enabled when the periphery is initialized. SCGC1 = 0 SCGC2 = SCGC2_FLS_MASK;

8.3 TOD setting The TOD module is used to keep the real time clock meaning the module must be fed by the clock in run and stop modes, so the TOD's clock input is directly connected to the crystal oscillator internally (OSCOUT signal). This signal is present even in the stop mode. The timer’s prescaler is set to generate a 4 Hz timebase out of the 32,768 kHz signal. The bus clock to the periphery is enabled. SCGC2_TOD = 1 The OSCOUT signal is the clock source to the module. TODC_TODCLKS = 0 The prescaler is set to divide the 32,768 kHz signal to the 4 Hz timebase. TODC_TODPS = 1 The module is enabled TODC_TODEN =1 One second interrupt is enabled - void tod_ISR(void) TODSC_SECIE = 1

8.4 16-bit SAR AD Converter setting To get precise data, the 16-bit SAR AD Converter is used for current and voltage measurement. Although the HC9S08LH64 has only a single converter sample current and voltage have to be measured, the converter offers some features to manage this; please refer to chapter 7.8 Voltage measurement signal path. In the following, initiate code and the proper ADC setting is shown.

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Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage

ADCCFG1 = ADCCFG1_ADIV1_MASK | ADCCFG1_ADLSMP_MASK | ADCCFG1_MODE0_MASK | ADCCFG1_MODE1_MASK The bus clock is selected as the clock source for the ADC ADCCFG1_ADICLK0 = 0, ADCCFG1_ADICLK1 = 0 The actual bus clock is 19 922.944 kHz therfore that the internal ADC clock (ADCK) is 4.98 Mhz, derived from the bus clock divided by 4 ADCCFG1_ADIV1 = 1 ADC resolution mode is set to 16-bit ADCCFG1_MODE0 = 1, ADCCFG1_MODE1=1 For lower impedance on the input, the long sample mode is selected ADCCFG1_ADLSMP=1 A long sample time is enabled in the step above and 6 extra clocks for charging the sample-hold capacitor are added ADCCFG2 = ADCCFG2_ADLSTS1_MASK A hardware trigger is used for initiating a conversion (ADCSC2_ADTRG=1). Timer TPM2 is the source of the triggering signal. ADCSC2 = ADCSC2_ADTRG_MASK | ADCSC2_REFSEL0_MASK The internal VREF module is used as the voltage reference ADCSC2_REFSEL0=1 TPM2 timer is selected as the source of the h/w interrupt SOPT2 = SOPT2_ADCTRS_MASK ADCSC3 = ADCSC3_AVGE_MASK | ADCSC3_AVGS1_MASK Hardware averaging is enabled ADCSC3_AVGE=1 it is set to 16 samples ADCSC3_AVGS1=1 The single conversion mode is set as h/w triggering is employed ADCSC3_ADCO = 0 The ADC converter channel A is set to measure voltage in the single ended mode LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

51

16-bit SAR AD Converter setting

ADCSC1A = 4; Channel B is used for current measurement in the differential mode. At the end of the channel B conversion, the ADC interrupt is called and both the voltage and current conversion result registers are read in the interrupt service routine _adc_isr(void). All power calculations are processed in the same routine. ADCSC1B = ADCSC1B_AIENB_MASK | ADCSC1B_DIFFB_MASK | 0 Enable MUX for voltage measurement, whereas differential channels (current measurement) are not MUXed APCTL1 |= APCTL1_ADPC4_MASK Conversion time of the ADC converter: The ADC Clock is 4.98 Mhz Complete conversion time (CT) is calculated using the following formula: CT = SFCAdder + AverageNum BCT + LSTAdder + HSCAdder SFCAdder — Single or first continuous time adder BCT — Basic conversion time LSTAdder — Long sample time adder HSDAdder — High speed conversion adder Table 8-1. ADC voltage measurement time Variable

Clock

SFCAdder

3+5

Average

16

BCT

25

LSTAdder

6

HSCAdder

0

Total ADC Clocks

504

Total [ms]

101.2

Table 8-2. ADC current measurement time Variable

Clock

SFCAdder

3+5

Average

16

BCT

31

LSTAdder

6

HSCAdder

0 Table continues on the next page...

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Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage

Table 8-2. ADC current measurement time (continued) Variable

Clock

Total ADC Clocks

648

Total [ms]

130.1

The 16-bit SAR ADC module must be calibrated before using; this is to achieve a defined accuracy. Calibration is executed in runtime once, during the power meter calibration and the calibration values are stored in the FLASH memory. Those values are then used to set the ADC calibration registers after start-up in normal operation.

8.5 Timer settings The timer TPM2 is used as the hardware trigger for the 16-bit SAR AD converter. The sampling frequency is 3200 samples/sec, which gives 64 samples per one mains wave at 50 Hz, which is the default frequency. The default sampling time ts (312.5 µS) is given by the TPM2 modulo setting. TPM2MOD = Bus Frequency / sampling frequency = 19922944 / 3200 = 6225 To initiate both ADC conversions (channel A and B), the TPM2 channel 0 and channel 1 compare events must arrive, therefore channel 0 and channel 1 compare registers (TPM2C0V, TPM2C1V) are set by default to 1 and TPM2MOD/2. The default time lag tv is the time between channel1 and channel2 compare events (see figure 34). The sampling frequency is variable and is controlled to keep the sampling frequency relative to the mains frequency, so that TPM2MOD and TPM2C1V change in the runtime. The sampling window (1/2 of the voltage sine wave long) is also controlled to start at 90 or 270 degrees. ADC conversion is triggered by a rising edge on the TIM2 timer channel output pads (TPM2CH0, TPM2CH1). The signal is wired internally and enabled in the SOPT2 register. A rising edge on the TPM2CH0 pad initiates ADC channel A conversion with parameters given by the ADCSC1A register, the result is stored in the ADCRA register. A rising edge on the TPM2CH1 pad initiates the ADC channel B conversion with parameters given by the ADCSC1B register, the result is stored in the ADCRB register.

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53

Timer settings

ADCB conversion ADCA conversion TMP2CH1 TMP2CH0 TMP2

0 1 2 3 .... 95 96 .... MOD 0 1 2 3 .... 95 96 .... MOD TMP2CH1 TMP2CH0 Compare Compare

Figure 8-2. TPM2 hardware triggering

See the following periphery initiate code: Enable the clock to the periphery SCGC1_TPM2 = 1 SCGC1_TPM2 = 1 TPM2C0SC = TPM2C0SC_MS0B_MASK |TPM2C0SC_ELS0A_MASK Timer channel 1 is set to edge-aligned PWM, the output set on compare TPM2C1SC = TPM2C1SC_MS1B_MASK |TPM2C1SC_ELS1A_MASK Timer channel 0 compare register is set to 1 TPM2C0V = TIM2_CH0_ADCTRG Timer channel 1 compare register is set to MODULO/2 TPM2C1V = calibFl.fi The timer modulo is set to 6225 TPM2MOD = TIM2_MODULO; The bus clock is used for the timer clock source TPM2SC = TPM2SC_CLKSA_MASK The timer prescaler is set to 1 TPM2SC_CLKSA = 1, TPM2SC_CLKSB = 0 The counter is reset to zero TPM2CNT = 0

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Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage

8.6 Timer 1 setting If the variable sampling mode is used, the TPM1 timer is used for the mains frequency measurement. The timer channel is used in the input capture mode where the Analogue Comparator output ACMPO is used as a capture event. The analogue comparator is connected to the mains, the comparator output toggles every 10 ms. Channel 0 captures on a rising edge only, therefore an interrupt must be triggered every 20 ms. To avoid multiple timer overflows, the input clock must be set appropriately (fclock < 65536 / .02). Comparator output is hardwired externally to the timer input TPM1CH0. Enable the clock to the periphery SCGC1_TPM1 = 1 Reset the timer counter TPM1CNT = 0 The bus clock (19922944 Hz) is divided by eight on the prescaler and used as the timer clock source (3276800 Hz) TPM1SC = TPM1SC_CLKSA_MASK | TPM1SC_PS0_MASK | PM1SC_PS1_MASK; Timer channel 0 is set to input capture mode, to capture on a rising edge only, and an interrupt is raised and processed within the _tim1_ch1cmp_isr(void) interrupt service routine. TPM1C1SC = TPM1C1SC_CH1IE_MASK | TPM1C1SC_ELS1A_MASK

8.7 Voltage reference The voltage reference is used to reference the 16-bit SAR ADC only, and is used in the tight regulation mode. VREF1SC = VREF1SC_VREFEN_MASK | VREF1SC_MODE1_MASK; Enable the reference VREF1SC_VREFEN = 1 In tight regulation mode VREF1SC_MODE1 = 1 Enable the clock to the periphery SCGC1_VREF1 = 1;

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

55

Analogue comparator

8.8 Analogue comparator The analogue comparator, together with the TIM1 module, monitors the voltage signal; see Figure 35. Comparator output is hardwired to the TPM1 timer input capture pin. The comparator is enabled, and the comparator's output is enabled. ACMPSC = ACMPSC_ACME_MASK | ACMPSC_ACOPE_MASK Enable the clock to the periphery. SCGC2_ACMP = 1

VOLTAGE DC_BIAS

R6 R9

(21) (22)

+ ACMP

(45)

R39

(42)

TMP1CH1

–

Figure 8-3. Zero-crossing detection

8.9 LCD module The LCD module is complex and with many registers to set, therefore not all registers are discussed. The design uses a display with 4 x 32 (backplane or frontplane) pins with 106 segments. Display pins LCD16 – LCD19 are set as backplanes,and the remaining are set as frontplanes. The LCD frame frequency interrupt is not needed. The charge pump is running during wait mode, and the setting for stop mode is changed in runtime (enabled for a given time period after a keypress event). LCDC1 = LCDC1_LCDSTP_MASK Enable the charge pump (The internal 1/3-bias is forced) LCDSUPPLY |= 0x80 Configures 2 Hz as the LCD blink frequency (blink only individual LCD segments) LCDBCTL = LCDBCTL_ BRATE1 Configure a 1/4 duty cycle and 128 as the LCD clock input divider (LCLK=3), therefore the LCD Waveform Base Clock = 256 Hz, VLL3 is driven externally LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 56

Freescale Semiconductor, Inc.

Chapter 8 HC9S08LH64 MCU Periphery, Setting and Usage

LCDC0 = LCDC0_LADJ1 | LCDC0_LADJ0 | LCDC0_VSUPPLY1 | LCDC0_LVSUPPLY0 When all other bits are configured, enable the LCD charge pump. LCDC0 |= LCDC0_ LCDIEN Enable the clock to the periphery SCGC2 |= SCGC2_LCD_MASK

8.10 Keyboard interrupt Keyboard interrupt periphery is used to detect three signals. Two of them have the user SW1 and SW2 buttons as their source (the tamper and user buttons), the third signal is used to sense supply voltage presence. All signals are active when a falling edge occurs. Appropriate pins set to the input state PTADD &= ~(KBI_SW_TAMP_MASK | KBI_SW1_MASK | KBI_VCC_MASK) Pull-ups are enabled for the tamper and user button signals. PTAPE = KBI_SW1_MASK | KBI_SW_TAMP_MASK KBI pins detect both edges and levels KBISC = KBISC_KBIMOD_MASK KBI pins with pull-ups enabled are pulled to VDD (up), detecting a falling edge. SW1, SW_TAMPER and VCC set to falling (0) KBIES = 0; Enable the KBI pins KBIPE= KBI_SW_TAMP_MASK | KBI_SW1_MASK | KBI_VCC_MASK Clear the interrupt flag and enable the periphery. KBISC_KBACK = 1; KBISC_KBIE = 1 Enable the clock to the periphery. SCGC2_KBI = 1

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

57

Keyboard interrupt

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 58

Freescale Semiconductor, Inc.

Chapter 9 Software 9.1 Software Power Meter MC9S08LH64 Power Meter Board

120/230V 50/60Hz 5(60)A

LCD Display

LCD

Phase output OA

shunt

Phase input

MC9S08LH64 M U X

GND

16 bit ADC SAR

GPIO

Energy LED ADC_isr, pwr calc

Open Collector Pulse Output

GPIO User button

voltage divider

sampling rate

Neutral

GPIO

VREF

CMP

GPIO Tampers

SPI Infrared IEC1107

TPM2 UART

TPM1

VDD

TPM1_isr

UART

RS232

Power TOD

GND

I2C

Battery 3V 32.768kHz

Figure 9-1. Software block diagram

The actual software package was compiled in Code Warrior 6.3 and may be found on the Freescale website (LH64_PWMTR_SW_V2).

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

59

Software

The HC9S08LH64 Power Meter uses a time domain based algorithm for power calculation. Sampling rate is 64 samples per one sine wave. The sampling rate is aligned to a mains zero-crossing signal so it changes together with line frequency. Reactive energy is calculated using a derivation of the voltage signal before multiplying by the current. Voltage and current values are calculated over a 1 sec measurement period. Please refer to ANXXX to see the algorithm used for energy calculation. The actual CPU requirements, including a lot of debugging information and FreeMASTER serial protocol support, are: Table 9-1. Hardware requirements Resource FLASH

16 kb

RAM

2 kB

CPU Use

50 %

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Freescale Semiconductor, Inc.

Appendix A Power Meter schematic A.1 Power meter schematic VREFO1 VREFO1

VDDAMCU VDDAMCU

VDDA_AP

VDDA_AP

VDDA_AP

C3 100PF

C2 0.1UF

C1 10UF GND

GND

C4 0.1UF GNDA

C6 0.1UF

GNDA

GNDA

+

C7 100PF

C9 C10 0.1UF 100PF

C8 47UF

GNDA

C11 0.1UF

GNDA

GNDA

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 37 38

C12 0.27uF

DS1 CC242-7002-001

1

SW2 3

GNDA

C13 0.27uF

2

R35 10.0K

SW1 3

1

BKGD

2

D2F-01L

C4, C5 place at VREF01 pin

5 3 1

6 4 2

RESET

LCD4 LCD5 LCD6 LCD7 LCD8 LCD9 LCD10 LCD11 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37

BSS138LT1G Q2

GND

VDDAMCU

1 Vsupply D2 SM4007

U1 DC_BIAS CURRENT

R7 68K

R8 33K

1 2

C22 0.1UF

GND Vsupply

U7

8

IN

4

2 3 6 7

C31 0.1UF

A

VDD

B VDDA_AP

EXT. POWER

U11

VDD C30 +

1 2 3 4 5

TP22

47UF

GND

C29 100 PF

C28 0.1UF

LM2931CDG

GND

GND

GND

D5 MMSZ5231BT1G

INT

TP5

VDD

TP24

R37 3.6K

TP23

R39 10.0K

VDDA_AP

D6

2

GND

C37 100PF

BAT54CLT1

VDD

2

1

R17 0

C23 10 PF

PTB0/EXTAL PTB1/XTAL PTB2/RESET PTB4/MISO/SDA PTB5/MOSI/SCL PTB6/RxD2/SPSCK PTB7/TxD2/SS PTC0/RxD1 PTC1/TxD1 PTC2/TPM1CH0 PTC3/TPM1CH1 PTC4/TPM2CH0 PTC5/TPM2CH1 PTC6/ACMPO /BKGD/MS PTC7/IRQ/TCLK PTD0/LCD0 PTD1/LCD1 PTD2/LCD2 PTD3/LCD3 PTD4/LCD4 PTD5/LCD5 PTD6/LCD6 PTD7/LCD7

TP7

PTE1/LCD14 PTE2/LCD15 PTE3/LCD16 PTE4/LCD17 PTE5/LCD18 PTE6/LCD19 PTE7/LCD20

6 5 4 3 2 1 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53

LCD8 LCD9 LCD10 LCD11 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37 LCD38 LCD39 LCD40 LCD41

80 79 78 77 76 75 74

VDDA_AP

LINE_OUT

D4 BAV99LT1 2

D3 BAV99LT1 1

3 1

L3

1uH

R5 1.5K

C24 0.01UF

3

2

R11 1.5K

C25 0.01UF

GNDA

3.7V

U3

TP2 R10 51

VCC

4

-

3

+

1

5V1

CURRENT

VEE MC33501SNT1G

R12 56k

LINE_IN

C26 100PF

GNDA

GNDA

DC_BIAS

VDDA_AP

LCD16 LCD17 LCD18 LCD19 LCD20 VDDA

R14 0

R13 1.8K

U4

TP6

-

3

+

1

DC_BIAS

VEE R16 1k

GNDA

RS232 Int

VCC

4

MC9S08LH64CLK

C34 47uF

C35 47uF

C36 0.1UF

MC33501SNT1G

C38 0.1UF

GNDA

1

68k||33k = 22.2kOhm, Vout = 3.7V

R3 56k

LCD8 LCD9 LCD10 LCD11 LCD12 LCD13/PTE0 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37 LCD38 LCD39 LCD40 LCD41

PTA0/SS/KBIP0/ADP4 PTA1/SPSCK/KBIP1/ADP5 PTA2/MISO/SDA/KBIP2/ PTA3/MOSI/SCL/KBIP3/ PTA4/KBIP4/ADP8/LCD43 PTA5/KBIP5/ADP9/LCD42 PTA6/KBIP6/ADP10/ACMP+ PTA7/KBIP7/ADP11/ACMP

GND

TP8 VDDBCK

3

TP9

BT1

C33 1.0UF

14 13 12 11 10 9 8 7

DADM0 DADP0

33

3

2 1

C32 0.1UF

BK_LIGHT

LCD4 LCD5 LCD6 LCD7

LED_PULSE

2

L2 1uH

39 RXD1 40 TXD1 EOC_PULSE 41 LED_PULSE 42 43 44 45 BKGD 46 INT

TP3 TP4

GNDA VDD

VDDAMCU

10 9 8 7 6

26 25

VOLTAGE 47 SW_TAMPER 48 49 SW1 50 51 LCD43 52 R6 LCD42 21 VOLTAGE 100K 22 DC_BIAS R9 30 100K EXTAL 31 XTAL 34 RESET 35 36 37 RXD2 38 TXD2 R4 100K

GND

GND

R36 3.6K

1

RESERVED NC2 NC1 DVDD AVDD DVSS AVSS SDA INT SCL MMA7660FC

GND

GND

BAT54SW U5

VDDA

VDD

5

OUT_INH GND1 GND2 GND3 GND4

+

GND

1

OUT

ADJ

J3

Power supply, linear stabilizer 3.7V

2

2

R41 1.0M

5

C21 1.5uF R40 1.0M

GNDA

2

L1 135 OHM@100MHZ 2

1

X2, 305V Just pad to connect Neutral

VDDAMCU

C20 VDDBCK 0.1UF

D1 1SMC12AT3

X2, 305V

GND

VREFO1

C19 0.047UF

N

C18 0.1UF

VSSAD

U2 20S0271

2

R2 30

TP1

B

GND

15 16 32 29 20 17 18 19 28 24 27

1

GND

C17 0.1UF

5

GND

VCAP1 VCAP2 VDD VDDAD VLCD VLL1 VLL2 VLL3 VREFH VREFL VREFO1

LINE_IN

C16 0.1UF

VSS

2

CON_3_TB

GND

GND

System Ground

3

C

C27 2200UF

GND

C15 0.1UF

23

B

LINE_OUT

Placed at U4

C14 L_IN, BKW-M-R0004-5.0 0.1 UF L_OUT and System Ground soldering pads only, do not assembly! is wired external connect to external shunt resistor

J1

D2F-01L

3 A

1

Placed at U3

R1 4.7

HDR_2X3

2

BK_LIGHT 1 J2

C6, C7, C8 place at VDDA and VREFH pin

VDD

VDD

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

GND

C5 100PF

SW_TAMPER SW1

R38 330 +

LCD DISPALY

VDDBCK

12 CHARACTERS

VDDBCK

LCD16 LCD17 LCD18 LCD19 LCD20 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD43 LCD42 LCD41 LCD40 LCD39 LCD38

VDD VDDBCK

Filters and Ground connections All caps are in 0805 package C1, C2, C3 place at MCU VDD pin

LED Energy output

2

1 GND

BATTERY

TP10

GNDA TXD1

R18 330

GNDA

U8

2

3

1

4

GNDA

GNDA

GNDA

TP11

J4

R19 4.7K

TP14

SFH6106-4

1

2 4 6 8 10 HDR 2X5

VDD

LED RED

U9

4 R29 2K VDD

D10 MMSD4148T1G 2

C39 2.2 UF

TP15

D9 MMSD4148T1G

TP16

C43 47nF

N

R23 180k

R24 150K

R25 180k

GND

R21 1k

R22 18.0K R27 51

R26 150K

D11 1

TP18

3

RXD1 TP19

1 1

VDDA

Infrared Interface

VDD

1

680.0

1 3 5 7 9

TP13

2

D13

2

+

R20 LED_PULSE

D7 MMSD4148T1G 2 1

DC_BIAS

TP12

VDD

2

R28 2.21K

3

R30 1.0K

TP17

GNDA VDDA_AP

Energy O

C41 100PF

2 GNDA

BAV99LT1

R31 22K

VOLTAGE

GNDA

SFH6106-4

R32 RXD2

1

U10

TP21

TXD2

GND

2

D12 TSAL4400

1

VDD

4

GND

1 TP20 EOC_PULSE

R34

R33 330

2 2

3

1 SFH6106-4

680.0 GND

Freescale Semiconductor RCSC

EOC_OE

2

C42 0.1UF

Q1 OP506B

J5

EOC

1. maje 1009 765 61 Roznov p. R. Czech republic, Europe

EXTAL

A

IR diode and phototransistor must be placed

2

1.0K

Y1 32.768KHz

B

EOC_OC XTAL

1

A

This document contains information proprietary to Freescale Semiconductor and shall not be used for to have 6.5mm in between engineering design, procurement or manufacture in whole or in part without the express written permission of Freescale Semiconductor. ICAP Classification: FCP: ____ FIUO: X PUBI: ____ Drawing Title: Designer: Radomir Kozub

S08LH64 Low-Cost Electricity Meter Ref. Design

Drawn by: Radomir Kozub

Page Title:

Approved: Radomir Kozub

Size C

Document Number

Date:

Tuesday, December 28, 2010

LH64EMETER Rev 01

00383 Sheet

1

of

1

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61

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 62

Freescale Semiconductor, Inc.

Appendix B PCB Layout B.1 PCB layout

Filters and Ground connections All caps are in 0805 package C1, C2, C3 place at MCU VDD pin

VREFO1 VREFO1

VDDAMCU VDDAMCU

VDDA_AP

VDDA_AP

VDDA_AP

C3 100PF

C2 0.1UF

C1 10UF GND

GND

C4 0.1UF GNDA

C6 0.1UF

GNDA

GNDA

+

C7 100PF

C9 C10 0.1UF 100PF

C8 47UF

GNDA

C11 0.1UF

GNDA

GNDA

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 37 38

C12 0.27uF

DS1 CC242-7002-001

1

SW2 3

GNDA

C13 0.27uF

2

R35 10.0K

SW1 3

1

BKGD

2

D2F-01L

5 3 1

6 4 2

RESET

LCD4 LCD5 LCD6 LCD7 LCD8 LCD9 LCD10 LCD11 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37

BSS138LT1G Q2

GND

VDDAMCU

1 Vsupply D2 SM4007

U1 DC_BIAS CURRENT

R7 68K

R8 33K

1 2

C22 0.1UF

GND Vsupply

U7

8

IN

4

2 3 6 7

C31 0.1UF

A

VDD

B VDDA_AP

EXT. POWER

U11

VDD C30 +

1 2 3 4 5

TP22

47UF

GND

C29 100 PF

C28 0.1UF

LM2931CDG

GND

GND

GND

D5 MMSZ5231BT1G

INT

TP5

VDD

TP24

R37 3.6K

TP23

R39 10.0K

VDDA_AP

D6

2

GND

C37 100PF

BAT54CLT1

VDD

2

1

R17 0

C23 10 PF

PTB0/EXTAL PTB1/XTAL PTB2/RESET PTB4/MISO/SDA PTB5/MOSI/SCL PTB6/RxD2/SPSCK PTB7/TxD2/SS PTC0/RxD1 PTC1/TxD1 PTC2/TPM1CH0 PTC3/TPM1CH1 PTC4/TPM2CH0 PTC5/TPM2CH1 PTC6/ACMPO /BKGD/MS PTC7/IRQ/TCLK PTD0/LCD0 PTD1/LCD1 PTD2/LCD2 PTD3/LCD3 PTD4/LCD4 PTD5/LCD5 PTD6/LCD6 PTD7/LCD7

TP7

PTE1/LCD14 PTE2/LCD15 PTE3/LCD16 PTE4/LCD17 PTE5/LCD18 PTE6/LCD19 PTE7/LCD20

6 5 4 3 2 1 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53

LCD8 LCD9 LCD10 LCD11 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37 LCD38 LCD39 LCD40 LCD41

80 79 78 77 76 75 74

VDDA_AP

LINE_OUT

D4 BAV99LT1 2

D3 BAV99LT1 1

3 1

L3

1uH

R5 1.5K

C24 0.01UF

3

2

R11 1.5K

C25 0.01UF

GNDA

3.7V

U3

TP2 R10 51

VCC

4

-

3

+

1

5V1

CURRENT

VEE MC33501SNT1G

R12 56k

LINE_IN

C26 100PF

GNDA

GNDA

DC_BIAS

VDDA_AP

LCD16 LCD17 LCD18 LCD19 LCD20 VDDA

R14 0

R13 1.8K

U4

TP6

-

3

+

1

DC_BIAS

VEE R16 1k

GNDA

RS232 Int

VCC

4

MC9S08LH64CLK

C34 47uF

C35 47uF

C36 0.1UF

MC33501SNT1G

C38 0.1UF

GNDA

1

68k||33k = 22.2kOhm, Vout = 3.7V

R3 56k

LCD8 LCD9 LCD10 LCD11 LCD12 LCD13/PTE0 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD28 LCD29 LCD30 LCD31 LCD32 LCD33 LCD34 LCD35 LCD36 LCD37 LCD38 LCD39 LCD40 LCD41

PTA0/SS/KBIP0/ADP4 PTA1/SPSCK/KBIP1/ADP5 PTA2/MISO/SDA/KBIP2/ PTA3/MOSI/SCL/KBIP3/ PTA4/KBIP4/ADP8/LCD43 PTA5/KBIP5/ADP9/LCD42 PTA6/KBIP6/ADP10/ACMP+ PTA7/KBIP7/ADP11/ACMP

GND

TP8 VDDBCK

3

TP9

BT1

C33 1.0UF

14 13 12 11 10 9 8 7

DADM0 DADP0

33

3

2 1

C32 0.1UF

BK_LIGHT

LCD4 LCD5 LCD6 LCD7

LED_PULSE

2

L2 1uH

39 RXD1 40 TXD1 EOC_PULSE 41 LED_PULSE 42 43 44 45 BKGD 46 INT

TP3 TP4

GNDA VDD

VDDAMCU

10 9 8 7 6

26 25

VOLTAGE 47 SW_TAMPER 48 49 SW1 50 51 LCD43 52 R6 LCD42 21 VOLTAGE 100K 22 DC_BIAS R9 30 100K EXTAL 31 XTAL 34 RESET 35 36 37 RXD2 38 TXD2 R4 100K

GND

GND

R36 3.6K

1

RESERVED NC2 NC1 DVDD AVDD DVSS AVSS SDA INT SCL MMA7660FC

GND

GND

BAT54SW U5

VDDA

VDD

5

OUT_INH GND1 GND2 GND3 GND4

+

GND

1

OUT

ADJ

J3

Power supply, linear stabilizer 3.7V

2

2

R41 1.0M

5

C21 1.5uF R40 1.0M

GNDA

2

L1 135 OHM@100MHZ 2

1

X2, 305V Just pad to connect Neutral

VDDAMCU

C20 VDDBCK 0.1UF

D1 1SMC12AT3

X2, 305V

GND

VREFO1

C19 0.047UF

N

C18 0.1UF

VSSAD

U2 20S0271

2

R2 30

TP1

B

GND

15 16 32 29 20 17 18 19 28 24 27

1

GND

C17 0.1UF

5

GND

VCAP1 VCAP2 VDD VDDAD VLCD VLL1 VLL2 VLL3 VREFH VREFL VREFO1

LINE_IN

C16 0.1UF

VSS

2

CON_3_TB

GND

GND

System Ground

3

C

C27 2200UF

GND

C15 0.1UF

23

B

LINE_OUT

Placed at U4

C14 L_IN, BKW-M-R0004-5.0 0.1 UF L_OUT and System Ground soldering pads only, do not assembly! is wired external connect to external shunt resistor

J1

D2F-01L

3 A

1

Placed at U3

R1 4.7

HDR_2X3

2

BK_LIGHT 1 J2

C6, C7, C8 place at VDDA and VREFH pin

VDD

VDD

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

GND

C5 100PF

SW_TAMPER SW1

R38 330 +

LCD DISPALY

VDDBCK

12 CHARACTERS

VDDBCK

LCD16 LCD17 LCD18 LCD19 LCD20 LCD21 LCD22 LCD23 LCD24 LCD25 LCD26 LCD27 LCD43 LCD42 LCD41 LCD40 LCD39 LCD38

VDD VDDBCK

C4, C5 place at VREF01 pin

LED Energy output

2

1 GND

BATTERY

TP10

GNDA TXD1

R18 330

GNDA

U8

2

3

1

4

GNDA

GNDA

GNDA

TP11

J4

R19 4.7K

TP14

SFH6106-4

1

2 4 6 8 10 HDR 2X5

VDD

LED RED

U9

4 R29 2K VDD

D10 MMSD4148T1G 2

C39 2.2 UF

TP15

D9 MMSD4148T1G

TP16

C43 47nF

N

R23 180k

R24 150K

R25 180k

GND

R21 1k

R22 18.0K R27 51

R26 150K

D11 1

TP18

3

RXD1 TP19

1 1

VDDA

Infrared Interface

VDD

1

680.0

1 3 5 7 9

TP13

2

D13

2

+

R20 LED_PULSE

D7 MMSD4148T1G 2 1

DC_BIAS

TP12

VDD

2

R28 2.21K

3

R30 1.0K

TP17

GNDA VDDA_AP

Energy O

C41 100PF

2 GNDA

BAV99LT1

R31 22K

VOLTAGE

GNDA

SFH6106-4

R32 RXD2

1

U10

TP21

TXD2

GND

2

D12 TSAL4400

1

VDD

4

GND

1 TP20 EOC_PULSE

R34

R33 330

2 2

3

1 SFH6106-4

680.0 GND

Freescale Semiconductor RCSC

EOC_OE

2

C42 0.1UF

Q1 OP506B

J5

EOC

1. maje 1009 765 61 Roznov p. R. Czech republic, Europe

EXTAL

A

IR diode and phototransistor must be placed

2

1.0K

Y1 32.768KHz

B

EOC_OC XTAL

1

A

This document contains information proprietary to Freescale Semiconductor and shall not be used for to have 6.5mm in between engineering design, procurement or manufacture in whole or in part without the express written permission of Freescale Semiconductor. ICAP Classification: FCP: ____ FIUO: X PUBI: ____ Drawing Title: Designer: Radomir Kozub

S08LH64 Low-Cost Electricity Meter Ref. Design

Drawn by: Radomir Kozub

Page Title:

Approved: Radomir Kozub

Size C

Document Number

Date:

Tuesday, December 28, 2010

LH64EMETER Rev 01

00383 Sheet

1

of

1

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 Freescale Semiconductor, Inc.

63

LH60 Single Phase Power Meter Reference Design, Rev. 0, 7/2012 64

Freescale Semiconductor, Inc.

How to Reach Us: Home Page: www.freescale.com

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Document Number: DRM133 Rev. 0, 7/2012

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