LC-3 Control and FSM Design

ECE 238L

LC3-Control Page 1

1

Input Forming Logic

Current State

Output Forming Logic

LC-3 Datapath

F F F F F F

ECE238L

LC3-3 Page 2

© 2006

Current State IFL

F F

Datapath Control OFL

LC-3 Datapath

F F F F

Next State Datapath Status ECE238L

LC3-3 Page 3

© 2006

Instruction Fetch 1. Copy PC contents to MAR

ldMAR

enaPC

enaPC = 1 & ldMAR= 1

ldPC PC

selPC

2. Perform memory read selMDR=1

& ldMDR=1

Increment PC selPC = 00 & ldPC = 1 selMDR

3. Copy memory output register contents to IR

B

enaMDR = 1 & ldIR = 1

ldMDR

ldIR

A

ALU

IR

enaMDR

ECE238L

LC3-3 Page 4

© 2006

Fetch Control Sequence Current State

Next State

selMDR

ldMDR

enaMDR

ldIR

0

0

1

1

1 xx 0

x

0

0

0

0

1

1

0

0

0 00 1

1

1

0

0

1

0

1

1

0

0 xx 0

x

0

1

1

1

1

--

--

?

?

?

?

?

?

??

ECE238L

ldPC

ldMAR

0

Q1 Q0 N1 N0

selPC

enaPC

Outputs

?

LC3-3 Page 5

© 2006

The Control Logic

ECE238L

LC3-3 Page 6

© 2006

IFL Flip Flops

IR N

ECE238L

Z

selMDR

ldMDR ldMAR

memWE

ldPC ldIR

selPC

enaMARM enaALU enaMDR enaPC

selEAB1 selEAB2 selMAR

nzpMatch

aluControl

regWE

DR SR1 SR2

The Control Logic

OFL

P LC3-3 Page 7 © 2006

LC3-DC

enaMARM

enaPC

PC

Designing The LC-3 Control

B

A

ALU IR enaALU enaMDR

ECE 238L

LC3-Control Page 8

8

The Von Neumann Model • • •

Fetch an instruction Execute it Fetch the next instruction continue ...

Execute

Fetch

ECE238L

LC3-3 Page 9

© 2006

The Fetch Cycle 1. 2. 3.

PC ÎMAR PC Î PC+1, Mem[MAR] Î MDR MDR Î IR

Fetch0

enaPC ldMAR

selPC