Master thesis 2009
A Guideline for Material Design of Gate Oxide in Further Scaled MOSFET ~Improvement of electrical properties by CeO2/La2O3 stack structure~ Supervisor Professor Hiroshi Iwai
Department of Electronics and Applied Physics Interdisciplinary Graduate School of Science and Engineering Tokyo Institute of Technology
07M36123 Miyuki Kouda 1
CONTENTS Chapter 1
Introduction…………………………………………………1
1.1
Background of This Study…………………………………………………...2
1.2
Scaling Method………………………………………………………...……3
1.3
Scaling Limits of Traditional SiO2 Gate Dielectric………………………..4
1.4
Requirements for High-k Dielectric Gate Insulator………………………6
1.5
Fixed Charges in La 2O3……………………………………………………..9
1.6
The Method for Charge Reduction…………………………….…………12
1.7
Propose of This Work…………………………………………………...…14
Chapter 2 2.1
Fabrication and Characterization Methods…….……….15
Experimental Procedure ………………………………………………….16
2.1.1
Fabrication Procedure for nMOS Capacitors………………………………16
2.1.2
Fabrication Procedure for nMOSFETs………………………………….….17
2.1.3 Silicon Surface Cleaning Process ………………………………….………..18 2.1.4 Electron-Beam Evaporation Method………………………………………..19 2.1.5
2.2
Rapid Thermal Annealing (RTA) Method …………………...……………..20
Measurement Methods…………………………………………………….21
2.2.1
Capacitance-Voltage(C-V) Measurement…………………………..………21
2.2.2
Gate Leakage Current – Voltage (J-V) Characteristics…………………...25
2.2.2.1
Schottky Effect….……………………………………………25
2.2.2.2
Poole-Frenkel Effect………………………...……………….27
2.2.2.3
Fowler-Nordheim Tunneling Effect…………………………30
2.2.2.4
Image-force Effect…..................................................................31
2.2.3 Threshold Voltage…………………………………………………………….32 2.2.4 Subthreshold Slope…………………………………….……………………..33 2.2.5
Mobility Extraction Technique ~Split C-V Measurement~………………..34
2.2.6
Charge Pumping methods…………………………………………………....37
2.2.7
XPS Measurement……………………………………………...…………….40
Chapter 3 Characteristics of MOS Capacitor…………………………42 3.1 3.2
Introduction…………………………………………….………………….43 Analysis of Leakage Current…………………………………………….43 2
3.2.1 Leakage Mechanism of Each Layered Capacitors…………………………43
3.2.1.1
CeOX Single Layered Capacitor …………………….…….43
3.2.1.2
La2O3 Single Layered Capacitor ……………………………..45
3.2.1.3
Stack Structured Layer………………………………………46
3.2.1.4
Conclusion……………………………………………………..49
3.2.2 Leakage current value………………………………………………………..50
3.3
3.2.2.1
The Trap Density in Film……………………………………..50
3.2.2.2
Compared Leakage Current Value………………………….51
3.2.2.3
Conclusion……………………………………………………..53
Fixed Charge in Dielectric Film…………………………………… ……………54 3.3.1
Calculation Method of Fixed Charge………………………………..………54
3.3.2 Quantifying Fixed Charge in Each Film …………………………….……57 3.3.3
Comparison of the Each Qit …………………………………………………59
3.3.4
Change of Vfb Value …………………………………………………….……62
3.3.5
Physical Thickness-Related Vfb Values Rapidly Change ……………….…63
3.3.6
Conclusion……………………………………………………………….……64
Chapter 4
Characteristic of MOSFET………………………….……65
4.1
Introduction………………………………………………………..………66
4.2
Drain current (Id) - Drain voltage (Vd) characteristics…………...……..66
4.3
The Effective Mobility ……………………………………………….……68
4.4
Characterization of Interface States by Charage Pumping Method……68
4.5
Consideration of Film Structure…………………………………………..70
4.6
Conclusion…………………………………………………………….……72
Chapter 5
Analysis of Theoretical Calculation…………..…………..73
5.1
Introductions……………………………………………………………….74
5.2
First-principles rationale …………………………………………………74
5.3
Density-Functional Theory (DFT)………………………………..………75
5.4
Local Density Approximations (LDA) …………………………………...76
5.5
Charge Defects Calculation…………………………………….…………78
5.6
5.5.1
Formation Energy …………………………………………………………..79
5.5.2
Concentration of Charge Defects in La2O3……………………..………….82
5.5.3
Expansion into the Other Materials………………………………………..86
The Decision of Sample Structure Used Oxygen Potential Diagram….88
3
5.7
Conclusion………………………………………………………………...89
Chapter 6
Conclusion…………………………………………….......90
6.1 Results of This Study……………………………………………………..….91 6.2 Furture Works……………………………………………...………….…….92
References……………………………………………………………..…93 Acknowledgement……………………………………………………….95
4
Chapter 1 Introduction 1.1 1.2 1.3 1.4 1.5 1.6 1.7
Background of This Study Scaling Method Scaling Limits of Traditional SiO2 Gate Dielectric Requirements for High-k Dielectric Gate Insulator Fixed Charges in La2O3 The Method for Charge Reduction Propose of This Work
5
1.1 Background of This Work Today, the modern human society are becoming affluent for high technology electric products such as personal computer, mobile phones, video game machines, digital cameras, and human-like robot. These products are used various ultra-large-scale integration
(ULSI).
The
Metal-Oxide-Semiconductor
Field
Effect
Transistors
(MOSFETs) are the basic building block of the current ULSI integrated circuits (ICs). The performance of silicon ULSI depends on the capability of the MOSFET, especially the processing speed and electrical power dissipation which are hanged on the geometrical size of MOSFET. Gordon Moore who is one of the founder of Intel Corporation, predicted that exponential growth in the number of transistors per integrated circuit and predicted this trend would continue, in a popular article written in 1965[1]. Figure1.1 shows Moore’s original prediction. His prediction is popularly known as “Moore’s Law”. Moore’s Law states that the number of transistors on integrated circuits doubles approximately every 24 months, resulting in higher performance at lower cost. This simple statement is the foundation of semiconductor and computing industries. It is the basis for the exponential growth of computing power, component integration that has stimulated the emergence of generation after generation of PCs and intelligent devices. As a practical matter, figure1.2 shows that the number of transistors on the intel’s Central Processing Unit (CPU), with the first microprocessor, 4004, to the recent Pentium R 4 microprocessor. The total number of transistors on microprocessor was increased double every 18-24 months. It was applied well to the Moore’s Law. [2]
6
1.2 Scaling Method The downsizing has been accomplished by the scaling method.
In this method,
horizontal and vertical dimensions such as oxide thickness and supply voltage are decreased by the factor S, but Si-substrate impurity doping density is increased by the factor S.
W tox
W/S tox/S
ND
L
ND
ND*S
L/S NA*S
NA
Fig.1.1 Scaling method
Table. 1.1 Scaling of MOSFET by a scaling factor of S. Quantity
Before
After scaling
scaling Channel length
L
L’ = L/S
Channel width
W
W’ = W/S
Device area
A
A’ = A/S2
Gate oxide thickness
tox
tox’ = tox/S
Gate capacitance per
Cox
Cox’ = S*Cox
Junction depth
xj
xj’ = xj/S
Power supply voltage
VDD
VDD’ =
unit area
VDD/S Threshold voltage
VT0
VT0’ = VT0/S
Doping densities
NA
NA’ = S*NA
ND
ND’ = S*ND
7
1.3 Scaling Limits of Traditional SiO2 Gate Dielectric As mentioned in the previous section, the MOS transistors, which are main part of LSI system, must be miniaturized to obtain better performance and bring down costs. And the gate dielectric, which separates the gate electrode from carrier passage, must also be thinner following the scaling law. Silicon dioxide (SiO2) has been used for transistor gate dielectrics for nearly 30 years because SiO2 is compatible with silicon substrate: SiO2 formed perfect gate dielectric material for silicon. For three decade, SiO2 has successfully scaled from a thickness of 100 nm 30 years ago to a mere 1.2nm at the present. However, as transistor geometries scale to the point where the traditional SiO2 gate dielectric film becomes just a few atomic layers thick, direct tunneling current leakage and the resulting increase in power dissipation and heat become critical issues. This direct tunneling current leakage is proportional to the equation as follow. I ∝ exp{ −(mφ)·D}
(1.1)
Whrer, m: electron effective mass,φ:barrier height, D:physical thickness of gate oxide. This equation indicates that the thicker gate dielectric film becomes, the lower gate tunneling current. Conversely, if a thickness of gate dielectric film becomes thinner, the gate tunneling current leakage increases. Figure 1.2 shows the relationships between gate leakage current density and EOT (Equivalent Oxide Thickness). The gate leakage current density reaches 600 [A/cm2] as a thickness of SiO2 thins down to 1nm. Furthermore, the gate leakage current becomes 1 [kA/cm2] in the case of 0.8nm. As shown in table 1.2, EOT value in high performance logic technology will get 1nm in 2007. Consequently, SiO2 as a gate oxide film reaches its limit so that new materials for gate dielectrics are required to continue geometrical scaling down of MOS transistors. Figure 1.2: The
8
relationships between the gate leakage current density and EOT. Gate leakage current continues to increase as far as SiO2 is used for gate dielectric.
Fig.1.2
The relationships between the gate leakage current density and EOT.
Gate leakage current continues to increase as far as SiO2 is used for gate dielectric.
Table 1.2 ITRS 2007 up date Year of Production
2005
2007
2010
2014
2018
Physical Gate Length (nm)
32
25
18
11
7
EOT (nm)
1.1
0.9
0.7
0.6
0.5
Gate Leakage Current Density (A/cm2)
5.20*102
5.20*102
5.20*103
5.20*103
5.20*104
9
1.4 Requirements for High-k Dielectric Gate Insulator The replacing SiO2 to high-k material for gate insulator is good solution to decrease tunnel leakage current. The direct-tunneling leakage current (JDT) flowing through a gate insulator film is determined by the tunneling probability of carrier. The tunneling probability of carrier (DDT) is shown in below equation where physical thickness of insulator (d), electron effective mass in the gate insulator film (m*) and barrier height of insulator (φb).
J DT
D DT
4 d ( 2m * h
exp{
b
)
1 2
}
Relationship between physical thickness of SiO2 (d EOT) and physical thickness of high-k gate insulator (d) obtained by the same gate capacitance value (C) is shown in below equation where dielectric constant of SiO2 (εox) and high-k gate insulator (εhigh-k).
C d
high k
ox
d ox
d EOT d EOT
high k
Therefore, the gate leakage current can be suppressed by using high-k materials, which means that the physical thickness of high-k films can be thicken without changing EOT. Table 1.3 shows materials a periodic table. Oxides in white square are capable for using as gate insulators.
Table 1.4 shows major high-k materials.
Four main
requirements for gate insulators are scribed below. (1) A large energy of formation, so it does not react with Si to form SiO2 or silicides.
10
(2)Low diffusion coefficients of oxygen, to withstand high processing temperatures. (3) They should form high quality interfaces with Si, so as not to degrade the carrier mobility by interfacial defects or roughness. (4)They should have potential barriers of over 1 V for both electrons and holes to give low leakage currents by Schottky emission into the oxide conduction or valence band. There are many reports about HfO2 ZrO2 and Al 2O3.
Al 2O3 has good interface
condition but it has smaller dielectric constant than other high-k materials. HfO2 and ZrO2 are easily reacted with Si to form SiO2 or silicides. There are some rare earth metal oxides like La2O3, Pr2O3 and Gd2O3.
These rare earth metal oxides have large
dielectric constant to reduce tunnel leakage current and stability with Si.
These
materials are expected to suit for gate insulators of MOSFETs. SiO2( =3.9) Physical thickness=1nm
Physical thickness=10nm
e-
High-k ( =39)
eeEOT=1nm
EOT=1nm
e-
e-
Direct tunneling current flows
Direct tunneling current is suppressed
Fig. 1.3 Schematic description of differences between the cases using (a) SiO2 and (b) high-k material for gate insulator in
11
Table 1.3 Candidates for the metal, oxide of which has possibility to be used as high-k gate insulator on periodic table. ●
●＝Noｔ a solid at 1000 K
●
H
○＝ Radioactive
He
①＝Failed reaction 1： Si + MOｘ → M + SiO2 Li
Be ②＝Failed reaction 2： Si + MOｘ → MSix + SiO2
①
⑥＝Failed reaction 6： Si + MOｘ → M + MSixOy
Na
K
Mg
Ca
Sc
Sr
●
⑥
Cs
Ba
○
○
Fr
Ra
Y
R
A
●
●
●
●
●
B
C
N
O
F
Ne
●
●
●
●
Al
Si
P
S
Cl
Ar
②
①
①
①
①
①
①
①
①
①
①
●
●
●
●
Ti
V
Cr
Mn
Fc
Co
Ni
Cu
Zn
Ga
Ge
As
Se
Br
Kr
①
①
①
①
①
●
①
①
①
①
①
●
●
Nb
Mo
Tc
Ru
Rb
Pd
Ag
Cd
In
Sn
Sb
Te
I
Xe
①
①
①
①
①
●
●
●
●
①
①
○
○
○
Hf
Ta
W
Re
Os
Ir
Pt
Au
Hg
Tl
Pb
Bi
Po
At
Rn
○
○
○
○
○
○
Rf
Ha
Sg
Ns
Hs
Mt
● Rh
●
Zr
○ R La
Ce
Pr
Nd
Pm
Sm
Eu
Gd
Tb
Dy
Ho
Er
Tm
Yｂ
Lu
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
Ac
Th
Pa
U
Np
Pu
Am
Cm
Bk
Cf
Es
Fm
Md
No
Lr
A
Table1.4 High-k material properties Materials
SiO2
Al2O3
La2O3
Pr2O3
Gd2O3
HfO2
ZrO2
EOT (nm)
0.8
1.5
0.48
1.4
1.5
0.8
0.8
Stable
+63.4
+98.5
+105.8
+101.5
+47.6
+42.3
13125
15916
12687
12938
13330
9
6–8
5.4
3.9
5.4
5.7
Amorphous
Crystal T>700ºC
Crystal T>400ºC
Crystal T>700ºC
27
13
17
24
Contact stability with Si (kJ/mol) Si+MOx→M+SiO2 Lattice energy (kJ/mol) Bandgap (eV) Structure
Amorphous Amorphous 3.9
8.5 – 10
12
11188 5.2 – 7.8 Crystal T>400 800ºC 11 – 18.5
Among the candidates of high-k materials, Hf-based materials are the most promising candidate of them. As shown in Figure 1.5, many papers on high-k materials are submitted in the primary conferences up to 2002. However, from 2003 to now, the candidate of high-k materials have narrowed down to Hf-based materials. Therefore, Hf oxides (HfO2) and Hf-based silicates or nitrides (HfSiON), with dielectric constants of 25 and 10 to 15 respectively, are among the promising materials for the 65 or 45-nm-technology nodes.
Fig 1.5 High-k materials reported in VLSI and IEDM Usually, when the EOT becomes small, the effective mobility tends to decrease due to scattering in the high-k layer or at the interface between the high –k layer and the substrate. It has reported that Hf-based films have reduced scattering when a SiO2-based interfacial layer of 0.5 to0.7 nm is inserted, however, this attempt increases the EOT. Consequently, in this work, Lanthanum Oxide (La2O3), one of the rare earth
13
oxides, had been tried as a gate insulator, because it has a relatively high dielectric constant of 24, which is slightly higher than that of HfO2. Moreover, La2O3 does not form IL due to the formation of La-silicate at La/Si-substrate interface, which is also a high-k material [3], hence, high-k/Si-substrate direct structure is achieved. The film structure was shown at Fig. 1.6(a). More noteworthy are this layer has high band offset of 2.3 eV from the conduction band of silicon. Therefore, La2O3 has the advantage of further reduction the leakage (Fig. 1.6)
N
2O 3
es
(a)
La
id
Si
10-5
ox
k=14
d
La-silicate
k=24
SrTiO
se
La2O3
10-3
ba
EV
O Hf
EC
10-1 LaAl
O
2.3eV
101 Si
5.5eV
Cu rren t d en sity (A/cm 2 )
6eV
10-7 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 EOT (nm)
(b)
Fig.1.6 (a) is band diagram of La2O3 layer and (b) is the effect of suppressed leakage current by La2O3 layer.
Thus, La2O3 is suited for further insulator film for MOSFET. However, this material also has a critical issue. That’s a fixed charge in film.
14
1.5 Fixed Charges in La2O3 The oxygen concentration in this insulator is very sensitive to the oxygen partial pressures in ambient and thus oxygen-related defects are easily formed in the oxide layer. Fig.1.7 shows the forms and changes of the charged defects in film with oxygen partial pressure.
Small
Oxygen partial pressure
La2O3
La2O3
Positive charge
Large
La2O3
Negative charge
Fig. 1.7 Changes of the charged defects in film with oxygen partial pressure.
The positive charges or negative charges are formed under an oxidation and reduction ambient. Those charges caused various issues on electrical properties, such as flat-band voltage (Vfb) shift, mobility degradation, leakage current increase, the decline in reliability, etc. Additionally, this issue occurs in other high-k oxides. Hence, this problem is that must be solved.
15
Normalized capacitance (C/Cmax)
0.8 0.7
FGA FGA + OGA FGA + OGA + FGA
0.6 0.5 0.4 0.3 0.2 -2
(a)
-1 0 1 Gate voltage (V)
2
(b)
Fig. 1.8 Flat-band voltage shift (a) is Vfb shift in oxidation ambient [4], (b) is Vfb fluctuates as changing the external oxygen atmosphere [5]
Fig. 1.8 shows Vfb shift from experiment. In (a), Vfb shift can be induced in oxidizing ambient. In (b), Vfb fluctuates between the values for the samples. Treated in oxygen and forming Gas ambient. As will be noted from those results, degradation of property in film depends on oxygen ambient. Controlling ambient oxygen pressure might be effective for decreasing the intrinsic defects. However, it is hard to adjust the ambient oxygen pressure in the entire process of the device fabrication. Thus, an alternative solution has been awaited.
1.6 The Method for Charge Reduction It is expected that multivalent materials have the effect of charge reduction. Those materials have property of oxygen reservoir, hence, it absorbs or releases oxygen depending on the ambient condition. As the result, oxygen concentration in adjacent film can be kept constant under the change in ambient. (Fig 1.9)
16
(a)oxidation
Oxygen-absorption
Interstitial oxygen La2O3
La2O3
(b)reduction
Oxygen-release
oxygen vacancy
La2O3
Fig. 1.9
multivalent
multivalent La2O3
The concentration of La2O3 film kept a constant by using multivalent
materials
As multivalent materials, there are Ce, Pr, Eu, Sm, Yb-oxide, et al. In this study, Ce-oxide (CeOX) was investigated. This oxide has high dielectric constant and to reservoir property. Therefore, physical thickness can be increased with suppressed EOT value. Form this property, it is expected that leakage current can be further suppressed by La2O3 combined with CeOX.
17
1.7 Propose of This Work The multivalent materials have a potential of reducing the charged defect. Hence, by combining this material with high-k insulator, improvement of film properties can be achieved. In this study, to confirm of this effect, the impact of combining La2O3 with CeOX was investigated from both the theoretical calculation and the experiment. As a result, a novel method for the reduction of the charged defects using multivalent materials will be presented.
18
Chapter 2 Fabrication and Characterization Methods 2.1
Experimental Procedure 2.1.1 Fabrication Procedure for nMOS Capacitors 2.1.2 Fabrication Procedure for nMOSFETs 2.1.3 Silicon Surface Cleaning Process 2.1.4 Electron-Beam Evaporation Method 2.1.5 Rapid Thermal Annealing (RTA) Method
2.2
Measurement Methods 2.2.1 Capacitance-Voltage(C-V) Measurement 2.2.2 Gate Leakage Current – Voltage (J-V) Characteristics 2.2.2.1 Schottky Effect 2.2.2.2 Poole-Frenkel Effect 2.2.2.3 Fowler-Nordheim Tunneling Effect 2.2.2.4 Image-Force Effect 2.2.3 Threshold Voltage 2.2.4 Subthreshold Slope 2.2.5 Mobility Extraction Technique ~Split C-V Measurement~ 2.2.6 Charge Pumping Methods 2.2.7 XPS Measurement
19
2.1 Experimental Procedure 2.1.1 Fabrication Procedure for nMOS Capacitors Figure 2.1 summarizes device fabrication flow of La2O3, CeOX, CeOX/La2O3 MOS-capacitors. The MOS capacitors were fabricated on n-type (100)-oriented 2-5 Ω-cm Si substrate. To determine the capacitor area and to avoid unexpected peripheral effect, 300 nm-thick thermal oxide was formed and patterned photolithography. The wafers were then cleaned by a mixture of H2SO4/H2O2 at 85 oC for 5 min to remove all the resist-related organic contamination, followed by diluted HF cleaning. Thin films of high-k were deposited using e-beam evaporation from materials pressed target in an ultra-high vacuum chamber of 10-7 Pa. The tungsten (W) gate electrode of 50 nm was coated by RF sputtering with power of 150 W. Electrode was finally lithographically patterned to form MOS capacitors. Post-deposition annealing (PDA) in Forming gas (3 %-H2+97 %-N2) was carried out. Finally, aluminum (Al) was thermally evaporated on backside of the wafers for bottom electrode.
n-type Si substrate SPM, HF last treatment High-k materials deposition by EB evaporation In situ Tungsten (W) metal gate electrode deposition by RF sputtering PMA (Post Metallization Annealing) 500℃ 30min (FG:3%H2)
High-k
Bottom electrode Al deposition Al
Fig.2.1
Fabrication procedure for MOS-capacitor
20
Metal
2.1.2 Fabrication Procedure for nMOSFETs The fabrication procedure for nMOSFET is shown in Figure 2.2. nMOSFET fabrication was started from a Si(100) substrate with isolation and S/D regions. High-k thin
film was deposited by Electron-Beam Evaporation followed by substrate cleaning.
After metal gate formation, the gate area was defined with photolithography followed by metal gate etching. Annealing in forming gas was performed at 500 oC for 30 min. The Al-Pad area was formed with lift-off process under acetone solution and Al back side electrode were formed afterwards.
p-type Si substrate (Source/Drain pre-formed)
SPM, HF last treatment High-k materials deposition by EB evaporation In situ Tungsten (W) metal gate electrode deposition by RF sputtering PMA (Post Metallization Annealing) 500℃ 30min (FG:3%H2) Source, Drain Al interconnection Al Source
Drain
Bottom electrode Al deposition
Fig 2.2 Fabrication procedure for nMOSFET
The detailed explanation of each process and experimental equipment will be described in next section.
21
2.1.3 Silicon Surface Cleaning Process Prior to the deposition of high-k gate thin films for LSI fabrication process, the ultra-pure surface of a bare Si-substrate should be chemically cleaned to remove particles contamination, such as metal contamination, organic contamination, ionic contamination, water absorption, native oxide and atomic scale roughness. It is considered that this substrate cleaning process is very important to realize desirable device operation and its reproducibility. In full fabrication processes as well as substrate cleaning, DI (de-ionized) water is one of the most important factors because DI water is highly purified and filtered to remove all traces of ionic, particulate, and bacterial contamination. Theoretical resistively of pure water at 25oC is 18.3 MΩ·cm. The resistively value of ultra-pure water (UPW) used in this study achieve more than 18.2 MΩ·cm and have fewer than 1.2 colony of bacteria per milliliter and no particle larger than 0.25 um. In this study, the method of surface cleaning process was used a typical processing using hydrofluoric acid, which is usually called RCA cleaning method, was proposed by W. Kern et al. But some steps were reduced. First, silicon substrates were dipped in SPM solution, mixed 4 parts H2SO4 (96%) with 1 part H2O2 (30%) at 85 degrees, generating heat helping organic materials oxidize. And then, dipped in hydrofluoric acid diluted
at 1%
to
remove
chemical or natural
oxide
layers
and
obtain
hydrogen-terminated surface. Hydrogen-terminated surface is stable and a preventive oxidation. The chain of cleaning process flow was shown Fig. 2.3
22
UPW for 5min H2SO4/H2O2 (SPM) for 5min
Remove organic and metal contamination
UPW for 5min
UPW for 5min HF-H2O (DHF) for 5min
Remove native chemical oxide
or
UPW for 5min Fig. 2.3 Si substrate cleaning process
2.1.4 Electron-Beam Evaporation Method La2O3 and CeOx dielectrics were deposited in ultra high vacuum by electron-beam evaporation method. Figure 2.4 shows the schematic drawings and a photo of the equipment. The background pressure in growth chamber reached as high as 10−8 Pa and was approximately 10−7 Pa during deposition. In the growth chamber, a sintered La2O3 target, which is evaporation source, is irradiated with electron beam accelerated by 5 kV. The target is heated up and LaOx molecules are evaporated. Then ultra thin LaOx film is deposited on the Si-substrate. Physical thickness of the film is monitored with a film thickness counter using crystal oscillator. The temperature of the substrate is controlled by a substrate heater and is measured by a thermocouple.
23
Sputter Ch
Deposition Ch
10-7Pa
10-7Pa TMP
TMP W
Mg
HfO2
CeO2 La2O3
TaSi
RP
RP
Fig. 2.4 Schematic view of e-beam evaporation and RF sputtering system
2.1.5 Rapid Thermal Annealing (RTA) Method RTA method was employed for the heat treatments after depositing dielectric films. The annealing process is indispensable to improving defects in dielectric film and at the interface. The schematic RTA system and process flowchart are shown in Fig. 2.5. The samples with gate dielectric were put on silicon susceptor and inserted into heat- treating furnace. The ambience in furnace was vacuumed adequately by rotary pump for highly-pure nitrogen or forming gas substitution. And then, nitrogen or forming (in accordance with the purpose) were provided with flow rate of 1.0 l/min and the samples were annealed at atmospheric pressure. In order to evaluate the electrical or chemical properties, the annealing temperatures ranging from 300 ◦ C to 700 ◦ C were made an attempt.
24
Exhaust Sample
Inserting sample Vacuuming Gas supply (N2 of F.G)
N2 or F.G
Start heating
RP Fig. 2.5 Schematic illustration of RTA system and annealing process flowchart
2.2 Measurement Methods 2.2.1 C-V (Capacitance-Voltage) Measurement C-V characteristic measurements were performed with various frequencies (1kHz ∼1MHz) by precision LCR Meter (HP 4284A, Agilent). The energy band diagram of an MOS capacitor on a p-type substrate is shown in figure 2.6 [7]. The intrinsic energy level Ei or potential
in the neutral part of device is taken as the zero
reference potential. The surface potential
s
is measured from this reference level. The
capacitance is defined as C
dQ dV
(2.1)
It is the change of charge due to a change of voltage and is most commonly given in units of farad/units area. During capacitance measurements, a small-signal ac voltage is applied to the device. The resulting charge variation gives rise to the capacitance. Looking at an MOS capacitor from the gate, C = dQG / dVG, where QG and VG are the gate charge and the gate voltage. Since the total charge in the device must be zero, assuming
25
no oxide charge, QG = . (QS + Qit), where QS is the semiconductor charge, Qit the interface charge. The gate voltage is partially dropped across the oxide and partially across the semiconductor. This gives VG = VFB + Vox + oxide voltage, and
s
s
, where VFB is the flatband voltage, Vox the
the surface potential, allowing Eq. (2.1) to be rewritten as
dQs dQit dVox d s
C
(2.2)
The semiconductor charge density QS, consists of hole charge density Qp , space-charge region bulk charge density Qb, and electron charge density Qn. With QS =Qp + Qb + Qn, Eq. (2.2) becomes
C
1 dVox dQs dQit
d dQ p
dQb
(2.3) s
dQn
dQit
Utilizing the general capacitance definition of Eq. (2.1), Eq. (2.3) becomes
C
C ox (C p
1 1 C ox
1 Cp
Cb
Cox
Cb C n Cp
Cit )
C b Cit
(2.4)
C n C it
The positive accumulation Qp dominates for negative gate voltages for p-substrate devices. For positive VG, the semiconductor charges are negative. The minus sign in Eq. (2.3) cancels in either case. Eq. (2.4) is represented by the equivalent circuit in figure 2.7 (a). For negative gate voltages, the surface is heavily accumulated and Qp dominates. Cp is very high approaching a short circuit. Hence, the four capacitances are shorted as shown by the heavy line in figure 2.7 (b) and the overall capacitance is Cox. For small positive gate voltages, the surface is depleted and the space-charge region charge density, Qb = .qNAW, dominates. Trapped interface charge capacitance also contributes. The total capacitance is the combination of Cox in series with Cb in parallel with Cit as shown in figure 2.7(c).
26
In weak inversion Cn begins to appear. For strong inversion, Cn dominates because Qn is very high. If Qn is able to follow the applied ac voltage, the low-frequency equivalent circuit (figure 2.7 (d)) becomes the oxide capacitance again. When the inversion charge is unable to follow the ac voltage, the circuit in figure 2.7 (e) applies in inversion, with
Cb = Ks εo / Winv with Winv the inversion space-charge region width. The flatband voltage VFB is determined by the metal-semiconductor work function difference φMS and the various oxide charges through the relation VFB
Qf MS
C ox
Qit ( s ) C ox
1 C ox
tox 0
m
( x )dx
1 C ox
tox 0
x t ox
ot
( x)dx
(2.5)
where ρ(x ) = oxide charge per unit volume. The fixed charge Qf is located very near the Si-SiO2 interface and is considered to be at that interface. Qit is designated as Qit (φ s
), because the occupancy of the interface trapped charge depends on the surface
potential. Mobile and oxide trapped charges may be distributed throughout the oxide layer. The
x-axis is defined in figure 2.6. The effect on flatband voltage is greatest when the charge is located at the oxide-semiconductor substrate interface, because then it images all of its charge in the semiconductor. When the charge is located at the gate-insulator interface, it images all of its charge in the gate and has no effect on the flatband voltage. In the study, principally, EOT values and flatband voltage were extracted from C-V characteristics by using the NCSU CVC modeling program [8]. EOT values were calculated with taking quantum effect into account.
27
Fig 2.6
The energy band diagram of an MOS capacitor on a p-type substrate
Fig 2.7 Capacitances of an MOS capacitor for various bias conditions. 28
2.2.2 Gate Leakage Current – Voltage (J-V) Characteristics One of the main concepts of replacing the high-k gate dielectrics with SiO2 is to suppress the gate leakage current. Thus, it is enormously important to measure the gate leakage current-voltage (J-V) characteristics. In addition, the properties of high-k films, such as the barrier height, effective mass, are obtained by analyzing the carrier transport mechanisms from the leakage current. To investigate the voltage and temperature dependence of gate leakage current, it is able to identify the carrier conduction mechanisms
experimentally
[9].
J-V
characteristics
are
measured
using
semiconductor-parameter analyzer (HP4156A, Hewlett-Packard Co. Ltd.). Additionally, The Schottky, Poole-Frenkel and F-N leakage emission, which are known as major leakage mechanism, were discussed.
2.2.2.1 Schottky Effect The Schottky effect is the image-force-induced barrier for charge carrier emission with an applied field [10]. Fig. 2.8 shows potential barrier at the metal-vacuum interface. Maximum barrier height is reduced to image-force effect when an electric field is applied. This can help the emission of thermally activated carriers from the metal electrode, which is called Schottky emission. This type of carrier emission is completely analogous to thermionic emission expect that the applied field lowers the barrier height. Metal-vacuum system seen in Fig. 2.8 is also equivalent to metal-insulator system as well as semiconductor-insulator system, expect for the dielectric constant of vacuum part.
29
Conduction Band Edge (E=0) 0
xm
x
image potential energy
B m-
B
Conduction Band Edge (E>0)
EF
Metal
Fig. 2.8 Band-Energy diagram between a metal surface and a vacuum The main feature of Schottky emission is Schottky barrier lowering (or image-force lowering) [3];
qE 4
q
B
(2.6)
Permittivity e should be replaced by an appropriate permittivity characterizing the medium. Since carrier emission occurs at much higher energy levels than Fermi level oh the injecting electrode, tunneling probability can be regard as 1. So Tunneling current is
J
4 m*q 2 2 k B T exp h3
Em
Em E F k BT
1 exp
0
4
0
(2.7)
1/ 2
qE
EF
V k BT
(2.8) i
Here, h is Plank constant, kB is Boltzmann constant, Em is barrier height (f0=fm-c), V
30
is applied voltage. On condition is V>>kBT, Eq. (2.7) becomes J
4 m*q 2 2 k B T exp h3
0
exp
k BT
4
0
k BT
E1 / 2
(2.9)
1/ 2
q s
s
(2.10) i
This J is also called Richardson-Schottky equation. As expected, the Schottky current is thermally activated process and the activation energy is characterized by Eq.(2.9). The activation energy is modulated by applied bias with Schottky barrier height lowering effect. One notice that the barrier deformation decrease as the dielectric constant increase, indicating that, in high-k oxide films, Schottky emission seems to be less probable than in conventional SiO2 film.
2.2.2.2 Poole-Frenkel Effect In the MIS (Metal-Insulator-Semiconductor) structure, the P-F and Schottky emission results from the lowering of a Coulomb potential barrier by an applied field. The Schottky is associated with the insulator barrier near to the injecting electrode, whereas the P-F effect is associated with the barrier at the trap well in the bulk of insulator film. Thus, neutral donor traps that is neutral when filled and positive when empty don’t experience the P-F effect owing to the absence of the Coulomb potential. Fig. 2.9 shows thermionic emission of trapped carrier in the bulk of the film, which occurs at the trap site. Internal thermionic emission is called as the P-F emission, while external one is Schottky emission. Another way for emission of electron is hopping process, which is a kind of tunneling process in a short range. It should be notified here that the P-F conduction by the P-F emission is closely
31
related to the oxide film thickness while the Schottky conduction by the Schottky emission isn’t related to that, as far as the equal oxide field is concerned. Energy = m+ PF Thermionic Conduction (P-F)
S
PF =
1/2 PFEOX
m
m(x)
Trap 1 x0
x Trap 2
Fig. 2.9 Thermionic Condition (Poole-Frenkel Condition)
Z
Z Z
Image Charge
Trap Charge
Metal Surface (a)
(b)
Fig. 2.10 Restoring force on escaping electron [11] (a) The Schottky effect. (b) The Poole-Frenkel effect.
32
Fig. 2.10 shows the restoring force in both Schottky and P-F effect, which comes from Coulomb interaction between escaping electron and a positive charge. The restoring force is due to electrostatic potential that make electron move back to its equilibrium position. Although the restoring force is same of the both, they differ in tha the positive image charge is fixed for the P-F barriers but mobile with Schottky emission. This results in a barrier lowering twice as great for the P-F effect. 1/ 2
q3 E PF
PF 0
4
(2.11)
E 1/ 2
(2.12)
i
1/ 2
q3E SK
E 1/ 2
SK 0
i
In that the electrons have enough energy to go over the energy barrier and travel in the conduction band with a mobility m which is dependent on the scattering with the lattice, the general expression of the bulk current is expressed by
J
qn( x) E
(2.13)
The concentration of free carrier in the insulator is following. n
N c exp
q Ec E F kT
(2.14)
Since Ec-EF is equal to effective trap barrier height including barrier lowering effect described by Eq. (2.11), the effective barrier height and governed by the P-F emission is written by following. Ec
J
EF
qN c exp
SK
PF
SK
kT
33
exp
SK
q kT
PF
PF
E 1/ 2
E1 / 2
E
(2.15) (2.16)
2.2.2.3
Fowler-Nordheim Tunneling Effect F-N tunneling occurs when electrons tunnel into the conduction band of the
oxide layer. Fig. 2.11 (a) shows F-N tunneling of electrons from the silicon surface inversion layer. The complete theory of F-N tunneling is rather than completed. For the simple case where the effects of finite temperature and image-force barrier lowering are ignored the tunneling current density is given by [12] J
4 2m * OX 3hqE
q3E exp 8 h OX
3/ 2
(2.17)
Here, h is Plank constant, q is electric charge, E is electric field in the oxide, fOX is barrier height of the oxide.
Ec electron
Ec electron
Ev
Ev
Ec
Ec Ev
Ev
(a)
(b)
Fig. 2.11 (a) F-N tunneling and (b) direct tunneling
34
2.2.2.4 Image-Force Effect The
abrupt
changes
in
potential
at
the
metal-insulator
or
insulator-semiconductor interface are physically unrealistic, since abrupt changes in potential imply infinite electric field. The potential changes gradually as a result of the image-force. When electron is at a distance x from the metal, a positive charge will be induced on the metal surface, which is called image charge. The force of emission between the electron and the image charge is equivalent to the force that would exist between the electron and an equal positive charge located at –x. This attractive force is called the image-force given by [13].
F
q2 16 x 2
(2.18)
Here, q is electron charge and e is the permittivity of the insulator. From the (Eq.2.18), one can realize that attractive force is inversely proportional to the dielectric constant of the film, so that in the high-k film, the effect of image-force will be small. It is worth commenting that the dielectric constant in the image-force equation is the high frequency constant for the electrode-limited conduction case, since electron spend only an extremely short time in the immediate vicinity of the surface in the course of carrier emission.
35
2.2.3 Threshold Voltage As the MOSFET is the fundamental switching devices in the LSI circuits, the threshold voltage Vth is an important parameter of the MOSFET. The threshold voltage can be determined by plotting Ids versus Vg at low drain voltage, typically 50-100mV, as shown in Fig. 2.12 The extrapolated intercept of the linear portion of the Ids versus Vg curve with the Vg –axis gives the Vg value. It needs to regard the point of slope because the threshold voltage varies the point of Ids - Vg slope. It is commonly used the point of slope on the Ids - Vg curve by a maximum in the transconductance, fit a straight line to the Ids - Vg curve at that point and extrapolate to Ids = 0, as shown in Fig. 2.12
L/W=2.5 m/50 m
120
gm,max
200
Vd=50mV
100
250
80
150
60
100
40
ID,max
Vth
20 0 -1
-0.5 0 Gate Voltage [V]
50
Transconductance [ S]
Drain Current [ A]
140
0 0.5
Fig. 2.12 Threshold voltage determination by the linear extrapolation technique
36
2.2.4 Subthreshold Slope As shown in Fig. 2.12, the drain current rapidly approach to zero below the threshold voltage on a linear scale. On a logarithmic scale, however, the drain current remains nonnegligible level even below the Vth. This is because the inversion charge abruptly does not to drop zero. The slope is usually expressed as the subthreshold slope (S.S). in Fig. 2.13. This value is that gate voltage necessary to change the drain current by one decade, and given by 1
S
d log10 I ds dVg
2.3
kT Cdm 1 q Cox
(2.19)
where k is a Boltzmann’s constant, T is temperature, q is a electronic charge, Cdm is a depletion-layer capacitance. If the interface trap density is high, the subthreshold slope may be graded. Because the capacitance attributed to the interface trap is in parallel with the depletion-layer capacitance.
10-3 Drain Current [A]
L/W=2.5 m/50 m 10-5
Vd=50mV
10-7 10-9
S.S.
10-11 10-13 -1
-0.5 0 Gate Voltage [V]
0.5
Fig. 2.13 Threshold voltage determination by the linear extrapolation technique
37
2.2.5 Mobility Extraction Technique ~Split C-V Measurement~ The effective inversion layer mobility in MOSFET is a very important parameter for device analysis, design and characteristics. As the effective inversion mobility shows sensitivity to device properties or interface properties, it can be also used to probe the high-k gate dielectrics properties. The effective mobility,
eff
, is defined in terms of the measurement of drain current,
Id, of a MOSFET at low drain voltage, Vd, in the linear region as [14] eff
L Id 1 W Vd Qinv
L 1 gd W Qinv
(2.20)
where gd = Id/Vd is the channel conductance, Qinv is the inversion layer charge. The channel conductance is calculated from differential Id-Vg measurements at 20mV and 40mV as shown in Fig. 2.14 to compensate the degradation of the channel conductance due to leakage current. For accurate extraction of effective mobility, accurate value of Qinv must be used in Eq. (2.20). A Split C-V measurement is one of the extraction techniques for inversion layer charge accurately. Fig. 2.15 represents the Split C-V measurement arrangement. The inversion layer charge is obtained from the voltage integral of a gate-channel capacitance as shown in Fig. 2.16. The inversion layer charge Qinv can be written as Qinv
Vg
C gc V g dV g
(2.21)
where Cgc is the gate-to-channel capacitance [15]. Similarly, the depletion layer charge Qb is also obtained due to integrate the gate-body capacitance, Cgb , from flatband voltage toward the inversion as shown in Fig. 2.17.
Qb
Vg V FB
C gb V g dV g
The effective electric field Eeff can be expressed as [14]
38
(2.22)
Eeff
1
Qinv
Qb
(2.23)
Si
where
are 1/2 for electrons and 1/3 for holes.
Drain Current [ A]
250 200 150
L/W=2.5 m/50 m Vd=40mV Vd=20mV
100 50 0 -1
0 1 Gate Voltage [V]
2
Fig. 2.13 Id-Vg measurements at 20mV and 40mV
S/D
S/D
G
G
S
D
S
D
p-Si
p-Si
B
B
(a)
(b)
Fig. 2.14 Configuration for (a) gate-to-channel, (b) gate-to-body capacitance measurements
39
400
L/W=2.5 m/50 m
Capacitance [fF]
350
Inversion C-V
300 250 200
Qinv
150 100 50 0 -2
-1 0 1 Gate Voltage [V]
2
Fig. 2.16 Gate-to-channel capacitance of nMOSFET
400
L/W=2.5 m/50 m
Capacitance [fF]
350 300 250
VFB
200 150 100
Qb
50
Accumulation C-V 0 -3 -2 -1 0 Gate Voltage [V]
Fig. 2.17 Gate-to-body capacitance of nMOSFET
40
2.2.6 Charge Pumping Methods The surface region under the gate oxide between the source and drain is formed the inversion layer and is crucial for current conduction in a MOSFET. Hence, the carriers in the inversion layer are strongly affected by the gate oxide-Si substrate interface properties. In addition, as the high-k gate dielectrics is not thermally-oxidized film but deposited film, the evaluation of interface properties between the high-k gate dielectrics and Si substrate is crucially importance. The charge pumping method is one of the sensitive methods for the characteristics of the interface trap density which is located at the high-k gate dielectrics-Si substrate interface [16]. Fig. 2.18 shows the circuit diagram of the charge pumping measurement. The MOSFET gate is connected to a pulse generator. The MOSFET source and drain are tied together and slightly reverse biased. The time varying gate voltage is sufficiently amplitude for the surface under the gate to be driven into inversion and accumulation as shown in Fig. 2.19. The rise and fall times tr and tf are fixed value, 100nsec. The Charge pumping current which due to recombination processes at the interface defects is measured at the substrate. The interface trap density, Nit, is written as N it
I cp qfA
(2.24)
where q is the elementary charge, f is the frequency, A is the channel area. The waveforms can be constant Vamp and pulsing with varying the base voltage from inversion to accumulation as in Fig. 2.20 (a) and Fig. 2.20 (b) represents the charge pumping current with varying the base voltage from inversion to accumulation. The Icp in the Eq. (2.24) is used for the maximum Icp value as show in Fig. 2.20 (b).
41
Pulse generator Vtop Vbase
G S
Vr
D p-Si
Icp
Fig. 2.18 Measurement circuit diagram of charge pumping method
accumulation
B
A Vth
inversion VFB
A tL
tr
tH
tf
B Fig. 2.19 Sweeping between inversion and accumulation
42
e
VTh
d
VFB
c
VAmp
b a (a)
Depletion
Icp
Week accum. Strong accum. a
c
Week inversion d
b
Strong inversion e
Vbase (b)
Fig. 2.20 (a) Charge pumping waveform and (b) Charge pumping current versus base voltage
Fig. 2.21 shows the band diagrams for changing the interface from accumulation to inversion under the action of periodic gate pulses. The interface traps are filled with electrons from source/drain during tr and the electrons in traps empty into substrate during tf.
43
e- from source/drain to traps
accumulation
A
ramp up 1
2
Isub = q*A*Nit*f
ramp down
B
4
3
e- in traps to substrate
inversion
Fig. 2.21 Band diagrams applied periodic gate pulses
2.2.7 XPS Measurement XPS (X-ray Photoelectron Spectroscopy), also known as the Electron Spectroscopy for Chemical Analysis (ESCA), is one of the useful methods to evaluate chemical binding state in the bulk, at the surface, or at the interface. Fig. 2.22 explains the principle of XPS. Samples were irradiated with X-ray and the emitted photoelectrons with kinetic energy KE were detected. Measured KE was given by
KE = hν − BE − φs
(2.25)
where hν is the photon energy, BE is the binding energy of the atomic orbital from which the electron generates and φs is the spectrometer work function. The binding energy is the minimum energy needs for breaking the chemical bond of molecule and is
44
inherent in each bond of molecule. Thus, the binding states can be identified by the positions of the binding energy which the peak appears. In the case that the peak position was different from the expected position, the chemical bond states were discussed considering the amount of shift to higher or lower energy side.
Fig 2.22
Principle of XPS measurement.
Conventional XPS techniques with low excitation energies are surface-sensitive due to short inelastic mean-free-paths (IMFPs), and it is difficult to obtain information on the bulk electronic structures which are closely correlated with the characteristics of the intrinsic materials. In this study, Hard X-ray Photoemission Spectroscopy (HX-PES) is performed at Super Photon ring- 8 GeV (SPring-8). SPring-8 is the one of the world’s largest radiation facilities. The advantages of SPring-8 over average XPS equipments are the high-brightness of radiation which is about a hundred thousand times as high as normal X-ray and the high radiation energy of 30keV ∼ 40keV.
45
Chapter 3 Characteristics of MOS Capacitors 3.1 Introduction 3.2 Analysis of leakage current 3.2.1 Leakage mechanism of each layered capacitors 3.2.1.1 Ce-oxide single layered capacitor 3.2.1.2 La2O3 single layered capacitor 3.2.1.3 Stack structured layer 3.2.1.4 Conclusion 3.2.2 Leakage current value 3.2.2.1 The trap density in film 3.2.2.2 Compared leakage current value 3.2.2.3 Conclusion 3.3 Fixed charge in film 3.3.1 Calculation method of fixed charge 3.3.2 Quantity fixed charge in each film 3.3.3 Comparison of the each Qit 3.3.4 change of Vfb value 3.3.5 Physical thickness-related Vfb values rapidly change 3.3.6 Conclusion
46
3.1 Introduction In this chapter, electrical properties of CeOx, La2O3 single and CeOx/La2O3 stacked structured MOS capacitor were investigated. By comparing each property, the effect of CeOx/ La2O3 stacking was discussed
3.2 Analysis of Leakage Current As described in the previous chapter, it is expected that further suppression of leakage current is achieved by combination of CeOX and La2O3. For the investigation of this effect, CeOX single, La2O3 single, CeOX/La2O3 stack layered capacitors were fabricated and electrical properties were measured. First of all, leakage mechanism in each sample was estimated. Then, the effect of suppressed leakage current by depositing CeOx on La2O3 was studied.
3.2.1 Leakage Mechanism of Each Layered Capacitors For estimated the leakage mechanism, the electrical properties of single layered and stack layered capacitors at the all most same EOT value were investigated. The results for different structures were compared.
3.2.1.1 Ce-Oxide Single Layered Capacitor First, the electrical properties of CeOX single layered capacitor were investigated. Fabricated capacitor structure was shown in Fig. 3.1. Here, it’s expected that the small amount of Ce-silicate was formed at the CeOX/Si-substrate interface after annealing, but this silicate layer thickness is so small that it can be neglected.
47
W
Physical thickness is 8nm
CeOX
8nm
Ce-silicate Si
Ce-silicate is negligibly-small Assuming the direct deposition
Fig. 3.1 fabricated CeOx layered capacitor structure
The J-V and C-V characteristics were measured. Those results were shown as Fig. 3.2 (a),(b), respectively. From the C-V characteristics, the EOT and the dielectric constant were estimated to be 1.01 nm and 30, respectively. A small hump in the C-V curve is due to the density of interface trap and a capacitance decrease at large gate voltage is due to large leakage current. From the leakage-current analysis, the dominant conduction mechanism was determined to be Schottky emission. Schottky barrier height was estimated as 0.72 eV. This value is in good agreement with the reported value [17].
103
2
1
0 -1.5
0.5 1.5 -0.5 Gate Voltage [V]
101 -10.8
10-1 10-3
Schottky -11.2 -11.6 -12.0 -12.4
10-5 10-7 0
(a) Fig. 3.2
logJ/T2 [A/cm2K2]
Leakage Current [A/cm2]
3
-12.8 0.6
1.2 0.9 E1/2 [MV/cm]
1 2 Gate voltage [V] (b)
CeOX single layered capacitor (a) C-V characteristic, (b) J-V
characteristic and
fitting curve for consideration of leakage mechanism were
inserted in the figures.
48
1.5
3
The dominant leakage mechanism is estimated to be Schottky emission, hence, leakage current is not suppressed unless the Schottky barrier height increases. However, this value is intrinsic material value. Therefore, CeOX -single layer is not swited for gate insulator use.
3.2.1.2 La2O3 single layered capacitor The electrical properties of La2O3 single-layer capacitor were investigated. Fabricated capacitor structure is shown as Fig. 3.3. La2O3 forms La-silicate at La2O3/Si-substrarte interface. This silicate layer thickness was large. It is expected that, hence, if physical thickness is small, most of the La2O3 layer reacted with Si and formed La-silicate. Here, physical thickness of La2O3 is 4nm, it’s so thin. Therefore, it’s assumed that the La2O3 layer completely reacted with Si to forme La-silicate.
W
4nm
La2O3 Si
W
Physical thickness is 4nm
La2O3
PMA
La-silicate
La2O3 react readily with Si Assuming the complete reaction
Si
Fig. 3.3 fabricated La2O3 single layered capacitor structure
The J-V and C-V characteristics were measured. Those results were shown as Fig. 3.4 (a),(b), respectively. EOT and dielectric constant were estimated to be 1.15nm and 10, respectively. From the leakage-current analysis, the dominant conduction mechanism was determined to be Pool-Frenkel (P-F) emission. Trap level was estimated to be 0.45eV.
49
102
2
1
0 -1.5
0.5 1.5 -0.5 Gate Voltage [V]
100 10-2 10-4 10-6 10-8 0
(a)
Fig. 3.3
1 P-F fitting
logJ/T2 [A/cm2Ｋ2]
Leakage Current [A/cm2]
3
0.5
0 0.5
0.7
0.9 1.1 1.3 E1/2 [MV/cm]
1 2 Gate voltage [V]
1.5
3
(b)
La2O3 single layered capacitor (a) C-V characteristic, (b) J-V
characteristic and
fitting curve for consideration of leakage mechanism were
inserted in the figures.
The dominant leakage mechanism is P-F emission. Hence, it is necessary that reduction charge trap or increased physical thickness for suppression of leakage current.
3.2.1.3
Stack Structured Layer
The electrical properties of CeOX / La2O3 stacked capacitor were investigated. Fabricated capacitor was shown in Fig. 3.5. Here, the thickness of La2O3 layer is so thin, hence, La2O3 is completely reaction after annealing. It’s expected that the sample is separate layer structure.
50
W
2nm
CeOX La2O3
2nm
La2O3 is full-reacted
W
PMA
Si
CeOX La-silicate
This layer is CeOx/La-silicate separate-structure.
Si
Fig. 3.5 fabricated CeOx/ La2O3 stack structure layered capacitor
The J-V and C-V characteristics were measured. The results were shown in Fig. 3.6 (a),(b), respectively. EOT and dielectric constant were estimated to be 1.12nm and 20, respectively. From the leakage-current analysis, it was found that P-F emission is dominant at low voltage below 2V while Schottky emission is dominant at high voltage
1
0 -1.5
100
10-2
-3.5
10-4
-4.5 -5.5 -6.5 -7.5 -8.5
Fig. 3.6
10-6 0
1
Schottky -11
-13
-9.5
-10.5 0.8
0.5 1.5 -0.5 Gate Voltage [V] (a)
-9
P-F
logJ/T2 [A/cm2 Ｋ2]
2
102
log J /T 2 [A /c m 2 K 2 ]
Leakage Current [A/cm2]
3
1.0
1.2 1.4 1.6 E1/2 [MV/cm]
1.8
-15 1.7
1.9 2.1 E1/2 [MV/cm]
2 3 4 Gate voltage [V] (b)
CeOx/ La2O3 stack layered capacitor (a) C-V characteristic, (b) J-V
characteristic and
fitting curve for consideration of leakage mechanism were
inserted in the figures.
51
2.3
5
Assuming the dielectric constants of CeOX and La-silicate to be 30 and 10, respectively, the electric field in the La-silicate layer is higher than that in the CeOX layer when a voltage is applied to a stacked capacitor. Fig. 3.7 shows Jg and electric field (Eox) relationship in oxide layer plot in the stacked structure samples. Single layered capacitors are also shown as references. At the region below leakage current of 0.1 A/cm2, ELa (Eox of La-silicate in stacked sample) is lager than that in La2O3 single-layer sample. Therefore, the effect of La-silicate layer is dominant in this region. On the other hand, at above 0.1 A/cm2, Eox that is the same as in the La2O3 single layer is not applied to the La-silicate layer of the stacked structure. In this case, ECe (Eox of CeOx layer in stack structure) shows closer value to that in CeOX single-layer. Hence, the effect of CeOX layer becomes dominant.
Electric field (Eox) [MV/cm]
6 Eox of La-silicate single layer
5
EC 4
EV
ECe/La
3
ELa 2
Eox of CeO x single layer
ECe
1
ECe ELa ECe/La
0 10-7
10-5
10-3
Leakage current
10-1
101
[A/cm2]
Fig. 3.7 Jg-Eox plot and band diagram of stack structured sample
According to those results, this layer is separate layer structure and each layered properties are found depending on leakage current.
52
3.2.1.4 Conclusion The dominant leakage mechanism of CeOX -single and La2O3 single layered capacitors are determined to be Schottky and P-F emission, respectively. In CeOX / La2O3 stacked structure, P-F emission is dominant at low electric field while Schottky emission is dominant at high electric field. The effect of this stacked structure, in the leakage current reduction will be discussed in the next section.
53
3.2.2 Leakage Current Value In this section, the effect of suppressed leakage current by depositing CeOX on the La2O3 layer was investigated. Leakage current values of La2O3single and CeOX / La2O3 stack layered sample were compared.
3.2.2.1 The Trap Density in Film In this section, trap density in La2O3 single and CeOx/ La2O3 stacked sample was investigated from J-V characteristic Here, Leakage current value in the CeOX -single layered sample was not compared with other samples. Because, CeOX has small band-gap and band-offset (~0.72eV). It’s expected that, therefore, when using this material as the single-layered insulator, leakage current significantly increase. In fact leakage current value in CeOX -single layered sample was larger than that in other samples. CeOX should be used combined with other high-k materials and not to be used as a single layer. Fig.3.8 shows the J-V characteristics of the La2O3 single-layered and CeOX / La2O3 stacked structures at the same EOT values. The smaller leakage current was obtained from the stacked structure samples.
54
10-3 La-single
P-F fitting
Leakage current [A/cm2]
La-Ce cap 10-1
10-3
10-5 J
q NE exp(
B
kT
) exp(
E ) kT
q 0
10-7 0
Fig. 3.8
r
2 1 Gate Voltage [V]
3
J-V characteristics of both samples. P-F fitting with J-V curve
The dominant mechanism was determined to be the P-F emission from the J-V characteristics for both samples. In Fig 3.8, P-F fitting curve is also shown. This curve is illustrated by using the Eq.(2.16), where Nc is relative to trap density in the film. Hence, as comparison of Nc with both samples, the trap density in the film can be compared. Nc was calculated by fitting. As a result, Nc was suppressed by one order of magnitude using CeOX / La2O3 stack structure layer.
3.2.2.2 Compared Leakage Current Value Additionally, leakage current v.s. EOT plot for all samples is shown in Fig. 3.9. Smaller leakage currents were obtained for the stacked structure samples of the same EOT .
55
1
La2O3 : 4~10nm
Leakage current [A/cm2]
La2O3-single 10-1
CeOx/La2O3
La2O3
10-2
La2O3
La2O3
La2O3
Si
10-3
CeO/La2O3 :2/ 0.5~6nm
10-4
CeOX
10-5
La2O3
10-6 1.1
1.3
1.5
1.7
1.9
2.1
CeOX La2O3
CeOX La2O3
CeOX La2O3
Si
2.3
EOT [nm]
Fig. 3.9 Leakage current – EOT plot.
From Fig. 3.9, leakage current is suppressed by depositing CeOX on La2O3. CeOX having a high permittivity, hence, physical thickness can be increase without great increasing EOT. Therefore, further suppression of leakage current can be achieved without increasing EOT value (Fig.3.10).
W
The same EOT
Si
Si
Physical thickness can be large by formed stacking structure
Fig. 3.10 Leakage current was suppressed by depositing CeOX on La2O3
56
3.2.2.3 Conclusion In La2O3 single, CeOx/ La2O3 stacked samples, the dominant mechanism was determined to be the P-F emission from the J-V. The trap density values are estimated by P-F fitting. As a result, trap density was reduced by one order of magnitude by introducing the CeOx/La2O3 stack. Additionally, total leakage current value is also improved. The reason was that physical thickness can be large without increasing EOT. Therefore, further suppression of leakage current can be achieved without increasing of EOT value.
57
3.3 Fixed Charge in Dielectric Film In this section, the quantity of fixed charge in each layer was estimated and compared those values. The change of Vfb value by ration of CeOx was investigated.
3.3.1 Calculation Method of Fixed Charge The amount of charge due to defect is usually described in terms of the change in gate voltage, which is a readily measurable parameter, necessary to counter the effect of the oxide charge or to restore the surface potential corresponding to the flat-band state. Let us consider an MOS structure biased at flat-band condition. Let us assume that a sheet of oxide charge Q is placed at a distance x from the gate electrode, and a gate voltage Vg has been applied to restore the MOS structure to its original, i.e., flat-band, condition. With the surface potential restored to its original value, the sheet of oxide charge has induced no change in the charge distribution in the silicon, which is a function of the surface potential, but a charge of magnitude –Q on the gate electrode. This is illustrated in Fig. 3.11
58
Q
(x)
Metal
Oxide
Silicon x
0
x
0
x
-Q (x)
x -Q/
ox
Fig. 3.11 schematic illustrating the effect of a sheet charge of areal density Q within the oxide layer of an MOS capacitor biased at flat-band condition
Gauss’s law implies that the electric field in the oxide between 0 and x due to the sheet of oxide charge and its image charge on the gate electrode is –Q/
ox
this is also
illustrated in Fig. 3.11. The potential difference supporting this electric field is –xQ/
ox,
which is provided by the applied gate voltage. Therefore,
Vg
xQ
(3.1)
ox
The gate voltage necessary to offset the effect of an arbitrary oxide charge distribution can be obtained by superposition of individual elements of the charge distribution and applying Eq. (3.1) to each element. For an oxide charge distribution of (x, s)= (x)+Qit( s) (x-tox), which consists of an arbitrary distribution
(x) that is
independent of the surface potential and a delta-function distribution of the interface trap charge located at x=tox, the gate voltage necessary to offset it is
Vg
1 ox
(
tox 0
x ( x) dx Qit (
59
S
)t ox )
(3.2)
(x) includes the mobile charge, the oxide trap charge, and the fixed oxide charge. It is a common practice to define an equivalent oxide charge per unit area, Qox ,by tox
Qox
x t ox
0
( x)dx Qit (
S
)
(3.3)
Equation (3.2) can then be rewritten tin the simple form
Qox (
Vg
S
)
tox
(3.4)
ox
This equation states that the effect of an arbitrary oxide charge distribution is equivalent to an oxide sheet charge Qox( s) located at the oxide-silicon interface. For simplicity of calculation, it is assumed that all charge in film exists at the bottom of oxide. On this basis, Eq.(3.4) is rewritten as
Vg
V fb
Qit
EOT
(3.5)
ox
Where Qit is density of charge value. This value can be determined from the relationship between flat-band voltage (Vfb) and EOT. In Eq.(3.5), Qit is proportional to Vfb. Hence, this value is requested illustration of Vfb
Vfb [V]
v.s EOT plot.
Qit value have a clue by slop of the line
EOT [nm]
Fig. 3.12 Vfb v.s EOT plot
60
In this study, in Vfb-EOT plots, it is found that there are the two lines with different slopes. Line fitting was given to one at large EOT region. This reason is discussed in section 3.2.5.
Vfb [V]
Used this line
EOT [nm]
Fig. 3.13
Vfb v.s EOT plot. line fitting was given to general slop line
In order to investigate the density of fixed charge, the various CeOx and La2O3 stacked capacitors with different thickness rations and each single film capacitors were fabricated. In each sample, density of fixed charge was estimated by using line fitting.
3.3.2 Quantifying Fixed Charge in Each Film Fig. 3.14 (a),(b) shows the flat-band v.s EOT plot in CeOx and La2O3 single film, respectively. The densities of fixed charge are shown in the fig. As these results, it’s found that the charge in CeOX is opposite in sign to that in La2O3.
61
0.3
(a)
Sample A
Flat Band Voltage [V]
0.2
CeOX single : 5~20nm
0.1 0 -0.1
Qit = -5.4×1012 cm-2
CeOX
CeOX
CeOX
-0.2
CeOX
Si
-0.3 1
1.2
1.4
1.6
1.8
EOT [nm]
0.2
Sample B
(b) Flat Band Voltage [V]
0.1
La2O3 single : 4~10nm
0
-0.1
La2O3 -0.2
1
1.2
1.4
1.6
1.8
2
La2O3
La2O3
Si
Qit = 2.7×1012 cm-2 -0.3 0.8
La2O3
2.2
EOT [nm]
Fig. 3.14 Flat-band v.s EOT plot in single-layered capacitors.
Fig. 3.15 (a),(b) shows the flat-band v.s EOT plot in CeOx /La2O3 stacked structures, respectively. (a) is a result of changing the La2O3 thickness. Conversely, (b) is the changing the CeOx thickness. It is expected that these values can change with the thickness ratio of the CeOx and La2O3 layer.
62
0.6
Flat Band Voltage [V]
0.4
Sample C
(a)
CeOX/La2O3 : 2/0.5~6nm
0.2 0
CeOX
-0.2
La2O3 -0.4
CeOX La2O3
Qit = 1.08×1012 cm-2
-0.6 0.5
1
1.5 EOT [nm]
2
CeOX La2O3
CeOX La2O3
Si 2.5
0.2
Sample D
(b) Flat Band Voltage [V]
0.1
CeOX/La2O3 : 0.5~10/1nm
0
CeOX
CeOX
CeOX
CeOX La2O3
La2O3
La2O3
La2O3
-0.1
Qit = 9×1011cm-2
-0.2
Si -0.3 0.8
1
1.2
1.4
1.6
1.8
2
2.2
EOT [nm]
Fig. 3.15 Flat-band v.s EOT plot in stack-layered capacitors.
3.3.3 Comparison of The Each Qit Fig. 3.16 shows the comparison of those Qit value. in this figure, sample D has smaller Qit value than sample C. However, as shown in Fig. 3.15, experimental results have large variation. Hence, it is expected the difference is with the experimental error. The values for all samples are compared. in Eq. (3.4), Qit value depends on the slope of line in Fig 3.14, 3.15. Clearly, stack structured samples have small slopes than single
63
structured samples. Therefore, reduction of fixed charges is achieved by formed stack structure.
Density of charge defect [cm-2]
×1012 3 2 1
m Sa
pl
e
A
0 -1 -2
m Sa
pl
e
B m Sa
e pl
C m Sa
pl
e
D
-3 -4 -5 -6
Fig. 3.16 Comparison of all Qit values
For the explanation of those results, two reactions are considered. First, there is not so much reduction in charge defects but being electrically nature. The sign of charge in CeOX and that in La2O3 is opposite. Therefore, by formed stacking CeOX on La2O3, each charge compensates each other. Then, electrically nature as a totally film is achieved (Fig. 3.17).
CeOX (negative charge) CeOX/La2O3 (electrically nature) La2O3 (positive charge)
Fig. 3.17 CeOX/ La2O3 stack layer became electrically nature
64
In this deposition condition of the films, charged defects can be localized. Hence, these defects have impact on electrical properties such as leakage current, mobility and density of states. Second, the fixed charges are reduced. CeOX is multivalent material, which absorb or release oxygen depending on oxygen concentration. Hence, if oxygen vacancy was formed in La2O3 film, oxygen atom from CeOx may be compensated for the loss of oxygen. Conversely, if oxygen interstitial exists in La2O3 film, CeOx may be absorbed the excess oxygen atom (Fig. 3.18).
Interstitial oxygen
CeOX La2O3
La2O3 CeOX
CeOX La2O3
extinct Oxygen vacancy
La2O3
Fig. 3.18 Schemitic illustration of defect compensation mechanism in CeOx layer
If this reaction has occurred, it is expected that fixed charges in La2O3 are decreased significantly.
65
3.3.4 Change of Vfb Value In this section, the change of Vfb value by ration of CeOx was investigated. Fig. 3.19 shows the C-V characteristics and Vfb shift by changing CeOx rate in film.
2.5
0.2
2
CeOx : 67%
0.1
CeOx : 80%
1.5
CeOx : 100%
Vfb[V]
Capacitor [A/cm2]
CeOx : 0%
1
-0.1
0.5
-0.2 EOT=1.25 nm
0 -1.5
0
-0.5 0.5 Gate Voltage [V]
0
1.5
20
40
60
80
100
Ration of CeOx in film [%]
Fig. 3.19 Flat-band voltage shift by changing CeOX rate
As show the previous section, La2O3 and CeOX have positive charge and negative charge, respectively. Therefore, it is expected that Vfb value shift positive direction by depositing CeOx. As the result, it is clearly that depositing CeOx on La2O3 has the effect of improved Vfb value. However, in the case of CeOx rate in film is overlarge, Vfb too much shift. Hence, it is necessary to note the CeOx rate.
66
3.3.5
Physical Thickness-Related Vfb Values Rapidly Change
As shown in Fig. 3.14, 3.15, Vfb values rapidly change below some EOT value. According to film, those values are different. However, when relationship Vfb value with physical thickness, it is found that the start point of rapidly changing Vfb is almost the same physical thickness value (Fig. 3.20).
0.1 0.05
0.15
Flat Band Voltage [V]
Flat Band Voltage [V]
0.2
0.1
0.05 0
0 -0.05 -0.1 -0.15 -0.2
A -0.05 4
6
8
10
12
14
16
B
-0.25 4
18
5
0.2
0.4
0.1
Flat Band Voltage [V]
Flat Band Voltage [V]
0.5
0.2 0.1
7
8
9
10
0 -0.1
-0.2
C 0
3
4
5
6
7
8
11
Physical thickness [nm]
Physical thickness [nm]
0.3
6
D -0.3
9
0
Physical thickness [nm]
2
4
6
8
10
Physical thickness [nm]
Fig. 3.20 Flat-band – physical thickness plot
Vfb rapidly changing more depend on physical thickness than fixed charge in film. As this cause, it is expected that influence of metal diffusion from the tungsten gate electrode was reflected due to physical thickness so thin (Fig.3.21). In this study, it
67
12
postulates that the all charge defects exist at interface. Hence, the film thickness thinned and scattering tungsten reaches the interface. Then the influence became remarkable. The influence of physical thickness is main operation below physical thickness 6 nm. Therefore, to calculate Qit value, using region above this value.
W W
Si
Si
Not quite issue by thickness is large
Critical issue by thickness is thin
Fig. 3.21 influence of metal scattering
3.3.6 Conclusion In this section, fixed charge values in each film were estimated by using Eq.(3.5). As the result, CeOX and La2O3 single layer have positive and negative charge, respectively. CeOX / La2O3 stacked samples have positive charge and both Qit values are almost the same. As the comparison of all Qit, reduction of the value was achieved by formed CeOX / La2O3 stacked structure. It is expected for this reason; first, the each charge compensates other one. Then, electrically nature as a total film is achieved. Second, fixed charge reduced by effect of CeOx. On the other hand, Vfb shift was investigated by changing CeOx rate in film. As the result, this value shifts to positive direction by depositing CeOx.
68
Chapter 4 Characteristics of MOSFET 4.1
introduction
4.2 4.3 4.4
Drain current (Id) - Drain voltage (Vd) characteristics The Effective Mobility Characterization of Interface States by Charage Pumping Method Consideration of Film Structure Conclusion
4.5 4.6
69
4.1 Introduction In chapter 3, the electrical properties of MOS-capacitor were reported. The leakage current and fixed charge were improved by using CeOX/ La2O3 stacked structure. Then, the impact of stacked structure on electrical properties should be investigated. In this chapter, the characteristics of n-MOSFET with CeOX / La2O3 stack structured film will be discussed.
4.2 Drain Current (Id) - Drain Voltage (Vd) Characteristics Fig. 4.1 shows the Id-Vd characteristic of CeOX / La2O3 stacked sample,. The gate length and gate width of this transistor were 2.5 um and 50 um, respectively. In this figure, the applied gate voltages were from 0 to 1 eV with 0.2 step. As this figure, we found that operation of stacked structure transistor.
Drain current [mA]
5 4
EOT=1.37nm W/L=50/2.5 m
Vg=1V
Vg=0.8V
3 2
Vg=0.6V
1
Vg=0.4V Vg=0.2V
0
Fig4.1
0.2
0.4
0.6
0.8
1.0
Drain voltage [V] Id-Vd characteristic of CeOX / La2O3-stack layered MOSFET
70
10-3 La2O3 single
4E-4
CeOx/La2O3 stack
10-1 Log (Id) [A]
Drain current (Id) [A]
5E-4
3E-4 2E-4
10-3
10-5
1E-4
10-7 -0.5
0 -0.5
0
0.5
1
1.5
0
0.5
1
1.5
Drain voltage [V]
Drain voltage [V]
(b)
(a)
Fig. 4.2 shows the Id-Vg characteristics of CeOX /La2O3 stacked and La2O3 single samples at the same EOT. (a) is a liner scale and (b) is a logarithmic scale, respectively.
As this figure, threshold voltage (Vth) and Subthreshold slope value (S.S) are estimated. This result shows Table 4.1. As this result, Vth and S.S are signify a improvement by depositing CeOX.
Table 4.1 Vth and SS values of each layered MOSFETs EOT[nm]
Vth[V]
SS[mV/dec]
Ce/La
1.37
-0.01
67
La
1.37
-0.03
71
71
4.3 The Effective Mobility In this section, the effective mobility of La2O3 single and CeOX / La2O3 stacked MOSFET are experimentally evaluated. Mobility is measured by Split C-V method at 1MHz. The parasitic capacitances are subtracted by measuring different gate length (Lg) samples. Fig. 4.3 shows the effective mobility of both samples. The mobility was improvement by using stacked CeOX layer. Especially, large improvement is achieved in low electric field. Therefore, remote coulomb scattering was suppressed. 450 La2O3 single
400 Mobility (μ) [cm2/Vs]
CeOx/La2O3 stack
350 300 250 200 150 100 50 0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Eeff [MV/cm]
Fig. 4.3 Mobility of CeOX/ La2O3 stack structured and La2O3 single layerd MOSFETs
72
4.4 Characterization of Interface States by Charage Pumping Method As described previously, improvement of mobility is obtained by formed CeOx/ La2O3 stacked structure. Subsequently, the interface state density is estimated using charge pumping method. Figure 4.4 shows the charge pumping current. The interface state density (Dit) is calculated by Eq. (2.24). Each value is shown in Table 4.2. It is clearly, formed CeOX / La2O3 is produced considerable improvement.
3E-8 Charge pumping current [A]
La2O3 single CeOx/La2O3 stack
2.5E-8 2E-8 1.5E-8 1E-8 5E-9
-2.5
-1.5
-0.5
0.5
Gate voltage [V]
Fig. 4.4 Interface state density of MOS structures with CeOX / La2O3 stacked and La2O3 single layer evaluate on MOSFETs.
Table 4.2 interfacial state density EOT[nm]
Dit [eV-1cm-2]
Ce/La
1.37
3.3×1010
La
1.37
1.3×1011
73
4.5 Consideration of Film Structure As result of Dit, the interface states are different in both samples. Previously, it was expected that La-silicate was formed at La2O3/Si interface. However, the current result shows different condition in each sample. Consequently, interface condition is
Normalized Intensity [arb. units]
investigated by XPS analysis. Fig. 4.5 shows the XPS specter of Si 2s.
PDA at 300°C in O2 PDA at 600°C in N2 PDA at 500°C in N2 PDA at 400°C in N2 PDA at 300°C in N2 1nm-SiO2
bulk-Si Si 2s TOA = 52°
silicate SiO2
159
157
155 153 151 149 Binding Energy [eV]
147
Fig 4.5 XPS specter of Si 2s in CeOx/La2O3 sample [24]
As this figure, La-silicate is formed at interface. Additionally, as shown Fig. 4.6 the specters of La 3d5/2 and S 2s were remain unaltered by changing temperature and ambient. Therefore, the formed La-silicate remained static.
74
La 3d5/2
Si 2s
Intensity [arb. units]
TOA = 52°
848
PDA
844
840
836
832
154
150
146
at 600°C in N2 at 500°C in N2 at 400°C in N2 at 300°C in N2
Binding Energy [eV] Fig. 4.6 XPS analysis of La 3d5/2 and S 2s in CeOx/La2O3 sample [24].
As this result, La-silicate may be formed at interface of CeOx/La2O3 sample. As shown the XPS and Charge pumping results, it is expected that better La-silicate was formed by stacking CeOx (Fig. 4.7) .
La2O3
CeOX
La-silicate
La2O3 La-silicate
Si
Si
Better La-silicate
Fig. 4.7 Film structure in La2O3 single and CeOx/La2O3 stacked structure
75
4.6 Conclusion In this chapter, the Vth, S.S, mobility and interfacial density were investigated. As the result, those electrical properties were improved by formed CeOX/ La2O3 stacked structure. As this reason, it is expected that the effect of large physical thickness and suppressed fixed charge in discussed the previous chapter. Additionally, as can be expected form the XPS analysis and Dit values, it is expected that better La-silicate was formed by stacking CeOx.
76
Chapter 5 Analysis of Theoretical Calculation 5.1 5.2 5.3 5.4 5.5
Introductions First-Principles Rationale Density-Functional Theory (DFT) Local Density Approximations (LDA) Charge Defects Calculation.
5.5.1 5.5.2 5.5.3
5.6 5.7
Formation Energy Concentration of Charge Defects in La2O3 Expansion into the Other Materials
The Decision of Sample Structure Used Oxygen Potential Diagram Conclusion
77
5.1 Introductions Today, many theoretical calculation methods were studied and this accuracy has been improved. Therefore, theoretical calculation is quiet useful in the design of gate insulator with MOSFET. Consequently, in this study, the calculation was also used for investigated high-k film structure. In this captor, the quantity of the fixed charge in La2O3 is investigated the theoretical calculation. The calculation is done by using
the first-principle method.
Our first-principles calculations were based on the density-functional theory (DFT) within the local-density approximation (LDA), using the projector augmented wave pseudopotentials as implemented in the VASP code [19,20].
5.2 First-Principles Rationale Quantum mechanics provides a reliable way to calculate what electrons and atomic nuclei do in any situation. The behavior of electrons in particular governs most of the properties of materials. This is true for a single atom or for assemblies of atoms in condensed matter, because quantum mechanics describes and explains chemical bonds. Therefore we can understand the properties of any material from first-principles, that is, based on fundamental physical laws and without using free parameters, by solving the Schrödinger equation for the electrons in that material. This, however, is a tall order. We rapidly run into difficulty because electrons interact strongly with each other. The alarming consequence is that exact pencil-and-paper solutions exist only for a single electron in simple potentials: solving the Schrödinger equation for the hydrogen atom is a classic undergraduate task, but solving it for helium requires a computational approach. The problem of interacting electrons in condensed matter physics, one
78
manifestation of the many-body problem, is the defining challenge of the subject. Despite this difficulty, one can read dozens of papers each week describing the application of first-principles calculations to systems containing hundreds or thousands of atoms and electrons, yielding accurate, quantitative information. This is a great triumph of condensed matter science, and it has changed for good the way we approach the subject.
5.3 Density-Functional Theory (DFT) The quantum physics of electrons in materials is governed by the Schrödinger equation. Density-functional theory (DFT) provides a parameter-free frame-work for casting the formidable many-electron problem to a numerically tractable form involving only the three spatial coordinates of the N interacting electrons (as opposed to 3N in the full solution of the Schrodinger equation). The fundamental starting point is the DFT expression for the total energy Etot of the electronic system: E tot
i
( r ), R
h2 2m
(r)
1 2
drVion ( r )n( r )
1 2
i i,
2 i
e2 2
(r) Z Z
, ;
R
i
n( r )n( r' ) r r'
E XC n ( r ), n ( r ) ,
R
Where the total electronic density n( r ) summation of the one-electron states
drdr'
i,
fi
(r)
i
2
is expressed as a
(r), dependent on the spin index =↑,↓and with
the occupation number fi . Above, Vion is the nuclear (ionic) potential, and Z denotes the charge of ion
at R .
The coupled Kohn-Sham eigenvalue equations h2 2m
2 i
( r ) Veff n ( r ), n ( r )
79
i
(r)
i
i
(r)
Resulting from the minimization of Etot with respect to the density recast the complex many-body interactions into an effective single-electron potential Veff via the exchange-correlation functional EXC. In practice, the functional EXC has to be approximated. The popular choices are functional where exchange and correlation are treated as functions of the local density and/or its gradients. This sounds drastic, because electronic Pauli exchange is a manifestly nonlocal object, as demonstrated by the Hartree-Fock theory. However, there is a partial cancelation of errors, and these methods are surprisingly robust and accurate. The generalization to spin degrees of freedom is also straightforward in scalar-relativistic DFT A useful primer for designing DFT calculations has been written by Mattsson et al. The design of any calculation, whether using periodic boundary conditions, finite clusters or embedding techniques, involves the choice of the exchange-correlation functional. The choice, whether a particular flavor of local-density (LDA) or local spin-density (LSDA) approximation, an generalized-gradient approximation (GGA), full Hartre-Fock-type exchange, screened exchange, or a “hybrid” between a nonlocal orbital-based functional and a density-dependent functional, defines the physical accuracy of the calculation. The numerical accuracy of the calculation depends on such technical things as basis-set completeness, accuracy of intergration in both real and reciprocal space, convergence criteria, etc. the model accuracy depends naturally on how faithfully the chosen supercell, cluster or embedding methods describe the desired situation.
5.4 Local Density Approximations (LDA) Local-density approximations (LDA) are a class of approximations to the
80
exchange-correlation (XC) energy functional in DFT that depend solely upon the value of the electronic density at each point in space (and not, for example, derivatives of the density or the Kohn-Sham orbitals[21]). Many approaches can yield local approximations to the XC energy. Overwhelming, however, successful local approximations are those that have been derived from the homogeneous electron gas (HEG) model. In this regard, LDA is generally synonymous with functionals based on the HEG approximation, and which then applied to realistic systems (molecules and solids). In general, for a spin-unpolarized system, a local-density approximation for the exchange-correlation energy is written as LDA E xc
x
xc
dr
where ρ is the electronic density and εxc, the exchange-correlation energy density, is a function of the density alone. The exchange-correlation energy is decomposed in to exchange and correlation terms linearly,
so that separate expressions for εx and εc are sought. The exchange term takes on a simple analytic form for the HEG. Only limiting expressions for the correlation density are known exactly, leading to numerous different approximations for εc. Local-density approximations are important in the construction of more sophisticated approximations to the exchange-correlation energy, such as generalized gradient approximations or hybrid functionals, as a desirable property of any approximate exchange-correlation functional is that it reproduce the exact results of the HEG for non-varying densities. As such, LDA's are often an explicit component of such functional
81
5.5 Charge Defects Calculation. The La2O3 hexagonal crystal with 50-atom was assumed in the calculation. We have investigated two intrinsic defects with charge, Q, i.e., a single oxygen vacancy at 4-fold oxygen site, VOQ (Q = 0, +1, and +2) and an oxygen interstitial IOQ (Q=0,+1 and +2) in the crystal. The crystal structures were shown in Fig.5.1. In each crystal, total energies were calculated by first principles. La
IO2
O
(a) Fig. 5.1
(b)
VO 2
(c)
La2O3 crystal structures (a) is perfect crystal, (b) is included an
interstitial oxygen (IO) in crystal, (c) is formed oxygen vacancy (VO) in crystal
In doing so, the valence configurations of the pseudopotentials are 5s25p65d16s2 for La and 2s22p4 for O. We used an energy cutoff of 500 eV in the plane-wave basis set expansion. A Monkhorst-Pack k-point sets of 6x6x6 and 2x2x2 were used for a 5-atom unit cell and a 50-atom supercell of hexagonal La2O3 (space group P–3m1), respectively. The 5-atom cell was used for the optimization of the cell parameters, which were determined as a = 3.88 Å, c = 5.96 Å in good agreement with the experimental values (aexpt. = 3.9373 Å, cexpt. = 6.1299 Å [22]). The unit cell was extended to the 50-atom supercell to construct models for defects in La2O3.
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5.5.1 Formation Energy First, the formation energies of charge defects with charge, Q(0,1,2) were estimated by using the total energy values. The stability of these defects was compared in terms of the formation energy defined by
Ef ( XQ )
E tot ( X Q )
E tot ( bulk ) nO
O
Q(
F
Ecorr ) (5.1)
V
v
where Etot(XQ) and Etot(bulk) are the total energy of a defect X (Vo or Io) with charge Q and the bulk La2O3, which were given by our DFT calculations. Compensating background charge was introduced for the charged defects to avoid divergence of the total energy without any corrections afterward. The atomic positions were relaxed until the total energy difference was converged within 0.001 eV, which results in having the residual forces below 0.035 eV/Å. O is the oxygen chemical potential, and no is the number of oxygen atoms deviating from the perfect crystal; i.e., no =1 for Vo and no = 1 for Io.
F
is the Fermi energy referenced with the valence band maximum
La2O3. V is the correction to
v
v
of the bulk
for the shift in the electro static potential due to the
introduction of the charged defects into the supercell with respect to that in the bulk La2O3, which we found is 0.1 eV at a maximum. Ecorr is a correction to
v
originating
from the special k-point sampling for the shallow acceptor (IO in our case): the energy difference between the top of the valence band at
and the other k-points sampled in
our calculations, which is about -0.02 eV for IO. In Eq.(5.1) The
O
F
andO are the variable.
value changes depending on atmosphere. Here, this value was determined
by a half of the total energy of an oxygen molecule:
max O
O2 O
E tot (O 2 ) / 2. The
formation energies of each defect were estimated as changingF form valence band
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maximum to conduction band minimum. Those results are shown in Fig.2 4
8
Formation energy [eV]
Formation energy [eV]
10 Vo0
6 Vo-1
4 Vo-2
2
Vo
0
1
2
3
Io0
0 Io-1
-2 Io-2
-4
Io
-6
4
0
Fermi level [eV]
Fig. 5.2
2
1
2
3
4
Fermi level [eV]
Formation energy of each defects with charge Q (0, ±1, ±2) as a
function of Fermi level
It is easy for charge defect to be formed by formation energy small. Hence, as shown in Fig. 5.2, diatomic charge (VO+2, IO-2) is the stable-condition at band gap in both charge defects. Therefore, only diatomic charge as the valence state was thought. On the other hand, to investigate the charge defects changing referenced with F
O,
value is set to the valence band offset of La2O3 with respect to Si (2.6 eV) [23]. Thus,
only
O
is the variable in Eq. (5.1).
The maximum value of molecule:
max O
O2 O
O
is given by a half of the total energy of an oxygen
E tot (O 2 ) / 2. Whereas, the minimum value of
the condition that a metal lanthanum precipitate in La2O3 La 2O3
and
bulk La
min O
(
O
La 2O3
is determined by 2
bulk La
) / 3 where
are the chemical potentials of a bulk La2O3 and La per unit which were
calculated from the total energies of a 5-atom cell of hexagonal La2O3 and a 4-atom cell of
-La, respectively. To validate our computational results, we have estimated an
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enthalpy of formation of La2O3 from the formula:
H(La 2O3 )
La 2O3
2
bulk La
3
which
O2 O
gives 9.5 eV per La, in good agreement with an experimental value (9.301 eV) [22] In Fig. 6.3 the formation energy of each defect is shown as a function of is referenced with
O
O2 O
. Here,
. Only the stable charged states are depicted in Fig. 5.3. It is
understood that VO+2 predominates in a low
O,
while IO-2 preferably forms in a high
.
6 Vo+2
Formation energy [eV]
O
O
4 Excess oxygen interstitial
2
La2O3
0 -2
Excess oxygen vacancy IO-2 La2O3
-4 -7
-6
-5
-4
-3
-2
-1
0
Oxygen chemical potential [eV]
Fig. 5.3
Formation energy of each defect as a function of
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O
in La2O3.
5.5.2 Concentration of Charge Defects in La2O3 The concentration of defect was estimated by n[ X Q ]
N site exp(
Ef [XQ ] k BT
(5.2)
)
where Nsite is the number of defect sites available in a unit volume(Nsite (VO+2)=20, Nsite (IO-2)=10). kB is Boltzmann’s constant and T is the thermodynamic temperature at
Density of charged defect [cm-3]
the equilibrium. Fig. 5.4 shows that the addition of the two densities of VO+2 and IO-2
20 log( nVo
n Io )
0 -20
minimum point
-40 -60 -80 -100 -7
VO rich
IO rich
-1 -6 -5 -4 -3 -2 Oxygen Chemical Potential [eV]
0
Fig. 5.4 Density of charged defects in La2O3 layer
The concentration has a minimum at the -4.2 eV. For the reduction of charge defect, it’s preferable that
O
is fixed at near this value. Fixed
O
means that
O
is independent
of the process conditions. Therefore, the concentration of IO-2 and VO+2 are constant at the oxidation and reduction ambient, respectively. In addition, quantity of charge defects can be decreased by nearing the minimum point.
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By using multivalent materials,
O
may be fixed. The multivalent materials have
several valence state. If the oxide has two phases associated with different valence in value can be uniquely determined (point of arrow).
-5
Eu
-7 -8
Ce
-6
Pr2O3
EuO
Ce2O3
-4
Pr
-3
Eu2O3
La2O3
-2
CeO2
-1
PrO2
0
La
O
Oxygen Chemical Potential [eV]
the material,
-9 -10
Fig. 5.5 The oxygen chamical potential diagram of multivalent materials (Ce, Eu,Pr oxide) and La2O3
In this study, three multivalent materials (Ce, Eu, Pr oxide) were investigated. For example, the
O
value was estimated in CeOx.
The condition of existing two oxide phase under the thermal equilibrium state is: Ce 2 O 3
Here,
Ce2O3
H(Ce 2O3 ) 2
Ce
3
O2 O
O
and
2 CeO2
(5.3)
CeO 2
H(CeO 2 )
Ce
2
O2 O
were used in
the derivation of Eq. (5.3). CeO 2/Ce 2O 3 O
2 H (CeO 2 )
87
H (Ce 2 O 3 )
O2 O
(5.4)
Moreover, the absolute values of the measured enthalpy of formation for Ce2O3 and CeO2 per Ce are: H(Ce2O3)= 9.326 eV and
H(CeO2)=11.301 eV, respectively
[22] Thus, we consider that the oxygen chemical potential in this case is fixed at the value determined by Eq. (5.4), where
Ce2O3
and
CeO2
is constant. Thus,
O
is also
constant in CeOx film. As the result, oxygen concentlation of La2O3 is kept constant and neared minimum value. In other materials,
O
value were calculated the same way Comparison of each
value is shown the Fig. 5.6, and it shows that the
O
of Ce-oxide is closest to the
Density of charge defect [cm-3]
minimum point of the density of charge defects in La2O3.
20 log( nVo
n Io )
0 -20 Minimal point
-40 -60 O
( Eu )
O
( Ce )
O
( Pr )
-80 -100 -7
-1 -6 -5 -4 -3 -2 Oxygen Chemical Potential [eV]
0
Fig. 5.6 Density fo charged defects with fixed points of each materials
Therefore, it is expected that the combination of La2O3 and CeOx has an effect on reducing the fixed charge in La2O3. Here, it must be confirmed that different valence states exist under an oxidation and reduction ambient. XPS analysis shows that two phases associated with different valences of Ce (Ce3+
88
and Ce4+) exist in CeOx film [24], as shown in Fig. 5.7. The intensity ratio of the XPS spectrum of these two phases was dependent to the temperatures and also the ambient. However, both phases always exist.
Ce4+ Ce 3d5/2
Ce3+
O 1s
Ce3+
Intensity [arb. units]
TOA = 52°
Ce4+
PDA
894
890
886
882
878
874
534
530
at 600°C in N2 at 500°C in N2 at 400°C in N2 at 300°C in N2
526
Binding Energy [eV] Fig. 5.7 XPS spectra form CeOx layre in CeOx/La2O3 stacked capacitor [24].
Additionally, Table 5.1 shows the difference between binding energy of Ce 3d5/2 and Si 2s. As this table, those values are almost the same. Therefore, Fermi level in both layer are always equal and the oxygen concentration is a constant.
PDA
E(Ce3+)E(Si2s)
N2 300
731.0
N2 400
731.2
N2 500
730.9
N2 600
731.2
O2 300
731.0
Table
5.1
the
difference
between binding energy of Ce 3d5/2 and Si 2s.
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In other words, the cerium oxide acts as an oxygen reservoir thanks to its multivalent nature where Ce change from tetravalent to trivalent as absorbing oxygen under an oxidation ambient, and from trivalent to tetravalent as expelling oxygen under a reduction ambient. This contributes to having the La2O3 layer robust against the defect formation. This scenario is schematically depicted in Figure 5.8.
Fig. 5.8 The effect of CeOx. Oxygen consentlation kept a constant and formed charge defects are suppressed under the change in ambient.
5.5.3 Expansion into the Other Materials The investigated
O
diagram is shown in the Fig. 5.9. Once
O
is determined, the
best combination of two oxides can be determined by analyzing the density of charged defects. All enthalpy of formation values used in this calculation are shown Table 5.2. As an example of non- La2O3 high-k material, the same analysis has been performed on HfO2 (Fig. 5.10). One can understand that the best multivalent oxide to reduce the charged defects in HfO2 is again CeOx.
90
SiO2
WO3
PrO2
Pr2O3
Eu2O3
Pr
Eu
Ce
W
-7 -8
Si
-6
EuO
-5
-9
CeO2
ZrO2 Zr
Ce2O3
Al2O3 Al
HfO2 Hf
-4
TiO2
-3
Ti
-2
La2O3
-1
La
Oxygen Chemical Potential [eV]
0
-10
Fig. 5.9 Oxygen chemical potential diagram for several materials
Table 5.2 enthlpy of formation values [22]
Substance La2O3 Ce2O3 CeO2 Eu2O3 EuO Pr2O3 PrO2 TiO2 HfO2 Al2O3 ZrO2 SiO2 WO3
H [eV] -18.6 -18.652 -11.301 -17.233 -6.114 -18.992 -10.138 -9.784 -11.582 -17.367 -1.409 -9.441 -8.734
91
-50
-7 -8
PrO2
Pr2O3
n Io )
Pr
-6
Eu
-5
log( nVo
EuO
Ce2O3
-4
Eu2O3
-3
CeO2
HfO2
-2
Ce
-30
0 -1
Hf
-10
Oxygen Chemical Potential [eV]
Density of charge defect [cm-3]
10
-9 -10
Minimal point
-70 O
-90 -6
( Eu)
-5
O
(Ce )
-4
O
-3
-2
( Pr )
-1
0
Oxygen Chemical Potential [eV] Fig. 5.10 Density of charge defects in HfO2
5.6 The Decision of Sample Structure Used Oxygen Potential Diagram Here, oxygen potential diagrams are also useful for selection of electrode and layer structure. For example, CeOx and La2O3 combination layered sample was considerd. If the
O
estimated by CeOx, Si is oxidation in this value. Hence, to depositing CeOx on
Si, SiO2 interfacial layer may be formed. On the other hand, in La2O3/Si structure, La-silicate is formed at interface, which silicate has good electrical properties. Therefore, as the deposition material on Si, La2O3 is more suitable. Additionally, as selection of electrode, tungsten is inoxidezable to a high
O
value. henc, tungsten is hard
to oxidation, this is necessary condition for using metal electrode of MOSFET. Hence, using tungsten is better. Therefore, best sample structure is W/CeOx/ La2O3/Si (Fig. 5 .11).
92
WO3
CeO2
La2O3
SiO2
W/CeOX/La2O3 structure is the best W
Fixation
CeOX La2O3
Ce2O3
La-silicate
Si
W
Ce
La
Si
W
o
La2O3 CeOX SiO2
Si
Fig. 5.11 Fixed
O
for several materials using
O
of CeOx. W/CeOx/ La2O3
structure is the besta within combinations of these materials.
5.7 Conclution We suggested a method for reduction of the charged defects in film by using multivalent materials and investigated the effect of this method from the theoretical calculation, especially La2O3 in this report. As the result, it is verified that the combination of La2O3 and CeOx has an effect on reducing the fixed charge in La2O3. Additionally, as an example of non- La2O3 high-k material, the same analysis has been performed on HfO2. One can understand that the best multivalent oxide to reduce the charged defects in HfO2 is again CeOx. Thus, This method can be applied to the other materials. Therefore, it will be a new guideline for the improvement of film properties.
93
Chapter 6 Conclusion 6.1 Results of This Study 6.2 Future Works
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6.1 Results of This Study In this thesis, we investigated the electrical properties of in the La2O3 single and CeOX/ La2O3 stacked structure sample from both of theoretical calculation and experimental realization. In this chapter, the studies referred to in this thesis are summarized.
Experiment MOS capacitors and MOSFET with stacked high-k using CeOX /La2O3 structure have improved electrical properties. It is expected that this influenced the effect of CeOX, which has height dielectric constant and multi-valence states. Specifically, physical thickness can be large without great increased EOT due to CeOX has height permittivity. And fixed charge was suppressed by effect of multivalent material such as CeOx
Theoretical Characteristic The concentration of charge defect in La2O3 was estimated by using first-principles calculation. As the result, by combination of La2O3 and CeOx, the quantity and formed defect are suppressed. This reason comes from that the oxygen chemical potential in La2O3 is fixed a constant under an oxidation and reduction ambient. This idea is expounded by using oxygen potential diagram. Additionally, this method can be applied to other oxides and will be a new guideline for finding the best combination of a host high-k material with a capping layer.
95
6.2 Future Works In this study, a novel method of gate insulator design was suggested focused on La2O3 and CeOx. For the future, many more materials should be investigated from both of theoretical calculation and experimental realization. XPS analysis and LSDA theory are introduced as the experimental and theoretical methodology, electrical properties of several materials will be explored in more detail.
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[6] K. Ohmori et al., J. Appl. Phys. 101 084118 (2007) [7] Dieter K. Schroder, Semiconductor Material and Device Characterization 3rd Edition, John Wiley & Sons, Inc., 2005. [8] J. R. Hauser, and K. Ahmed, “Characterization of Ultra-Thin Oxides Using Electrical C-V and I-V Measurements,” Proc. AIP Conf., pp.235-239, 1998. [9] S. M. Sze, and K. K. Ng, Physics of Semiconductor Devices 3rd Edition, John Wiley & Sons, Inc., 2007. [10] S. M. Sze, Physics of Semiconductor Devices 2nd Edition, John Wiley & Sons Inc., 1981 [11] J. R. Yeargan and H. L. Taylor, “The Poole-Frenkel Effect with Compensation Present”, J. Applied Physics, 39(12), pp.5600-5604, 1968 [12] Y. Hagimoto et.al., Appl.Phys Lett., 77,4175 (2000) [13] S. M. Sze, Physics of semiconductor devices, John Wiley & Sons Inc., 2ed, 1986 [14] J. R. Hauser, “Extraction of Experimental Mobility Data for MOS Devices,” IEEE Trans. Electron Devices, Vol. 43, no. 11, pp. 1981-1988, 1996
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[15] S. Takagi, and M. Takayanagi, “Experimental Evidence of Inversion-Layer Mobility
Lowering
in
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Metal-Oxide-Semiconductor
Field-Effect-Transistors with Direct Tunneling Current,” Jpn. J. Appl. Phys., vol. 41, no. 4B, pp.2348-2352, 2002. [16] G.. Groeseneken, H. E. Maes, N. Beltran, and R. F. De Keersmaecker, “A Reliable Approach to Charge-Pumping Measurements in MOS Transistors,” IEEE Trans. Electron Devices, vol. ED-31, no. 1, pp. 42-53, 1984 [17] J. C. Wang, K. C. Chiang, T. F. Lei, and C. L. Lee, IPFE., p. 161, 2004 [18] K. Tatsumura, M. Goto, S. Kawanaka, K. Nakajima, T. Schimizu, T. Ishihara, and M. Koyama, “Clarification of Additional Mobility Components associated with TaC and TiN Metal Gates in scaled HfSiON MOSFETs down to sub-1.0nm EOT,” IEDM Tech. Dig., pp. 349-352, 2007 [19] G. Kresse and J. Hafner, Phys. Rev. B 47, RC558 (1993). [20] G. Kresse and J. Furthmüller, Phys. Rev. B 54, 11169 (1996). [21] Phys. Rev. 140, A1133 - A1138 (1965) [22] O. Kubaschewski, C. B. Alcock, and P. J. Spencer, in Materials Thermochemistry 6th edition (Pergamon Press, April 1993) [23] J. Robertson, Rep. Prog, Phys. Vol. 69, 327 (2006). [24] H. Nohira et al., J.S.A.P. 69th Autumn Meeting 2008, 3a-CB-7
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Acknowledgement The author would like to thank her supervisor at Tokyo Institute of Technology, Professor Hiroshi Iwai for his excellent guidance and continuous encouragement. The author is also grateful to Prof. Hiroshi Iwai, Prof. Nobuyuki Sugii, Prof. Kazuo Tsutsui of Tokyo Institute of Technology, Prof. Keisaku Yamada of Waseda University, Prof. Kenji Shiraishi of University of Tsukuba, Dr. Toyohiro Chikyow, Dr. Naoto Umezawa of National Institute for Materals Scinece for reviewing the thesis and for valuable advice. The author would like to thank Professor Takeo Hattori for his valuable advice on XPS. The author would like to thank Professor Nobuyuki Sugii very much for her polite instruction, useful advice, and continuous support. The author would like to thank Associate Professor Kazuo Tsutsui for his valuable discussions. The author would like to thank Dr. Kuniyuki Kakushima and Dr. Parhat Ahmet for his useful discussions and appropriate advice for this study. The author would line to thank Dr. Naoto Umezawa for his kind instruction for theoretical calculation. The author would like to thank Mr. Takamasa Kawanago for his kind instruction for the experiment. The author would like to thank all members of Professor Iwai’s Laboratory, Mr. Atsushi Kuriyama, Mr. Yuichiro Sasaki, Mr. HenderianshahSauddin, Mr. Ryuji Tomita, Mr. Jaeyeol Song, Mr. Kiichi Tachi , Mr. Manabu Adachi, Mr. Yoshihisa Ohishi, Mr. Takamasa Kawanago, Mr. Soushi Satoh, Mr. Maimaitirexiati Maimaiti, Mr. Abudukelimu Abudureheman, Mr. Ko-ichi Okamoto, Mr. Hideyuki Kamimura, Mr Ko-hei Noguchi, Mr Masahumi Hino, Mr Hiroki Fujisawa, Mr. Hideaki Arai, Mr. Kiyohisa Funamizu, Mr. Wataru Hosoda, Mr. Lee Yeong-hun, Mr. Katsuya Matano, Mr. Hiroto Nakayama, Mr. Dariush Hassan Zadeh, Mr. Mokhammad Sholihul Hadi, Mr. Tomotsune Koyanagi for their kind friendship and discussions. The author would like to express sincere gratitude to laboratory secretaries, Ms. M. Karakawa and Ms. A. Matsumoto. Finally the author would like to thank her father Shigeru, her mother Mrgumi, her brothers Kyouhei and Keisuke .
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Kouda Miyuki Yokohama Japan January 2009
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