ITS42008-SB-D Smart Octal High-Side NMOS-Power Switch
Data Sheet Rev 1.01, 2014-05-19
Standard Power
Smart Octal High-Side NMOS-Power Switch
1
ITS42008-SB-D
Overview
Features • • • • • • • • • • • • • • • •
Programmable Input thresholds: CMOS or VS / 2 Switching all types of resistive, inductive and capacitive loads Fast demagnetization of inductive loads Very low standby current Optimized Electromagnetic Compatibility (EMC) Constant current source diagnostic output for overtemperature Overload protection Undervoltage shutdown with hysteresis Current limitation Short circuit protection Thermal shutdown with restart Overvoltage protection (including load dump) Reverse battery protection with external resistor Loss of GND and loss of Vbb protection Electrostatic Discharge Protection (ESD) Green Product (RoHS compliant)
PG-DSO-36
ITS42008-SB-D is not qualified and manufactured according to the requirements of Infineon Technologies with regards to automotive and/or transportation applications. Description The ITS42008-SB-D is a protected 200mΩ Smart Octal High-Side NMOS-Power Switch in a PG-DSO-36 power package with charge pump, CMOS or supply-rationmetric compatible input and constant current diagnostic feedback indicating overtemperature of the device. Product Summary Overvoltage protection VSAZmin= 47V Operating voltage range: 11V < VS< 45V On-state resistance RDSON = typ 150mΩ Operating Temperature range: Tj = -25°C to 125°C Application • • • • •
All types of resistive, inductive and capacitive loads. Driver for electromagnetic relays Power switch for 12V, 24V and 42V DC applications with CMOS compatible or high voltage control interface Micro controller or opto coupler compatible power switch with diagnosis feedback for overtemperature Power managment for high-side-switching with low current consumption in OFF-mode
Type
Package
Marking
ITS42008-SB-D
PG-DSO-36
I2008D
Data Sheet
2
Rev 1.01, 2014-05-19
ITS42008-SB-D Block Diagram and Terms
2
Block Diagram and Terms
GND
+VS
+VS
19
ITS42008-SB-D Channel 1
Biasing Supervision
LS ST IN1
3 20
Input Levelshifter Overtemperature Diagnosis
Logic
Protection and Gate-Control
ESD Protection
6 R IN1
IN2 IN3 IN4 IN5 IN6
IN7 IN8
7 8 9 10 11
12 13
Figure 1
Data Sheet
RIN2 R IN3 R IN4
Temperature Sensor
36 OUT1 35
Channel 2
34 OUT2 33
Channel 3
32 OUT3 31
Channel 4
30 OUT4 29
Channel 5
28 OUT5 27
Channel 6
26 OUT6 25
Channel 7
24 OUT7 23
Channel 8
22 OUT8 21
R IN5 R IN6
R IN7 R IN8
+VS
1 2 4 5 14 15 16 17 18
not connected
TAB
Block diagram
3
Rev 1.01, 2014-05-19
ITS42008-SB-D Block Diagram and Terms
Voltage- and Current-Definitions: IS
Channel 1
I GND
Biasing Supervision
GND
LS
I LS IST
IN1
IIN1
V IN1
VST
V LS
IN4 IN5 IN6
IN7
6
Temperature Sensor
RIN1
7
RIN2
8
RIN3
9
RIN4
10
RIN6
12
34 OUT2 33
Channel 3
32 OUT3 31
Channel 4
30 OUT4 29
Channel 5
28 OUT5 27
Channel 6
26 OUT6 25
Channel 7
24 OUT7 23
Channel 8
22 OUT8 21
RIN7 IN8
13
OUT1
Channel 2
RIN5
11
36 35
RIN8
IOUT1
IL1 R L1
IN3
Overtemperature Diagnosis
20
Protection and Gate -Control
ESD Protection
1 2 4 5 14 15 16 17 18
VOUT1
IN2
Logic
Input Levelshifter
3
+VS
VS
ST
GND
ITS42008-SB-D
+VS
+VS
19
VFDS 1
GND
not connected
TAB
GND
Switching Times and Slew Rate Definitions: VIN
H L
VOUT
t +VS VDS
90% 70%
dV/tOFF 40% 30%
dV/t ON 10%
0
tON
t
tOFF
IL 0 OFF
Figure 2
Data Sheet
ON
OFF
t
Terms - parameter definition
4
Rev 1.01, 2014-05-19
ITS42008-SB-D Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
NC NC LS NC NC IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 NC NC NC NC NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Figure 3
Pin configuration top view, PG-DSO-36
3.2
Pin Definitions and Functions
Pin
Symbol
Function
1, 2, 4, 5
NC
not connected
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
OUT1 OUT1 OUT2 OUT2 OUT3 OUT3 OUT4 OUT4 OUT5 OUT5 OUT6 OUT6 OUT7 OUT7 OUT8 OUT8 ST GND
3
LS
Input level progamming pin; Level: CMOS if LS=L; VS/2 if LS=H
6
IN1
Input channel 1, controles the power switch; the powerswitch is ON when IN1=H
7
IN2
Input channel 2, controles the power switch; the powerswitch is ON when IN2=H
8
IN3
Input channel 3, controles the power switch; the powerswitch is ON when IN3=H
9
IN4
Input channel 4, controles the power switch; the powerswitch is ON when IN4=H
10
IN5
Input channel 5, controles the power switch; the powerswitch is ON when IN5=H
11
IN6
Input channel 6, controles the power switch; the powerswitch is ON when IN6=H
12
IN7
Input channel 7, controles the power switch; the powerswitch is ON when IN7=H
13
IN8
Input channel 8, controles the power switch; the powerswitch is ON when IN8=H
14, 15, 16, 17, 18
NC
not connected
19
GND
Logic ground
20
ST
Status output (common diagnostic output); current source on in case of overtemperature; integrated pull down resistor to GND
21 and 22
OUT8
Output to the load of channel 8 (source of the DMOS power switch)
23 and 24
OUT7
Output to the load of channel 7 (source of the DMOS power switch)
25 and 26
OUT6
Output to the load of channel 6 (source of the DMOS power switch)
27 and 28
OUT5
Output to the load of channel 5 (source of the DMOS power switch)
Data Sheet
5
Rev 1.01, 2014-05-19
ITS42008-SB-D Pin Configuration Pin
Symbol
Function
29 and 30
OUT4
Output to the load of channel 4 (source of the DMOS power switch)
31 and 32
OUT3
Output to the load of channel 3 (source of the DMOS power switch)
33 and 34
OUT2
Output to the load of channel 2 (source of the DMOS power switch)
35 and 36
OUT1
Output to the load of channel 1 (source of the DMOS power switch)
TAB
VS
Supply voltage (design the wiring for the maximum short circuit current and also for low thermal resistance)
Data Sheet
6
Rev 1.01, 2014-05-19
ITS42008-SB-D General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 1
Absolute maximum ratings 1) at Tj = 25°C unless otherwise specified. Currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”
Parameter
Symbol
Values Min.
Typ.
Unit Max.
Note / Number Test Conditi on
Supply voltage VS Voltage Voltage for short circuit protection
VS VSSC
45
V
4.1.1
VS
V
4.1.2
Output stage OUTx Output Current; (Short circuit current see electrical characteristics)
IOUTx
-2
A
self limited
4.1.3
1.6
A
self limited
4.1.4
Reverse current through GND Current
IRGND
Input INx (channel 1 to 8) Voltage Current
VINx IIN
- 10
VS
V
4.1.5
-5
5
mA
4.1.6
VLS
-1
VS
V
4.1.7
ILS ILS
- 0.3
Tj Tstg
Input level progamming LS Voltage Status ST Voltage Current
V
self limited
4.1.8
1
mA
self limited
4.1.9
-40
125
°C
4.1.10
-55
125
°C
4.1.11
3.3
W
4.1.12
Temperatures Junction Temperature Storage Temperature Power dissipation Ta = 25 °C2)
P tot
Inductive load switch-off energy dissipation Tj = 125 °C; IL= 625mA1); all channels active
EAS
1
J
single pulse
4.1.13
Tj = 125 °C; IL= 625mA1); one channel active
EAS
10
J
single pulse
4.1.14
-1
1
kV
HBM3)
4.1.15
-5
5
kV
HBM3)
4.1.16
ESD Susceptibility ESD susceptibility (pins INx; LS and ST) ESD susceptibility (all other pins)
VESD VESD
1) Not subject to production test, specified by design 2) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70mm thick) copper area for Vbb connection. PCB is vertical without blown air 3) ESD susceptibility HBM according to EIA/JESD 22-A 114.
Data Sheet
7
Rev 1.01, 2014-05-19
ITS42008-SB-D General Product Characteristics Note: Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” the normal operating range. Protection functions are neither designed for continuous nor repetitive operation.
4.2
Functional Range
Table 2
Functional Range
Parameter
Symbol
Values Min.
VS
Nominal Operating Voltage
Typ.
Unit
Note / Test Condition
Number
V
VS increasing
4.2.1
Max.
11
45
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 3 Parameter
Thermal Resistance1) Symbol
Values Min.
Typ.
Unit Max.
Note / Test Condition
Number
Thermal Resistance - Junction to Rthj-tab tab
2.8
K/W
Thermal Resistance - Junction to RthJA_1s0p Ambient - 1s0p, minimal footprint
44.1
K/W
2)
4.3.2
Thermal Resistance - Junction to RthJA_1s0p_300mm Ambient - 1s0p, 300mm2
26.5
K/W
3)
4.3.3
Thermal Resistance - Junction to RthJA_1s0p_600mm Ambient - 1s0p, 600mm2
23.8
K/W
4)
4.3.4
Thermal Resistance - Junction to RthJA_2s2p Ambient - 2s2p
19.9
K/W
5)
4.3.5
Thermal Resistance - Junction to RthJA_2s2ptv Ambient with thermal vias - 2s2p
18.8
K/W
6)
4.3.6
4.3.1
1) Not subject to production test, specified by design 2) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, footprint; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu. 3) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, Cu, 300mm2; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu. 4) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, 600mm2; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu. 5) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Data Sheet
8
Rev 1.01, 2014-05-19
ITS42008-SB-D General Product Characteristics 6) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board with two thermal vias; the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu. The diameter of the two vias are equal 0.3mm and have a plating of 25um with a copper heatsink area of 3mm x 2mm). JEDEC51-7: The two plated-through hole vias should have a solder land of no less than 1.25 mm diameter with a drill hole of no less than 0.85 mm diameter.
Data Sheet
9
Rev 1.01, 2014-05-19
ITS42008-SB-D Electrical Characteristics
5
Electrical Characteristics
Table 4
VS = 15V to 30V; Tj = -25°C to 125°C; VLS= 0V; all voltages with respect to ground, currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”. Typical values at Vs = 13.5V, Tj = 25°C; index “x” means “number of channel 1 to 8”.
Parameter
Symbol
Values Min.
Unit
Note / Test Condition
Number
IOUTx= 0.5A; Tj = 25°C; VLS=VINx= VS=15V IOUTx= 0.5A; Tj = 125°C; VLS=VINx= VS=15V
5.0.1
Typ. Max.
Powerstages NMOS ON Resistance
RDSONx
150
200
mΩ
NMOS ON Resistance
RDSONx
270
320
mΩ
Turn ON Time(to 90% of Voutx); L to H transition of VINx
tONx
50
100
µs
VS=15V; RLx = 47Ω
5.0.3
Turn OFF Time (to 10% of Voutx); H to L transition of VINx
tOFFx
75
150
µs
VS=15V; RLx = 47Ω
5.0.4
ON-Slew Rate (10 to 30% of Voutx); L to H transition of VINx
SRONx
1.0
2.0
V / µs VS=15V; RLx = 47Ω
5.0.5
OFF-Slew Rate (70 to 40% of Voutx); H to L transition of VINx
SROFFx
1.0
2.0
V / µs VS=15V; RLx = 47Ω
5.0.6
10.5
V
VS decreasing
5.0.7
11.0
V
VS increasing
5.0.8
V
VSUHY = VSSU - VSUV
5.0.9
VINx= VLS= VS=30V VINx= 6.5V; VLS= VS=15V; VOUTx= 0V VINx= 6.5V; VLS=VS=15V VOUTx= 0V
5.0.10
Tj = -25°C VLS=VS =VINx= 30V; tmx = 700µs
5.0.13
5.0.2
Timings of Power Stages1)
Under voltage lockout (charge pump start-stop-restart) Supply undervoltage; charge pump stop voltage
VSUV
Supply startup voltage; Charge pump restart voltage
VSSU
Supply undervoltage hysteresis
VSUHY
0.5 5
12
mA
Standby current
IGND ISSTB
50
150
µA
Output leakage current
IOUTLKx
5
10
µA
1.9
A
7.0
Current consumption Operating current
5.0.11
5.0.12
Protection functions 2) Initial peak short circuit current limit ILSCPx
Data Sheet
10
Rev 1.01, 2014-05-19
ITS42008-SB-D Electrical Characteristics Table 4
VS = 15V to 30V; Tj = -25°C to 125°C; VLS= 0V; all voltages with respect to ground, currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”. Typical values at Vs = 13.5V, Tj = 25°C; index “x” means “number of channel 1 to 8”.
Parameter
Symbol
Values Min.
Initial peak short circuit current limit ILSCPx
Initial peak short circuit current limit ILSCPx
Output clamp at VOUTx = VS - VDSCLx VDSCLx (inductive load switch off)
0.7
Number
A
Tj = 25°C VLS=VS =VINx= 30V; tmx = 700µs Tj = 125°C VLS=VS =VINx= 30V; tmx = 700µs VINx = 5.0V;
5.0.14
IOUTx = 4mA; VLS=30V IS = 4mA VLS=30V
5.0.17
A
1.1 47
Note / Test Condition
Typ. Max. 1.4
ILSCRx Repetitive short circuit current limitTj = TjTrip ; see timing diagrams
Unit
53
A 60
V
5.0.15
5.0.16
Overvoltage protection
VSAZ
47
V
Thermal overload trip temperature
TjTrip
135
°C
5.0.19
Thermal hysteresis
THYS
K
5.0.20
Reverse Battery
10
5.0.18
3)
Continuous reverse battery voltage VSREV
45
V
5.0.21
VFDSx
1.2
V
IFDS = 1.25A; VIN= 0V 5.0.22
V
LS = L; CMOS mode
5.0.23
V
LS = L; CMOS mode
5.0.24
V
LS = H or open; ratiometric mode
5.0.25
VST / 2 - 1 V
LS = H or open; ratiometric mode
5.0.26
Forward voltage of the drainsource reverse diode Input interface; pin INx Input turn-ON threshold voltage
VINONx
Input turn-OFF threshold voltage
VINOFFx
Input turn-ON threshold voltage
VINONx
Input turn-OFF threshold voltage
VINOFFx
Input threshold hysteresis Off state input current
VINHYSx IINOFFx
On state input current
IINONx
Off state input current
IINOFFx
On state input current
IINONx
Input switch ON delay time
tdON
Data Sheet
2.2 0.8
VST / 2 + 1
0.3
V
8
70
80
260
150
340 11
5.0.27
µA
LS = L; CMOS mode VINx = 0.8V
5.0.28
µA
LS = L; CMOS mode VINx = 2.2V
5.0.29
µA
LS = H or open; ratiometric mode VINx = VST / 2 - 1
5.0.30
µA
LS = H or open; ratiometric mode VINx = VST / 2 + 1
5.0.31
µs
5.0.32 Rev 1.01, 2014-05-19
ITS42008-SB-D Electrical Characteristics Table 4
VS = 15V to 30V; Tj = -25°C to 125°C; VLS= 0V; all voltages with respect to ground, currents flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”. Typical values at Vs = 13.5V, Tj = 25°C; index “x” means “number of channel 1 to 8”.
Parameter
Symbol
Values
Unit
Min.
Typ. Max.
Input resistance
RINx
2
3
RLS
300
800 3
5
Note / Test Condition
kΩ
Number 5.0.33
Input interface; pin LS Pull down resistance
kΩ
VLS=VS =15V
5.0.34
mA
VST = 5V VLS=VS =30V VST = 0V; Tj < 135°C; VLS=VS =30V
5.0.35
Status output (current source); pin ST Status output current
IST
2
Status leakage current
ISTLK
-2
4
µA
5.0.36
1) Timing values only with high slewrate input signal; otherwise slower. 2) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. 3) Requires a 150W resistor in GND connection. The reverse load current trough the intrinsic drain-source diode of the powerM
Data Sheet
12
Rev 1.01, 2014-05-19
ITS42008-SB-D Typical Performance Graphs
6
Typical Performance Graphs
Typical Characterisitics
Transient Thermal Impedance ZthJA versus Pulse Time tp @ 6cm² heatsink area
Transient Thermal Impedance ZthJA versus Pulse Time tp @ min footprint
D = tp / T
D = tp / T
On-Resistance RDSONx versus Junction Temperature Tj
On-Resistance RDSONx versus Supply Voltage VS
250
300
250 200
RDSONx [mΩ]
RDSONx [mΩ]
200 150
100
150
100
50
Tj=−40°C;IL=0.5A
50
Tj=25°C;IL=0.5A Vs=15V;VINx=5V;VLS=0V 0 −40 −25
Data Sheet
0
25
50 Tj [°C]
Tj=125°C;IL=0.5A 75
100
0 10
125
13
20
30 Vs[V]
40
50
Rev 1.01, 2014-05-19
ITS42008-SB-D Typical Performance Graphs Typical Characterisitics Switch ON Time tONx versus Junction Temperature Tj
Switch OFF Time tOFFx versus Junction Temperature Tj
80
100 90
70
80 60 70 60
tOFFx [μs]
tONx [μs]
50
40
50 40
30
30 20 20 10
10 Vs=15V;RLx=47Ω
0 −25
0
25
50 Tj[°C]
75
100
Vs=15V;RLx=47Ω 0 −25
125
ON Slewrate SRONx versus Junction Temperature Tj
0
25
50 Tj[°C]
75
100
125
75
100
125
OFF Slewrate SROFFx versus Junction Temperature Tj 1.4
1 0.9
1.2 0.8 1
0.7
0.8 −dV V [ ] dtoff μs
dV V [ ] dton μs
0.6 0.5 0.4 0.3
0.6
0.4
0.2 0.2 0.1 Vs=15V;RLx=47Ω 0 −25
Data Sheet
0
25
50 Tj[°C]
75
100
Vs=15V;RLx=47Ω 0 −25
125
14
0
25
50 Tj[°C]
Rev 1.01, 2014-05-19
ITS42008-SB-D Typical Performance Graphs Typical Characterisitics Standby Current ISSTB versus Junction Temperature Tj
Output Leakage current IOUTLKx versus Junction Temperature Tj
50
4
45
3.5
40 3 35 2.5
IOUTLK [μA]
ISSTB [μA]
30 25 20
2
1.5
15 1 10 0.5
5 VINx=0V;Vs=30V;Voutx=0V 0 −25
0
25
50 Tj [°C]
75
100
Vs=30V;VINx=0V;VOUTx=0V 0 −25
125
0
25
50 Tj [°C]
75
100
125
2
500
1.8
450
1.6
400
1.4
350
1.2
300
tdON [μs]
ILSCPx [A]
Initial Peak Short Circuit Current Limt ILSCPx versus Initial Short Circuit Shutdown time tdON versus Junction Temperature Tj Junction Temperature Tj
1
250
0.8
200
0.6
150
0.4
100
0.2
50 Vs=24V
0 −25
Data Sheet
0
25
50 Tj [°C]
75
100
Tj=25°C 0 10
125
15
20
30 Vs [V]
40
50
Rev 1.01, 2014-05-19
ITS42008-SB-D Typical Performance Graphs Typical Characterisitics Input Current Consumption IINx versus Input voltage VIN
50
50
45
45
40
40
35
35
30
30
IINx [μA]
IINx [μA]
Input Current Consumption IINx versus Junction Temperature Tj
25
25
20
20
15
15
10
10
5
VINx≤0.7V;Vs=15V
Tj=−25°C;Vs=15V Tj=25°C;Vs=15V
5
VINx≥2.2V;Vs=15V 0 −25
0
25
50 Tj [°C]
Tj=125°C;Vs=15V 75
100
0
125
0
5
10
15
VINx[V]
Input Current Consumption IINx versus Junction Temperature Tj
Input Current Consumption IINx versus Input voltage VIN
180
200
160
180 160
140
140 120
IINx [μA]
IINx [μA]
120 100 80
100 80
60 60 40 20
40 VINx≤0.4⋅Vs;Vs=30V
Tj=−25°C;VLS=Vs=30V Tj=25°C;VLS=Vs=30V
20
VINx≥0.6⋅Vs;Vs=30V 0 −25
Data Sheet
0
25
50 Tj [°C]
Tj=125°C;VLS=Vs=30V 75
100
0
125
16
0
5
10
15 VINx[V]
20
25
30
Rev 1.01, 2014-05-19
ITS42008-SB-D Typical Performance Graphs Typical Characterisitics Input Threshold voltage VINH,Lx versusSupply Voltage VS
2
2
1.8
1.8
1.6
1.6
1.4
1.4
1.2
1.2
VINx [V]
VINx [V]
Input Threshold voltage VINH,Lx versus Junction Temperature Tj
1
1
0.8
0.8
0.6
0.6
0.4
0.4 OFF;Vs=15V
0.2
OFF;Tj=25°C
0.2
ON;Vs=15V 0 −25
0
25
50 Tj [°C]
75
100
ON;Tj=25°C 0 10
125
Input Threshold voltage VINH,Lx versus Junction Temperature Tj
20
30 Vs[V]
40
50
Input Threshold voltage VINH,Lx versusSupply Voltage VS
16
25
15.5
15
20
VINx [V]
VINx [V]
14.5
14
15
13.5
13
10
12.5
OFF;Tj=25°C;VLS=Vs
OFF;VLS=Vs=30V ON;VLS=Vs=30V
12 −25
Data Sheet
0
25
50 Tj [°C]
75
100
ON;Tj=25°C;VLS=Vs 5 10
125
17
20
30 Vs[V]
40
50
Rev 1.01, 2014-05-19
ITS42008-SB-D Typical Performance Graphs Typical Characterisitics Max. allowable Load Inductance L versus Load current ILx
Max. allowable Inductive single pulse Switch-off Energy EAS versus Load current ILx
45
3.5 All channels ON Tjstart=125°C;Vs=24V;RL=0Ω
40
All channels ON Tjstart=125°C;Vs=24V 3
35 2.5 30
L [H]
EASx [J]
25 20
2
1.5
15 1 10 0.5 5 0 0.3
0.4
0.5 ILx [A]
0.6
0 0.3
0.7
Status Output Current IST versus Supply Voltage VS
0.4
0.5 ILx [A]
0.6
0.7
Internal pull down Resistor RLS at pin LS versus Supply Voltage VS
3
1.5
2.95 2.9
1
VS=15V VST=5V Tj=135°C
2.8
RLS [MΩ]
IST [mA]
IST
2.85
2.75 2.7
0.5 2.65 2.6
Tj=−25°C;VLS=Vs=15V Tj=25°C;VLS=Vs=15V
2.55 Vs=15V;VST=5V;Tj=135°C 2.5 10
Data Sheet
15
20
25 30 Vs [V]
35
40
Tj=125°C;VLS=Vs=15V 0 10
45
VS
18
20
30 Vs[V]
40
50
Rev 1.01, 2014-05-19
ITS42008-SB-D Application Information
7
Application Information
7.1
Application Diagram
The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty for a certain functionality, condition or quality of the device. Electronic Control Unit Wire Harness
GND
+VS
+VS
19
ITS42008-SB-D Channel 1
ECU GND
Biasing Supervision
LS ST IN1
3
Input Levelshifter
20
Overtemperature Diagnosis
6
RIN1
Logic ESD Protection
Protection and Gate -Control
+VS
1 2 4 5 14 15 16 17 18
not connected
TAB
Wire Harness
36 35
OUT1
Channel 2
34 33
OUT2
Channel 3
32 31
OUT3
Channel 4
30 29
OUT4
Channel 5
28 27
OUT5
Channel 6
26 25
OUT6
Channel 7
24 23
OUT7
Channel 8
22 21
OUT8
Temperature Sensor
GND3
CS 220nF
C OUT
Control Interface
IN2 IN3 IN4 IN5 IN6 IN7
7 8 9 10 11
RIN2 RIN3 RIN4 RIN5 RIN6
12 RIN7
IN8
Figure 4
13
RIN8
Complex LOAD
1nF GND1
GND2
ECU GND
Application Diagram
The ITS42008-SB-D can be connected directly to the battery of a supply network. It is recommended to place a ceramic capacitor (e.g. CS = 220nF) between supply and GND of the ECU to avoid line disturbances. Wire harness inductors/resistors are sketched in the application circuit above. The complex load (resistive, capacitive or inductive) must be connected to the output pin OUT. A built-in current limit protects the device against destruction. The ITS42008-SB-D can be switched on and off with ground related standard logic signal at pin INx if the level programming pin LS is set to L. If LS is connected to the supply voltage VS the input threshold is set to ~ 50% of VS. To achieve a higher robustness it is recommended to connect the LS pin to GND or Supply voltage. If the pin LS is left open the thresholds are automatically set to CMOS level caused by an internal high ohmic pull down resistor to GND. In standby mode (all inputs INx=L) the ITS42008-SB-D is deactivated with very low current consumption. The output voltage slope is controlled during on and off transistion to minimize emissions. Only a small ceramic capacitor COUT=1nF is recommended to attenuate RF noise.
Data Sheet
19
Rev 1.01, 2014-05-19
ITS42008-SB-D Application Information In the following chapters the main features, some typical waverforms and the protection behaviour of the ITS42008-SB-D is shown. For further details please refer to application notes on the Infineon homepage.
7.2
Diagnosis Description
For diagnostic purpose the device provides a digital output pin ST in order to indicate fault conditions. The status output (ST) of the ITS42008-SB-D is a high voltage current source. In “normal” operation mode (no overtemperature) the current source is switched OFF. An internal pull down resistor pulls pin ST down to GND. In case of overtemperature the current source is activated. To limit the voltage at pin ST an external zenerdiode to GND must be added. The following truth table defines the status output.
Table 5
Truth Table of diagnosis feature
Device Operation
INx
OUTx
current source at ST
Normal Operation
L
L
OFF
Normal Operation
H
H
OFF
Short circuit to GND
L
L
OFF
Short circuit to GND
H
L
OFF
Undervoltage at VS
L
L
OFF
Undervoltage at VS
H
L
OFF
Overtemperature
L
L
OFF
Overtemperature
H
L
ON
Data Sheet
20
Comment
toggeling with restart
Rev 1.01, 2014-05-19
ITS42008-SB-D Application Information
Special Feature Description
Supply reverse voltage:
TAB I ST
VON
20
ST
INx
OUTx
X ZDIN
VBatt
ZDSAZ R IN R LS
3
LS
IRev2
VS EBatt
ZDSAZ
VBatt
LS
INx
OUTx
X RLS
IIN
GND
LL
ELoad
RIN X Level control
IL
VOUT
3
ZL
TAB
TAB ZD DSCL
20
ZD IN
Level control 19
Over temp
X
IIN
LS
VDSCL
VDSCL
R LS
IRev1
Energy calculation:
I ST
X
3
ITS42008-SB-D
OUTx
GND
19
If reverse voltage is applied to the device : 1.) Current via load resistance RL : IRev1 = (VRev – VFDS) / RL 2.) Current via Input pin IN and dignostic pin ST : IRev2 = IST+IIN To protect the control device the current must be limited with the extrernal series resistors. Both currents will sum up to: IRev = IRev1+ IRev2
ST
R IN
ZDIN
Level control
RGND
VS
ZDSAZ INx
X
IIN
R ST
ITS42008-SB-D
20
RLS
GND
ZL
Drain-Source power stage clamper V DSCL:
I ST
OUTx
X ZD IN
If over-voltage is applied to the V S-Pin: Voltage is limited to V ZDSAZ; current can be calculated : IZDSAZ = (VS – VZDSAZ) / RGND A typical value for RGND is 150Ω. In case of ESD pulse on the input pin there is in both polarities a peak current IINpeak ~ VESD / RIN
ST
RIN
RST2
RGND
Over temp
IRev
ZDSAZ VControl INx
Level control
VOUT
GND
20
X
IIN 19
Over temp
VS
VFDS
Over temp
ZDDSCL
I ST ST
ITS42008-SB-D
VS
ZDDSCL
TAB
ITS42008-SB-D
19
3
When an inductive load is switched off a current path must be established until the current is sloped down to zero (all energy removed from the inductive load ). For that purpose the series combination Z DSCL is connected between Gate and Drain of the power DMOS acting as an active clamp . When the device is switched off , the voltage at OUT turns negative until V DSCL is reached. The voltage on the inductive load is the difference between VDSCL and VS.
Data Sheet
EL
LL
ER
RL
LS
RGND
Figure 5
VRev
Supply over voltage:
ZD DSCL
7.3
Energy stored in the load inductance is given by : EL= IL²*L/2 While demagnetizing the load inductance the energy dissipated by the Power-DMOS is: EAS = ES + EL – ER With an approximate solution for R L =0Ω: EAS = ½ * L * IL² * {(1- VS / (VS - VDSCL)
Special feature description 21
Rev 1.01, 2014-05-19
ITS42008-SB-D Application Information
7.4
Typical Application Waveforms
General Input Output waveforms:
Waveforms switching a resistive load:
VIN
VIN
H
H
L
L
t
VS
t
VOUT
+VS VDS
90% 70%
t
VOUT
SROFF = dV/dt 40% 30%
SRON = dV/dt 10%
0
0
t
t dON
IL
tON
t
t OFF
IL 0
0
t
IST
t
IST
ON
ON
OFF
OFF
t OFF
ON
OFF
t
ON
OFF
Waveforms switching a capacitive load:
ON
OFF
Waveforms switching an inducitive load :
V IN
VIN
H
H
L
L
t
VOUT
~ VS
0
0
t
IL
~ VS VDSCL
V OUT
t
ILSC
t
IL
0
0
t
IST
t
IST
ON
ON
OFF
OFF
t OFF
Figure 6 Data Sheet
ON
OFF
ON
t OFF
ON
OFF
ON
Typical application waveforms of the ITS42008-SB-D 22
Rev 1.01, 2014-05-19
ITS42008-SB-D Application Information
7.5
Protection Behavior
Overtemperature concept:
Overtemperature behavior: VIN
H
TjRestart ON
L
TjTrip
t
VOUT
heating up
0
OFF
TJ
cooling down
Device Status
t
TJ TjTrip
THYS
THYS Normal
Toggling
Overtemperature
t
IST
ON
OFF
t OFF
Waveforms turn on into a short circuit :
ON
OFF
ON
OFF
Waveforms short circuit during on state :
VIN
VIN
H
H L
L
t
VOUT
0
IL
ILSCP
ILSCR tm
Ipeak
0
t
IL
Controlled by the current limit circuit
0
Ipeak
0
IST
t
Controlled by the current limit circuit
ILSCR t
t SCOFF
t
VOUT
t IST
ON
ON
OFF
OFF
t OFF
Overloaded
OFF
OFF
Data Sheet
OUT shorted to GND
Shut down by overtemperature and restart by cooling (toggling )
Shut down by overtemperature and restart by cooling (toggling )
Figure 7
t Normal operation
Protective behaviour of the ITS42008-SB-D
23
Rev 1.01, 2014-05-19
ITS42008-SB-D Package outlines and footprint
8
Package outlines and footprint
Figure 8
PG-DSO-36 (Plastic Dual Small Outline Package, RoHS-Compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pbfree finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020
Data Sheet
24
Rev 1.01, 2014-05-19
ITS42008-SB-D Revision History
9
Revision History
Revision
Date
Changes
v 1.01
14-05-19
Datasheet release Editorial Change on Page 11 Temperature conditions for lines 5.0.14 and 5.0.15 were corrected to 25°C and 125°C respectively
v 1.0
12-09-01
Datasheet release
Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EconoPACK™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, POWERCODE™; PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2011-11-11
Data Sheet
25
Rev 1.01, 2014-05-19
Edition 2014-05-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2014-05-19 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.