Intel Quark Microcontroller Software Interface Board Support Package (BSP)

Intel® Quark™ Microcontroller Software Interface Board Support Package (BSP) Release Notes August 2016 Document Number: 333556-002EN Release Inform...
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Intel® Quark™ Microcontroller Software Interface Board Support Package (BSP) Release Notes August 2016

Document Number: 333556-002EN

Release Information

You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548-4725 or by visiting: http://www.intel.com/design/literature.htm Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at http://www.intel.com/ or from the OEM or retailer. No computer system can be absolutely secure. Intel, Intel Quark, and the Intel logo are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. Copyright © 2016, Intel Corporation. All rights reserved.

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 2

August 2016 Document Number: 333556-002EN

Release Information

Contents 1.0

Release Information .................................................................................................................................. 5 1.1

1.2 1.3 1.4 1.5 1.6 1.7 2.0

Build/Installation Information ..............................................................................................................12 2.1 2.2

3.0

Related Documentation ............................................................................................................................... 12 Build Instructions ............................................................................................................................................ 12 2.2.1 Build Modes.................................................................................................................................... 12 2.2.2 SoC Selection ................................................................................................................................ 12 2.2.3 SoC Targets .................................................................................................................................... 12 2.2.4 Targets .............................................................................................................................................. 13

Issue Updates ............................................................................................................................................14 3.1 3.2

4.0

Release Summary .............................................................................................................................................. 5 1.1.1 Intended Audience ......................................................................................................................... 5 1.1.2 Customer Support .......................................................................................................................... 5 1.1.3 Intel® Quark™ Microcontroller Website ................................................................................. 5 Open Source Software Declaration ........................................................................................................... 6 Terminology ......................................................................................................................................................... 6 Critical Release Documentation .................................................................................................................. 7 External Dependencies ................................................................................................................................ 10 Hardware and Software Compatibility .................................................................................................. 10 New Features .................................................................................................................................................... 10

Fixed Issues from Previous Release ....................................................................................................... 14 Known Limitations and Workarounds ................................................................................................... 14

Change Log ................................................................................................................................................17 4.1 4.2

Supported Features ....................................................................................................................................... 17 Unsupported or Unimplemented Features ......................................................................................... 18

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Intel® Quark™ Microcontroller Software Interface BSP Release Notes 3

Release Information

Revision History Date

Revision

Description

August 2016

002

Corresponds to Release 1.1.0; Gold release for Intel® Quark™ SE Microcontroller C1000 (ARC, Lakemont) and Intel® Quark™ Microcontroller D2000

February 2016

001

Corresponds to Release 1.0.1; Gold release for Intel® Quark™ SE Microcontroller C1000 (LMT) and Intel® Quark™ Microcontroller D2000

December 2015

001

Corresponds to Release 1.0.0; Gold release for Intel® Quark™ Microcontroller D2000

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 4

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Release Information

1.0

Release Information

1.1

Release Summary This Intel® release software comprises an Intel® Quark™ Microcontroller Software Interface (QMSI) Board Support Package (BSP) for two Intel® Quark™ Microcontroller Customer Reference Boards (CRBs). The Intel® Quark™ Microcontroller D2000 and Intel® Quark™ SE Microcontroller C1000 CRBs include MCU-Class microprocessors from Intel. The QMSI BSP comprises drivers for the microcontroller units, internal peripherals and sample applications. This document provides important information regarding this release. To learn more about this product, see:   

1.1.1

Features listed in Section 4.1. Online documentation at the Intel® Quark™ microcontroller website. Reference documentation listed in Section 1.4.

Intended Audience This document is intended for system and application microcontroller developers who develop for Intel® Quark™ microcontroller based systems and devices.

1.1.2

Customer Support For technical support, please contact us through our product website or your Intel® representative.

1.1.3

Intel® Quark™ Microcontroller Website Information and support regarding Intel® Quark™ microcontrollers can be found in the following website: www.intel.com/quark/mcu/

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Intel® Quark™ Microcontroller Software Interface BSP Release Notes 5

Release Information

1.2

Open Source Software Declaration Copyright (c) 2016, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of Intel Corporation nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

1.3

Terminology The following acronyms and terms are used in this document (arranged in alphabetic order): Acronym/Term

Description

ADC

Analog-to-Digital Converter

AON

Always-on

ARC

Argonaut RISC Core

CRB

Customer Reference Board

DMA

Direct Memory Access

FPR

Flash Protection Region

GDB

GNU Project Debugger

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Release Information

1.4

Acronym/Term

Description

GPIO

General Purpose Input Output

I2C

Inter-Integrated Circuit

LMT

Lakemont

MCU

Microcontroller Unit

MPR

Memory Protection Regions

OCD

On-chip debugger

PDF

Portable Document format

PIC

Programmable Interrupt Controller

PWM

Pulse Width Modulation

QMSI

Intel® Quark™ Microcontroller Software Interface

RISC

Reduced Instruction Set Computing

ROM

Read Only Memory

RTC

Real Time Clock

SCSS

System Control Subsystem

SS

Sensor Subsystem

SoC

System-on-Chip

SPI

Serial Peripheral Interface

UART

Universal Asynchronous Receiver/Transmitter

WDT

Watchdog Timer

Critical Release Documentation Component

Location

Revision

APIC Interrupt Handler

drives/apic.h

1.1.0

MVIC Interrupt Handler

drivers/mvic.h

1.1.0

Newlib SysCalls Code

sys/newlib-syscalls.c

1.1.0

ADC

drivers/qm_adc.c drivers/include/qm_adc.h examples/adc examples/adc_continuous

1.1.0

SS ADC

drivers/sensor/qm_ss_adc.c drivers/sensor/include/qm_ss_adc.h examples/sensor/adc examples/sensor/adc_continuous

1.1.0

AON Counters

drivers/qm_aon_counters.c drivers/include/qm_aon_counters.h examples/aon_counters

1.1.0

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Release Information

Component

Location

Revision

Device Manager

bootloader/dm

1.1.0

Comparator

drivers/qm_comparator.c drives/include/qm_comparator.h examples/comparators

1.1.0

DMA

drivers/qm_dma.c examples/dma

1.1.0

Flash

drivers/qm_flash.c drivers/include/qm_flash.h examples/flash_access

1.1.0

Flash Protection Regions

drivers/qm_fpr.c drivers/include/qm_fpr.h examples/fpr

1.1.0

GPIO

drivers/qm_gpio.c drivers/include/qm_gpio.h examples/gpio

1.1.0

SS GPIO

drivers/sensor/qm_ss_gpio.c drivers/sensor/include/qm_ss_gpio.h examples/sensor/gpio

1.1.0

I2C

drivers/qm_i2c.c drivers/include/qm_i2c.h examples/i2c

1.1.0

Identification

drivers/qm_identification.c drivers/include/qm_identification.h examples/identification

1.1.0

Led Blink

Examples/blinky

1.1.0

D2000 Power States

soc/quark_d2000/drivers/power_states.c soc/quark_d2000/include/power_states.h examples/quark_d2000/power

1.1.0

SE Power States

soc/quark_se/drivers/power_states.c soc/quark_se/include/power_states.h examples/quark_se/power_soc examples/quark_se/power_core examples/quark_se/power_lpss examples/sensor/power_core examples/sensor/power_lpss

1.1.0

Mailbox

drivers/qm_mailbox.c drivers/include/qm_mailbox.h examples/mailbox

1.1.0

PIC Timer

drivers/qm_pic_timer.c drivers/include/qm_pic_timer.h examples/pic_timer

1.1.0

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Release Information

Component

Location

Revision

Pin Muxing

drivers/qm_pinmux.c drivers/include/qm_pinmux.h

1.1.0

PWM / Timers

drivers/qm_pwm.c drivers/ include/qm_pwm.c examples/pwm examples/timers

1.1.0

SS Timer

drivers/sensor/qm_ss_timer.c drivers/sensor/include/qm_ss_timer.h examples/sensor/timer

1.1.0

Retention Alternating Regulator

drivers/qm_rar.c drivers/include/qm_rar.h examples/rar

1.1.0

RTC

drivers/qm_rtc.c drivers/include/qm_rtc.h examples/rtc

1.1.0

Clock Control

drivers/qm_clk.c drivers/include/qm_clk.h examples/clk_div

1.1.0

SPI

drivers/qm_spi.c drivers/include/qm_spi.h examples/spi

1.1.0

SS SPI

drivers/sensor/qm_ss_spi.c drivers/sensor/include/qm_ss_spi.h examples/sensor/spi

1.1.0

UART

drivers/qm_uart.c drivers/include/qm_uart.h examples/uart

1.1.0

WDT

drivers/qm_wdt.c drivers/include/qm_wdt.h examples/wdt

1.1.0

ROM

bootloader/boot/ soc/quark_d2000/rom soc/quark_se/rom

1.1.0

MPR

drivers/qm_mpr.c drivers/include/qm_mpr.h examples/mpr/main.c

1.1.0

BMC sensor driver Sensor examples

board/drivers/bmx1xx/bmc1xx.c board/drivers/bmx1xx/bmc1xx.h examples/accel/main.c examples/magneto/main.c examples/gyro/main.c

1.1.0

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Intel® Quark™ Microcontroller Software Interface BSP Release Notes 9

Release Information

Component

1.5

Revision

Documentation

Doc

1.1.0

Update utilities

DFU over UART

1.1.0

External Dependencies      

1.6

Location

i586-intel-elfiamcu toolchain is required to build the packages for the LMT core. arc-elf32 toolchain is required to build the packages for the ARC. OpenOCD is required to flash applications and rom files onto the SoC. GDB is optional, it is used as a supplement to OpenOCD. Intel® System Studio for Microcontrollers is optional but does include all of the above dependencies. GNU Make is required to generate packages.

Hardware and Software Compatibility This release has been validated with the following hardware:    

Intel® Quark™ Microcontroller D2000. Intel® Quark™ Microcontroller D2000 Development Platform. Intel® Quark™ SE Microcontroller C1000. Intel® Quark™ SE Microcontroller C1000 Development Platform.

This release has been validated on the following operating systems:    

1.7

Ubuntu* Linux 14.04 (64-bit). Microsoft Windows* 7. Microsoft Windows* 8.1. Microsoft Windows* 10

New Features The following items are the new features included with this release: Feature

Description

ARC Interrupts

Interrupt controller for ARC.

APIC/IO-APIC Support

Advance Programmable Interrupt Controller for Intel® Quark™ SE Microcontroller C1000.

ARC Timer

Timer driver for ARC.

ARC General Purpose Input/Output (GPIO)

GPIO driver for ARC.

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 10

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Release Information

Feature ARC SPI ARC

Description Serial Peripheral Interface (SPI) driver for ARC.

I2C

Inter-Integrated Circuit (I2C) driver for ARC.

ARC ADC

ADC driver for ARC.

DMA-UART (Lakemont)

UART DMA driver for Lakemont.

DMA-SPI (Lakemont)

SPI DMA driver for Lakemont.

DMA-I2C

I2C DMA driver for Lakemont.

(Lakemont)

AON GPIO

Always On GPIO

Intel® Quark™ SE Microcontroller Clock Control

Peripheral clock control for Intel® Quark™ SE Microcontroller C1000.

Intel® Quark™ SE Microcontroller Power States

Power states to control LMT and ARC for Intel® Quark™ SE Microcontroller C1000.

Mailbox

Inter core communications driver for Intel® Quark™ SE Microcontroller C1000.

ADC Continuous Conversion (Sample Application)

Sample application to demonstrate continuous conversion using the ADC on ARC for Intel® Quark™ SE Microcontroller C1000.

BMI 160

3-axis accelerometers.

Tinycrypt Reference App

Reference application for Tinycrypt.

Device Manager

Enable updating applications when feature is enabled.

dfu-util-qda Host Tool

Host tools needed to perform an update.

Bluetooth* Low Energy

BLE module enabled Intel® Quark™ SE Microcontroller C1000 development platform.

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Intel® Quark™ Microcontroller Software Interface BSP Release Notes 11

Build/Installation Information

2.0

Build/Installation Information

2.1

Related Documentation  

2.2

The Intel® Quark™ Microcontroller Software Interface 1.1.0 document is included as part of this release. Intel® System Studio 2016 for Microcontrollers User and Reference Guide (This is included in the Intel System Studio for Microcontrollers package).

Build Instructions The build system for the Intel® Quark™ Microcontroller Software Interface is based on the make tool. This section describes the command line interface for the BSP package.

2.2.1

Build Modes There are two different build modes when building packages in this release: debug and release. These modes are controlled by the BUILD variable; the default value is release. To build in debug mode: make BUILD=debug To build in release mode: make BUILD=release

2.2.2

SoC Selection There are two SoCs available when building packages in this release: quark_se and quark_d2000. These modes are controlled by the SOC variable, the default SoC depends on the application makefile. To build for the Intel® Quark™ SE Microcontroller C1000 SoC: make SOC=quark_se To build for the Intel® Quark™ Microcontroller D2000 SoC: make SOC=quark_d2000

2.2.3

SoC Targets When compiling applications for the Intel® Quark™ SE Microcontroller C1000 SoC, there are two separate cores available for compilation: x86 and sensor. Compiling for these targets is controlled by the TARGET variable; the default Core depends on the application makefile.

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 12

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Build/Installation Information

To build for the Lakemont core: make SOC=quark_se TARGET=x86 To build for the ARC: make SOC=quark_se TARGET=sensor

2.2.4

Targets The top level Makefile contains two targets: rom and libqmsi. The output directory is build. The ROM must be flashed on the OTP ROM flash region. To build the rom target, run: make rom When building the ROM, there are two possible build time flags available: ENABLE_DM and START_ARC. ENABLE_DM is used to enable device management inside of the rom, and START_ARC is used to start the ARC in the ROM. By default, device management mode is not enabled. To build the rom target with device management enabled, run: make rom ENABLE_DM=1 On the Intel® Quark™ SE Microcontroller C1000, there is an option to not start the ARC as part of the ROM flow. The default behavior for the Intel® Quark™ SE Microcontroller C1000 is to start the ARC as part of the ROM flow. To build the rom target without starting the ARC, run: make rom START_ARC=0 Libqmsi is a library archive of all the QMSI drivers for the SoC. To build the libqmsi target, run the following command from the top level directory: make libqmsi To build any of the provided example apps, run make inside the corresponding directory or use the –C make option from the top level directory. For example, to build the hello_world example app (by default it will be built in release mode): make -C examples/hello_world

Note: Specific examples have sensible defaults with regard to SOC and TARGETS. In the

hello_world example, the default is SOC=quark_d2000.

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Intel® Quark™ Microcontroller Software Interface BSP Release Notes 13

Issue Updates

3.0

Issue Updates

3.1

Fixed Issues from Previous Release

3.2

Reference No.

Description

Implication

Resolution

1804281036 1804303262

Intel® Quark™ SE: console continuously outputs 'CCCCC'.

Board entering device manager mode if GPIO 7 is triggered.

Use another GPIO pin other than the device manager (GPIO 7). The device manager pin is reserved.

1804294919 1804305426

Intel® Quark™ D2000: Baremetal: x86: quark_d2000 power example

On an Intel® Quark™ D2000 device management mode is triggered if the RTS line is left on pin 9 when a serial console is opened.

Do not use UART autoflow on D2000 with device management mode.

Known Limitations and Workarounds The current list of known BSP open issues and workarounds includes the following. Reference No.

Description

Implication

Workaround

1804266466

DMA errors are not generated for peripherals with invalid settings

If an invalid address is provided for a peripheral in a DMA transfer, an error callback is not triggered.

Use correct addresses for peripherals in DMA transfers.

1804299480

SPI 16 MHz transfer failing on Intel® Quark™ SE Microcontroller C1000 development platform

On the Intel® Quark™ SE Microcontroller C1000, comparison of RX and TX is not correct when using the 16 MHz speed.

Use a transfer speed slower than 16 MHz.

1804268277

I2C high speed mode fails on Intel® Quark™ SE Microcontroller C1000 development platform

On the Intel® Quark™ SE Microcontroller C1000 development platform, Fab A/B, 330Ω resistor causes I2C transfers to fail in high-speed scenarios.

Use the Intel® Quark™ SE Microcontroller C1000 development platform Fab C, which has a 33Ω resistor.

1804338548

UART - DMA transfers do not immediately report errors.

Break interrupts or FIFO If interrupts are required, overruns may not be use IRQ-based transfers caught in a DMA UART instead. transfer.

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 14

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Issue Updates

Reference No.

Description

Implication

Workaround

1804338788

If an application wakes up from power_soc_sleep() using the RTC on Intel® Quark™ D2000, and completes, the system becomes bricked.

The system is not fully restored from the soc_sleep function when using RTC as wake up source.

The function power_soc_sleep() needs to be updated with the following: Place the following line at the start of the function: uint32_t lp_clk_save = QM_SCSS_CCU>ccu_lp_clk_ctl; Place the following line at the end of the function(last line). QM_SCSS_CCU>ccu_lp_clk_ctl = lp_clk_save;

1804338790

Intel® Quark™ D2000 hangs if the UART prints during soc_deep_sleep before the system has fully restored to the active state.

If the user callback attempts to send data over the UART during a soc_deep_sleep callback when the system is still transitioning to the active state, the system will hang on wake.

Avoid printing over the UART during user callbacks until after the SoC has fully resumed operations in the active state.

1804339585

Grove shield electricity sensor does not compile for x86 on Intel® Quark™ SE C1000.

Building the example application for x86 on the Intel® Quark™ SE Microcontroller C1000 will result in a compilation error.

Compile the example on an Intel® Quark™ SE Microcontroller C1000 ARC.

Sample App: Power_soc

Comments say:

Incorrect header number in comment

Should be J14 not J13

Sample App: Gpio

Comments say: On Quark SE development board, PIN_OUT and PIN_INTR are located on header P4 PIN 42 and 40 Comments say: On the Quark SE development

Incorrect header number in comment

Should be J15 not P4

Incorrect pin number in comment

Should be pin 40 not 42

Sample App: sensor/gpio

“On the Quark SE development platform this pin is found on header J13 PIN 20”.

August 2016 Document Number: 333556-002EN

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 15

Issue Updates

Reference No.

Description

Implication

Workaround

Incorrect pin number in comment

Should be pin 40 not 42

platform, PIN_OUT (J15 header, PIN 36) and PIN_INTR (J15 header, PIN 42). Comments say: Sample App: sensor/interrupt On the Quark SE development platform, PIN_OUT and PIN_INTR are located on header J15, PIN 36 and 42 respectively

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 16

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Change Log

4.0

Change Log

4.1

Supported Features                                        

ADC Continuous Conversion (Sample Application) Always-On (AON) Counters Always-On (AON) Periodic Timer Analog Comparators Analog-to-Digital Converter (ADC) AON GPIO APIC/IO-APIC Support ARC ADC ARC General Purpose Input / Output (GPIO) ARC Interrupts ARC I2C ARC ROM ARC SPI ARC Timer ATP Clock Control ATP Power States BMI 160 Bluetooth Low Energy Clock Control Device Manager Direct Memory Access (DMA) DMA I2C (Lakemont) DMA SPI (Lakemont) DMA UART (Lakemont) Continuous mode ADC conversions Firmware Update over UART (without authentication) Flash library Flash Protection Regions (FPR) General Purpose Input Output (GPIO) Inter-Integrated Circuit (I2C) master Interrupt Controller Timer Interrupt Controller Mailbox (Intel® Quark™ SE Microcontroller C1000 only) Memory Protection Regions (MPR) Oscillator Trim Codes Pin Muxing Power states Pulse Width Modulation (PWM)/Timers Real-Time Clock (RTC) Retention Alternating Regulator (RAR)

August 2016 Document Number: 333556-002EN

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 17

Change Log

         

4.2

Serial Peripheral Interface (SPI) master Sensor Subsystem (SS) Inter-Integrated Circuit (I2C) master Sensor Subsystem (SS) General Purpose Input Output (GPIO) Sensor Subsystem (SS) Timer Sensor Subsystem (SS) Serial Peripheral Interface (SPI) System on Chip (SoC) Identification Tinycrypt Reference App Universal Asynchronous Receiver/Transmitter (UART) Update utilities Watchdog Timer (WDT)

Unsupported or Unimplemented Features   

Serial Peripheral Interface (SPI) slave Inter-Integrated Circuit (I2C) slave SoCWatch

Intel® Quark™ Microcontroller Software Interface BSP Release Notes 18

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