MIPS Registers




Name

Register #

Usage

$zero

0

The constant value 0

$at

1

Used by assembler

$vo-$v1

2-3

Values for results and expression evaluation

$a0-$a3

4-7

Arguments

$t0-$t7

8-15

Temporaries

$s0-$s7

16-23

Saved

$t8-$t9

24-25

More temporaries

$gp

28

Global pointer

$sp

29

Stack pointer

$fp

30

Frame pointer

$ra

31

Return pointer

Instruction Formats




R-format opcode 31

26 25

opcode 31

26 25

opcode 31

rs

26 25

rt 21 20

rd 16 15

shamt 11 10

funct

65

0

I-format rt 16-bit Immediate

rs 21 20

16 15

0

J-format 26-bit Immediate 0




MIPS Pipeline Stages R-Type

BEQ

IR ← Mem[PC] PC ← PC + 4

Stage 2: ID/RR

Read Reg[rs] and Reg[rt] RS op RT

Stage 4: DM Stage 5: RW/WB




ST

Stage 1: IF

Stage 3: EX (use ALU)




LD

Write to Rd

Calculate RS+Immd

Calculate RS+Immd

Calculate PC + Immd Compare RS and RT

Read memory

Write memory

Set PC according to Z

Write to Rt

ALU Operation (ALUOp3:ALUOp0) 0000 and 0001 or 0010 add 0110 sub 0111 set-on-less-than 1100 nor

MIPS Lite – memory-reference instructions: lw, sw – arithmetic-logical instructions: add, sub, and, or, slt, nor – control flow instructions: beq, j

J

Set PC to Immd

0 M u x Add Add

1

Shift left 2

RegDst 4

ALU result

PCSrc

Branc h MemRead MemtoReg

Instruction [31 26] Control

ALUOp MemWrite ALUSrc RegWrite

Instruction [25 21] PC

Read register 1

Read address Instruction [20 16] Instruction [31– 0] Instruction memory

0

Instruction [15 11]

M u x 1

Read data 1

Read register 2 Registers Read Write data 2 register

Zero 0 M u x 1

Write data

ALU ALU result

Address

Data memory Write data

Single Cycle Datapath

Instruction [15 0]

16

32 Sign extend

Instruction [5 0]

ALU control

Read data

1 M u x 0

PCWriteCond

PCSource

PCWrite ALUOp IorD Outputs ALUSrcB MemRead ALUSrcA MemWrite Control RegWrite MemtoReg Op IRWrite [5–0] RegDst 0 M

26

Instruction[25–0]

Multicycle Datapath and Control

PC

0 M u x 1

Shift left 2

Instruction [31-26] Address Memory MemData Write data

Instruction [25–21]

Read register 1

Instruction [20–16]

Read Read register 2 data1 Registers Write Read register data2

Instruction [15–0] Instruction register Instruction [15–0] Memory data register

0 M Instruction u [15–11] x 1

B 4

Write data

0 M u x 1 16

Sign extend

32

Instruction[5–0]

Shift left 2

Zero ALU ALU result

0 1M u 2x 3

ALU control

1u x 2

PC[31-28]

0 M u x 1

A

28

Jump address [31-0]

ALUOut

PCSrc

ID/E X

0 M u x

WB

EX/ME M

1 Control

IF/ID

M

WB

EX

M

MEM/ WB

WB

Add

Add

Pipelined Datapath with Control

Instruction memory

Br anch

Shift left 2 A LU Src

R ead register 1

Read data 1 R ead reg ister 2 R egisters Read Write data 2 register

M e m toR eg

A ddress

Add result

M e m W ri t e

PC

In s t ruc t io n

R e gW rit e

4

Zero ALU 0 M u x

Write dat a

A LU result

Read data

Address D ata memory

1

32

6 A LU c ontr ol

Sign extend

Instruction [20– 16] 0 Instruction [15– 11]

ALUOp

M u x 1 RegDst

M u x 0

Write d ata Instructi on 16 [15– 0]

1

MemRead

I D/ E X

WB E X/ ME M

C ont rol

WB

M

M EM /WB

M

EX

IF /I D

WB

Instruc tion

u x R eg isters D at a ALU me m ory

m em ory

M u x

M u x

IF/ID .R egis terRs

Rs

IF/ID.R egis terR t

Rt

IF/ID.R egis te rR t

Rt

IF/ID.R egis terR d

Rd

EX /ME M .R e gist e rRd

M

Forwarding Circuit

PC

In s t r u c t io n

M

u x F orw ar ding unit

M EM/WB .R eg iste rR d

YH16 Format I:

YH16 Format II:

15 10 opcode

9

15 10 opcode

9

5 4 rs

0 rt

5 4 rs

0 rt

Immd

YH16 Arithmetic Instructions (OPCODE=00xxxx) opcode name

format

meaning

000000

add

I

rs ← rs + rt

000001

and

I

rs ← rs AND rt

000010

or

I

rs ← rs OR rt

000011

xor

I

rs ← rs XOR rt

001000

sub

I

rs ← rs − rt

001100

slt

I

rs ← 1 if rs