High Frequency Voltage Controlled Ring Oscillators in Standard CMOS

Yalcin Alper Eken PhD Candidate in School of ECE GaTech July 7th , 2003 1

Agenda § Integrated VCO types § Ring oscillator theory § Important characteristics of ring oscillators § Frequency § Noise § High frequency low noise ring oscillators § Prototype Chip § Performance Comparison § Applications/Summary/Conclusions 2

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Integrated VCO Types § LC Oscillator § Ring Oscillator

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VCO Types : LC § High Q resonant element

LC Oscillator Resonator

§ Expensive to implement § Require more die area § Reduce integration density § Extra steps

§ Secondary effects § Eddy currents § Magnetic coupling Amplifier 4

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VCO Types : Ring Ring Oscillator

§ Less expensive to implement § Wider tuning range § Multiple output phases § Low Q 5

Ring Oscillator Theory

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Ring Oscillator Operation in Time Domain

X1

X2

At t = t 1 Vinitial

X3

At t = t 1+Td Vdd

Gnd

Vinitial

At t = t 1+3Td Vdd

At t = t 1+2Td Vinitial

Gnd

Gnd

§ Odd number of inversions § T = 6*Td or 2N*Td for N stage § fosc = 1/(6*Td) or 1/(2N*Td) for N stage 7

S-domain Analysis : Ring Oscillator X(s)

Amplifier A(s)

Y(s)

Frequency Selective Network

α (s)

L(s) = A1(s)A2(s)...A N(s) = A N (s) assuming that A1(s) = A2(s) = ... = AN (s) Barkhausen Criterion : 2 kπ N and A( jω0 ) = 1 N at the oscillation frequency ∠A( jω0 ) = θ =

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Ring Oscillator Linear Model φ =0

φ =π +θ

φ = 2π + 2θ

 − gm R  Stage transfer function A ( j ω) =   1 + RCjω 

tan θ RC For 3 - stage ω0 = 3 RC For 4 - stage ω0 = 1 RC Frequency : ω 0 =

θ=

φ = N (π + θ ) π = N (π + ) N =0

π N

for odd # of stages

Gain requirement : g m R ≥ For 3 - stage g m R ≥ 2

1 cosθ

For 4 - stage gm R ≥ 2 9

Differential Ring Oscillators

+ A1 - +

+ A2 - +

+ A3 - +

+ A4 - +

§ Better immunity to commonmode disturbance § 50% duty cycle § Improved spectral purity § Even/Odd number of stages

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Important Characteristics of Ring VCOs § Frequency

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Frequency Tuning - I Load Control -I

Drive Strength Control

Current Control

Load Control - II

Td = f osc

C LVswing I control I control = 2 NCLVswing 12

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Frequency Tuning - II Feedback Control

Coupling Control

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Frequency Increase : Multipliers

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Frequency Increase : Subfeedback Loops1

Implementation with N = 5, i = 2

5-Stage Main-Loop X1

X2

X3

X4

X5

3-Stage Subfeedback Loop

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L. Sun, T. Kwasniewski, and K. Iniewski, “A Quadrature Output Voltage Controlled Ring Oscillator Based on Three-Stage

Subfeedback Loops,” Proc. Int. Symp. Circuits and Systems, Orlando, FL, 1999, vol. 2, pp. 176 -179.

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Important Characteristics of Ring VCOs § Noise

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Phase Noise : Leeson’s Model

Single Sideband Oscillator Phase Noise in Leeson’s Model

Q of LC Oscillators

2 FkT L{∆ ω} = PS

 ω0     2Q∆ ω 

2

Q ≤ 10 (standard CMOS)

Q of a ring oscillator?

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Ring Oscillator Q : Razavi ω  dA   dφ  Q= 0   +  2  dω   dω  2

Q of a ring oscillator

Modified Leeson’s equation

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2 NFkT  ω0    L{∆ω} = PS  2Q∆ω 

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3 - stage Q : 3 3 4 ≅ 1.3 4 - stage Q : 2 ≅ 1. 4 18

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Phase Noise : Harjani Application of Harjani's Equation

Swing (V)

Sine Curvefit Output Signal

Vdd 0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

Vpp Time (nsec)

 64 FkTR ω0 2  9V 2 ( ∆ω )  pp L{∆ω} =   512 FkTRVdd ( ω 0 ) 2 3  27 πV pp ∆ω 

8 * Vdd    for V pp >  3π  

V pp =

2SRMAX ω0

Equation from : L. Dai, and R. Harjani, “Design of Low-Phase-Noise CMOS Ring-Oscillators,” IEEE Trans. Circuits Sys. II, vol. 49,

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pp. 328 -338, May 2002.

Ring Oscillator Q : Harjani Q of a 3-stage ring oscillator

Qeff =

9 π dv / dt max 8 ω0Vdd

3 .63 in TSMC 0.18um  Qeff (3 - stage rings, at 900 MHz) = 3 .02 in TSMC 0.25um  2.51 in TSMC 0.35um 

§ Clipped Signals § Sharper transition § Full-switching

Better NOISE performance!! 20

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Ring Oscillator Gain Stages Analog Gain Stage

Saturated Gain Stage

§ Stage gain dependence for switching § Inferior noise performance

§ Latching characteristics speed-up signal transitions § Good noise characteristics

§ Continuous conduction

§ Full Switching

§ Cascaded connections

§ Rail-to-rail outputs 21

High Frequency Low Noise Ring Oscillators

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Multiple-Pass Loop Architecture 3-Stage 1

§ Auxiliary loops nested inside main-loop § Frequency Improvement §Effective stage delay reduced

§ Noise Improvement General

§ Slew Rate increase

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Saturated Gain Stage with Regenerative Elements § Used in our designs § Frequency control by varying latch strength § Two sets of inputs for multiple-pass architecture § Tuning range control by varying sizes of M3 and M4.

Delay Stage : C.H. Park, and B. Kim, “A Low-Noise, 900-MHz VCO in 0.6-µ m CMOS,” IEEE J. Solid State Circuits, vol. 34, pp. 586 -591, May 1999.

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Multiple-Pass Ring Oscillator with Saturated Gain Stage – Frequency/Noise Performance Number of Stages 3 4 3 4 4 5 3

Technology, CMOS 0.25 um 0.25 um 0.18 um 0.18 um 0.18 um 0.18 um 0.13 um

Frequency Range (GHz) 4.15-5.30 2.50-3.68 8.10-9.50 5.56-6.66 4.11-6.53 8.75-14.4

Phase Noise at 1 MHz (-dBc/Hz) -105.2 (5.07 GHz) -110.28 (3.42 GHz) -99.2 (9.05GHz) -104.66 (6.35 GHz) -104.21 (5.29 GHz) -113.46 (4.33 GHz) -90.49 (10.97 GHz)

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Prototype Chip § 0.18 µm TSMC CMOS § 1.8 V main supply § Parts § 9-stage ring oscillator § 3-stage ring oscillator § Integrated LC oscillator § Charge-pump circuits § PFD networks

§ MOSIS SCMOS rules for ring oscillators : 0.20 µm minimum drawn channel length 26

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Three-Stage Multiple-Pass Ring Oscillator

Simulations

Measurements

§ Simulations : 5.18-6.11 GHz § Measurements : 5.16-5.93 GHz § Linear characteristics § Possible operation up to 7.7 GHz 27

Nine-Stage Multiple-Pass Ring Oscillator

§ Simulations : 1.16-1.93 GHz § Measurements : 1.10-1.86 GHz § Linear characteristics 28

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Phase Noise Simulations

§ Spectre RF § Models with thermal noise, no 1/f noise § 3-stage : -99.5 dBc/Hz (foff = 1 MHz, f0 = 5.79 GHz) § 9-stage : -112.8 dBc/Hz (foff = 1 MHz, f0 = 1.82 GHz) 29

Phase Noise Measurements Power Spectrum at 1:2 Output of 9-Stage Ring

§ Spectrum analyzer § 9-Stage ring oscillator : § -105.5 dBc/Hz phase noise at (1MHz offset, 1.8 GHz center) L{∆ ω} = SBmeas − 10 log( RBW ) − 20 log( ∆ω / ∆ωmeas ) + 20 log( ω0 / ω meas )

§ Larger result due to powersupply/ground noise + 1/f noise § Low frequency noise

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Performance Comparison

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Frequency Performance Comparison

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Phase Noise Performance Comparison

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Applications Possible Applications § CPU, DSP, DRAM clock generation § System synchronization (deskewing ) : Zero delay clock buffers § Oversampling A/D converters § Wired transceivers

Need LC Oscillators §Wired transceivers § SONET, STS-768 2

§ Wireless transceivers

§ Gigabit Ethernet § 10 Gigabit Ethernet (IEEE 802.3ae) § SONET, STS-192 1 , STS-96, STS-48, STS-36, STS-24, STS-18,…

§ Bluetooth3 (power) § HomeRF4 (power) § Wireless LAN (IEEE 802.11a)5 § HiperLAN § GSM6 § DECT7

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[Mukherjee at al., 2002] : at 10 GHz, -90 dBc/Hz at a 1 MHz offset is required for a loop bandwidth of 10 MHz. 2

~40 GHz operation frequency required (for serial transmission)

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at 2.44 GHz, -119 dBc/Hz is required at 3 MHz offset

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at 2.404-2.478 GHz, -77 dBc/Hz is required at 3 MHz offset

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at 5.15 -5.35 GHz, -110 dBc/Hz is required at a 1 MHz offset

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at 0.9/1.8 GHz, -138/-145 dBc/Hz is required at 3 MHz offset

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at 2.4 GHz, -134 dBc/Hz is required at 5.128 MHz offset

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Summary and Conclusions § Ring oscillator analysis (time, s-domain) § How to improve characteristics of ring oscillators § Multiple-pass architecture with latching saturated stages for high frequency, low-noise in CMOS § Estimations : § Up to 9.5 GHz in 0.18 µm CMOS, -99.2 dBc/Hz Phase Noise § Up to 14 GHz in 0.13 µm CMOS, -90.5 dBc/Hz Phase Noise

§ Suggestion of practical applications § Results suggest that it is not always necessary to resort to integrated LC networks for high-frequency low-noise VCO/CCO modules 35

Questions

? 36

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