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experiments with recorded text as a cornmunication media," 1964 Fall Joint Computer Conf., AFIPS Proc., vol. 27, pt. 1. Washington, D. C.: Spartan, 1965, pp. 399-411. D. C. Engelbart and W. K. English, "A research center for augmenting human intellect," 1968 Fall Joint Computer Conf., AFIPS Proc., vol. 33, pt. 1. Washington, D. C.: Thompson, 1968, pp. 395-410. T. H. Kehl and C. Moss, "Systems programming on-line," Computers and Biomed. Res., vol. 1, pp. 550-555, June 1968. H. Bratman, H. G. Martin, and E. C. Perstein, "Program composition and editing with an on-line display," 1968 Fall Joint Computer Conf., AFIPS Proc., vol. 33, pt. 2. Washington, D. C.: Thompson, 1968, pp. 1349-1360. B. Tolliver, "TVEDIT," Stanford University, Palo Alto, Calif., Stanford Time-Sharing Memo. 32, March 1965. J. McCarthy, D. Brian, G. Feldman, and J. Allen, "THOR-A display based time sharing system," 1967 Spring Joint Computer Conf., AFIPS Proc., vol. 30. Washington, D. C.: Thompson, 1967, pp. 623-633. M. A. Wilkes, LAP3 Users' Manual, Massachusetts Institute of Technology, Cambridge, Mass., Center Development Office Rept., August 1963. , "LAP5: LINC assembly program," Proc. DECUS Spring

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Symp. Maynard, Mass.: Digital Equipment Corp., 1966, pp. 43-50. W. A. Clark and C. E. Molnar, "A description of the LINC," in Computers in Biomedical Research, vol. 2, R. W. Stacy and B. Waxman, Eds. New York: Academic Press, 1965, pp. 35-66. R. L. Best and T. C. Stockebrand, "A computer-integrated rapidaccess magnetic tape system with fixed address," 1958 Proc. Western Joint Computer Conf. New York: American Institute of Electrical Engineers, 1959, pp. 42-46. T. Kilburn, R. B. Payne, and D. J. Howarth, "The Atlas supervisor," in Computers: A Key to Total Systems Control, 1961 Eastern Joint Computer Conf., AFIPS Proc., vol. 20. New York: Macmillan, 1961, pp. 279-294. M. A. Wilkes, "Conversational access to a 2048-word machine," Comm. ACM, vol. 13, pp. 407-414, July 1970. , LAP6 Handbook, Computer Research Laboratory, Washington University, St. Louis, Mo., Tech. Rept. 2, May 1967. , LAP6 Use of the Stucki-Ornstein Text Editing Algorithm, Computer Systems Laboratory, Washington University, St. Louis, Mo., Tech. Rept. 18, February 1970. , LAP6 Manuscript Listings, Computer Systems Laboratory, Washington University, St. Louis, Mo., May 1967.

Pipeline Fast Fourier Transform

HERBERT L. GROGINSKY,

SENIOR MEMBER, IEEE, AND

Abstract-This paper describes a novel structure for a hardwired fast Fourier transform (FFT) signal processor that promises to permit digital spectrum analysis to achieve throughput rates consistent with extremely wide-band radars. The technique is based on the use of serial storage for data and intermediate results and multiple arithmetic units each of which carries out a sparse Fourier transform. Details of the system are described for data sample sizes that are binary multiples, but the technique is applicable to any composite number. Index Terms-Cascade Fourier transform, digital signal processor, Doppler radar, fast Fourier transform, radar-sonar signal processor, radix-two fast Fourier transform, real-time signal processor.

INTRODUCTION

HIS paper describes a novel structure for a hardwired FFT signal processor that promises to permit digital spectrum analysis to achieve throughput rates consistent with extremely wide-band radars. The processor consists of a number ofmodular units connected in cascade through switches that direct the flow of information from memory to arithmetic units. The switching required to carry out the process is simple and is controlled by a binary counter. The processor is similar to the binary analyzer described by Bergland and Hale [1], but

r

Manuscript received November 7, 1969; revised April 27, 1970. This work was supported by Raytheon research and development funding. A patent has been filed on the basic structure of this signal processor. This paper was presented at EASCON'69 (Electronics and Aerospace Systems Convention), Washington, D. C., October 27-29, 1969. The authors are with the Raytheon Company, Sudbury, Mass.

GEORGE A. WORKS

employs only N complex words of storage to compute the FFT of N complex data samples.' Bergland [2] has listed many alternative organizations of FFT processors. Recently O'Leary [10] has also proposed a similar structure. We show that the Cooley-Tukey algorithm does a natural interleaving of data gathered by the time multiplexing of a number of independent channels, typical of radars and sonars. In this concept, the successive stages or iterations of the fundamental algorithm are each carried out in the separate cascaded modules. Using shift registers as digital delay lines permits new data to be entered into the processor while the processing of earlier data blocks is carried out. In effect the overall delay required is equal to the time required to gather the analysis sample block N in each of the separate channels. As the Nth complex data sample is loaded into the digital delay line, the first analysis frequency appears at the output. The output appears in precisely the same channel sequence as the data when they were loaded into the delay line. The output frequencies, however, appear in the scrambled sequence associated with the algorithm. The control device, namely the binary counter, yields a digital number identifying both the channel number and the frequency currently being outputted. In addition, it specifies the instants at which the separate modules are to be Although the processor described here is cascade in structure, we prefer the pipeline designation used by computer designers [11 ] because this structure permits direct application of pipeline arithmetic techniques.

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switched and a digital number identifying the sine/cosine and th ,e ranges values needed by each of the stages. This structure, although < v < Cm 1 < m < Ml 0