General Commands Reference Guide C TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Documents ......................................................................................................................
General Commands ......................................................................................................................
General Commands Reference Guide C ..................................................................................
1
CACHE ......................................................................................................................................
8
CACHE
View and modify CPU cache contents
CACHE.CLEAN CACHE.ComPare CACHE.DUMP CACHE.FLUSH CACHE.GET
8
Clean CACHE
8
Compare CACHE with memory
9
Dump CACHE
10
Clean and invalidate CACHE
12
Get CACHE contents
12
View all information related to an address
13
Invalidate CACHE
13
CACHE.List
List CACHE contents
14
CACHE.ListFunc
List cached functions
15
tbd.
16
List cached variables
17
Reload CACHE
18
Display CACHE control register
18
CAnalyzer .................................................................................................................................
19
CACHE.INFO CACHE.INVALIDATE
CACHE.ListLine CACHE.ListVar CACHE.RELOAD CACHE.view
CombiProbe-specific Trace Commands
19
CAnalyzer.DecodeMode
Define how to decode the received trace data
19
CAnalyzer.PipeWRITE
Define a named pipe as trace sink
20
CAnalyzer.TraceCLOCK
Configure the trace port frequency
20
Define a file as trace sink
21
CAnalyzer.WRITE Generic Trace Commands
22
CAnalyzer.ACCESS
Define access path to source code for trace decoding
22
Arm the trace
22
Arm automatically
22
Calibrate AUTOFOCUS preprocessor
22
CAnalyzer.Arm CAnalyzer.AutoArm CAnalyzer.AutoFocus CAnalyzer.AutoInit
Automatic initialization
22
Set a bookmark in trace listing
22
Display trace contents graphically
22
Clock to calculate time out of cycle count information
23
Compare trace contents
23
CAnalyzer.BookMark CAnalyzer.Chart CAnalyzer.CLOCK CAnalyzer.ComPare ©1989-2016 Lauterbach GmbH
General Commands Reference Guide C
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CAnalyzer.DISable CAnalyzer.DRAW
Disable the trace
23
Visualization of trace data
23
Export trace data for processing in other applications
23
CAnalyzer.FILE
Load a file into the file trace buffer
23
CAnalyzer.Find
Find specified entry in trace
23
CAnalyzer.FindAll
Find all specified entries in trace
23
CAnalyzer.FindChange
Search for changes in trace flow
24
Display input level
24
Move cursor to specified trace record
24
CAnalyzer.EXPORT
CAnalyzer.Get CAnalyzer.GOTO CAnalyzer.Init
Initialize trace
24
CAnalyzer.List
List trace contents
24
Analyze function nesting
24
List variable recorded to trace
24
CAnalyzer.ListNesting CAnalyzer.ListVar CAnalyzer.LOAD
Load trace file for off-line processing
24
CAnalyzer.Mode
Set the trace operation mode
25
Switch off
25
Define a user supplied DLL as trace sink
25
CAnalyzer.OFF CAnalyzer.PipePROTO CAnalyzer.PortFilter
Specify utilization of trace memory
25
CAnalyzer.PortType
Specify trace interface
25
Profile charts
25
Statistical analysis in a table versus time
25
CAnalyzer.PROfileChart CAnalyzer.PROfileSTATistic CAnalyzer.PROTOcol
Protocol analysis
26
Set reference point
26
CAnalyzer.RESet
Reset command
26
CAnalyzer.SAVE
Save trace for postprocessing in TRACE32
26
CAnalyzer.REF
CAnalyzer.SelfArm
Automatic restart of trace recording
26
Define buffer size
26
Restart trace capturing once
26
CAnalyzer.SPY
Enable analysis of streaming file while recording
26
CAnalyzer.state
Display trace configuration window
27
Statistic analysis
27
Select compression mode for streaming
27
Specify temporary streaming file path
27
CAnalyzer.SIZE CAnalyzer.SnapShot
CAnalyzer.STATistic CAnalyzer.STREAMCompression CAnalyzer.STREAMFILE CAnalyzer.STREAMFileLimit
Set size limit for streaming file
27
CAnalyzer.STREAMLOAD
Load streaming file from disk
27
CAnalyzer.STREAMSAVE
Save streaming file to disk
27
Trigger delay
28
CAnalyzer.TDelay CAnalyzer.THreshold
Optimize threshold for trace lines
28
Route trigger to PODBUS (CombiProbe)
28
Set tracking record
28
CAnalyzer.TSELect
Select trigger source
28
CAnalyzer.View
Display single record
28
tbd.
28
CAnalyzer.TOut CAnalyzer.TRACK
CAnalyzer.ZERO ©1989-2016 Lauterbach GmbH
General Commands Reference Guide C
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CIProbe .....................................................................................................................................
29
ClipStore ..................................................................................................................................
30
ClipSTOre
Store a setting to clipboard
30
CLOCK ......................................................................................................................................
31
CLOCK
Display date and time
31
Set backup clock frequency
31
Alias for DATE command
32
CLOCK.OFF
Disable clock frequency computation
32
CLOCK.ON
Enable clock frequency computation
32
Set board oscillator frequency
33
Display PLL related registers
33
Reset CLOCK command group settings
33
Display clock frequencies
34
Set 'VCOBase' clock frequency
34
Set 'FlexRay VCOBase' clock frequency
35
CORE ........................................................................................................................................
36
CLOCK.BACKUP CLOCK.DATE
CLOCK.OSCillator CLOCK.Register CLOCK.RESet CLOCK.state CLOCK.VCOBase CLOCK.VCOBaseERAY
CORE
Cores in an SMP system
Overview
36 36
CORE.ADD
Add core/thread to the SMP system
38
CORE.ASSIGN
Assign a set of physical cores/threads to the SMP system
38
CORE.NUMber
Assign a number of cores/threads to the SMP system
44
CORE.ReMove
Remove core from the SMP system
45
Switch the debugger view to the specified core
45
Show active/inactive cores in an SMP system
46
Count ........................................................................................................................................
48
CORE.select CORE.SHOWACTIVE
Count
tbd.
Counter of TRACE32-ICE
48 48
Level Display
49
Glitch Detection
49
Display Window
50
Counter of TRACE32-ICD
51
Counter of TRACE32-FIRE
52
Level Display
53
Counter Functions
53
Count.AutoInit
Automatic counter reset
54
Count.Enable
Counter control
54
Gate time
56
Count.Gate Count.GLitch
Glitch detector
56
Count.GO
Start measurement
58
Count.Init
Reset counter
58
Mode selection
59
Forward counter input signal to trigger system/output
61
Count.Mode Count.OUT
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Count.PROfile
Graphic counter display
61
Count.RESet
Reset command
63
Count.Select
Select input source
64
State display
67
COVerage .................................................................................................................................
68
Count.state
COVerage COVerage.ACCESS
68
Set the memory access mode
73
Add trace contents to database
74
Modify coverage
74
Export code coverage information to an XML file
75
COVerage.ADD COVerage.Delete COVerage.EXPORT
Trace-based code coverage
COVerage.EXPORT.CBA COVerage.EXPORT.ListFunc COVerage.EXPORT.ListGroup COVerage.EXPORT.ListLine COVerage.EXPORT.ListModule
Export HLL lines in CBA format
75
Export the HLL functions
76
Export the groups
79
Export the HLL lines
79
Export the modules
80
COVerage.EXPORT.ListVar
Export the HLL variables
80
COVerage.Init
Clear coverage database
81
COVerage.List
Coverage display
81
Display coverage for HLL functions
82
Display coverage for groups
85
Display coverage for HLL lines
86
Display coverage for modules
87
COVerage.ListFunc COVerage.ListGroup COVerage.ListLine COVerage.ListModule COVerage.ListVar
Display coverage for variable
88
Load coverage database from file
89
Map the coverage to a different range
89
Select different configuration options
91
COVerage.LOAD COVerage.MAP COVerage.METHOD COVerage.Mode
Activate code coverage for virtual targets
93
Deactivate coverage
94
Activate coverage
94
Set coverage options
95
COVerage.OFF COVerage.ON COVerage.Option COVerage.Option.EXLiteralPools
Ignore literal pools for coverage
95
Skip the generation of static flow information
95
COVerage.RESet
Clear coverage database
96
COVerage.SAVE
Save coverage database to file
96
Coverage modification
96
Configure coverage
97
Generate static program flow information
98
Prepare a tree with code coverage symbols
99
CTS ...........................................................................................................................................
100
COVerage.Option.NoStaticInfo
COVerage.Set COVerage.state COVerage.StaticInfo COVerage.TreeWalkSETUP
CTS
Context tracking system (CTS)
100
Trace-based Debugging
101
Full HLL Trace Display
102
Reconstruction of Trace Gaps (TRACE32-ICD)
102
©1989-2016 Lauterbach GmbH
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CTS.CACHE CTS.CACHE.Allocation CTS.CACHE.Chart
CTS cache analysis
103
Define the cache allocation technique
104
Graphical display of cache analysis
105
Display Cache Hit/Cache Miss/Cache Victim Rate for the Individual Cache
107
Display the Number of Stalls
109
Display the Bus Utilization for the Individual Busses CTS.CACHE.CYcles
110
Define counting method for cache analysis
110
Define bus interface
111
Define architecture for L1 cache
112
CTS.CACHE.ListAddress
Address based cache analysis
113
CTS.CACHE.ListFunc
Function based cache analysis
114
CTS.CACHE.ListLine
HLL line based cache analysis
115
Module based cache analysis
115
CTS.CACHE.DefineBus CTS.CACHE.L1Architecture
CTS.CACHE.ListModules CTS.CACHE.ListRequests
Display request for a single cache line
116
CTS.CACHE.ListSet
Cache set based cache analysis
117
CTS.CACHE.ListVar
Variable based cache analysis
117
Define MMU architecture for cache control
118
Define memory coherency strategy
119
Define the replacement strategy
120
CTS.CACHE.RESet
Reset settings of CTS cache window
121
CTS.CACHE.SETS
Define the number of cache sets
121
CTS.CACHE.MMUArchitecture CTS.CACHE.Mode CTS.CACHE.Replacement
CTS.CACHE.Sort
Define sorting for all list commands
121
CTS.CACHE.state
Display settings of CTS cache analysis
122
CTS.CACHE.Tags
Define address mode for cache lines
123
Define architecture for the TLB
124
CTS.CACHE.TLBArchitecture CTS.CACHE.View
Display the results for the cache analysis
125
CTS.CACHE.ViewBPU
Display statistic for branch prediction unit
129
Display statistics for the bus utilization
130
Display statistics for idles/stalls
131
Define number of cache ways
132
Define width of cache line
133
Copy real memory to the virtual memory for CTS
133
Select the specified record for CTS (absolute)
133
CTS.CACHE.ViewBus CTS.CACHE.ViewStalls CTS.CACHE.WAYS CTS.CACHE.Width CTS.CAPTURE CTS.GOTO CTS.INCremental
CTS displays intermediate results while processing
134
CTS.Init
Restart CTS processing
134
CTS.List
List trace contents
135
Operation mode
137
CTS.Mode CTS.OFF
Switch off trace-based debugging
137
CTS.ON
Switch on trace-based debugging
138
CTS.PROCESS
Process cache analysis
138
CTS.RESet
Reset the CTS settings
138
CTS.SELectiveTrace CTS.SKIP
Trace contains selective trace information
139
Select the specified record for CTS (relative)
139
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CTS.state
Display CTS settings
140
CTS.TAKEOVER
Take memory/registers reconstructed by CTS over to target
141
CTS.UseCACHE
Cache analysis for CTS
142
Use constants for the CTS processing
143
Use memory contents for CTS
144
CTS.UseConst CTS.UseMemory CTS.UseReadCycle
Use read cycles for CTS
145
Use the CPU registers for CTS
145
CTS.UseSIM
Use instruction set simulator for CTS
146
CTS.UseVM
Use the virtual memory contents as initial values for CTS
147
Use write cycles for CTS
148
CTS.UseRegister
CTS.UseWriteCycle
Usage: (B) command only available for ICD (E) command only available for ICE (F) command only available for FIRE
©1989-2016 Lauterbach GmbH
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General Commands Reference Guide C Version 26-Oct-2016 15-Feb-16
Added description for COVerage.TreeWalkSETUP.
11-Nov-15
Replaced the term “virtual address” with the term “logical address”. See also “Logical Address” in glossary.pdf.
©1989-2016 Lauterbach GmbH
General Commands Reference Guide C
7
CACHE
CACHE
View and modify CPU cache contents
See also ■ ■ ■ ■
CACHE.CLEAN CACHE.GET CACHE.ListFunc CACHE.view
■ ■ ■ ❏
■ ■ ■ ❏
CACHE.ComPare CACHE.INFO CACHE.ListLine CACHE.DC.DIRTY()
CACHE.DUMP CACHE.INVALIDATE CACHE.ListVar CACHE.DC.LRU()
■ ■ ■ ❏
CACHE.FLUSH CACHE.List CACHE.RELOAD CACHE.DC.VALID()
▲ ’CACHE Functions’ in ’General Functions’
CACHE.CLEAN
Clean CACHE
Format:
CACHE.CLEAN
:
IC | DC | L2
Writes back modified (dirty) lines to the next cache level or memory. Only the specified cache is affected. In case the operation is not supported by the CPU, the result will be a “function not implemented” error message.
See also ■ CACHE
■ CACHE.view
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CACHE
CACHE.ComPare
Compare CACHE with memory
Format:
CACHE.ComPare
:
IC | DC | L2
Compares CACHE contents with memory contents. CACHE.ComPare DC
; compare contents of the data CACHE with the ; memory
See also ■ CACHE
■ CACHE.view
▲ ’Release Information’ in ’Release History’
©1989-2016 Lauterbach GmbH
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CACHE
CACHE.DUMP
Dump CACHE
Format:
CACHE.DUMP [/]
:
IC | DC | L2
:
ALL | RAW | ValidOnly
Displays a hex dump of the CACHE contents. B::CACHE.DUMP IC address set way IC:09C0 001C 00 IC:11C0 001C 01 IC:09D0 001D 00 IC:11D0 001D 01 IC:11E0 001E 00 IC:09E0 001E 01 IC:11F0 001F 00 IC:09F0 001F 01 IC:0A00 0020 00
v V V V V V V V V V
l d u 0 0 0 0 1 1 1 1 0
00 7FBD0734 93A1000C 83E10014 3B800000 3D800001 4E800020 3BFF0001 9421FFE8 93E10014
04 7C6CE9D6 93C10010 8001001C 3BE00000 398CC468 00000000 4BFFFFE4 7C0802A6 9001001C
08 83A1000C 93E10014 7C0803A6 2C1F0012 39600001 00000401 3BE00000 93A1000C 3BE30000
0c 83C10010 9001001C 38210018 4181001C 7D6CF9AE 80030000 2C1F0012 93C10010 3BC40000
address ..\diabp8\func10+0x394 ..\diabp8\sieve+0x0C ..\diabp8\func10+0x3A4 ..\diabp8\sieve+0x1C ..\diabp8\sieve+0x2C ..\diabp8\func10+0x3B4 ..\diabp8\sieve+0x3C ..\diabp8\func10+0x3C4 ..\diabp8\func10+0x3D4
This command extracts useful information from the raw data read from the target and present them in a table in sequential order of the sets and ways. By default, only valid cache lines are presented.
Raw
Dump also the raw data. If the option Raw is used, all cache lines, no matter valid or not, will be displayed.
The CACHE.DUMP window typically involves multiple columns, some of which are used to present architecture-specific attributes of the cache lines. In the following table, we describe some commonly presented attributes. Please refer to the design manual of the respective architecture to understand the
©1989-2016 Lauterbach GmbH
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CACHE
detailed meaning of these attributes. Attribute Valid
Dirty
Secure
Shared
Coherence
Description •
Column Name: “v”.
•
Value “V” : valid.
•
Value “-” : invalid.
•
Column Name: “d”.
•
Value “D” : dirty.
•
Value “-” : not dirty.
•
Column Name: “sec”.
•
Value “s” : secure.
•
Value “ns” : non-secure.
•
Column Name: “s”.
•
Value “S”: shared.
•
value “-”: non-shared.
•
Column Name: “c”
•
The possible values of this column depend on the cache coherence protocol used by the architecture. E.g, for the MOESI protocol: -
Value “M” : modified.
-
Value “O” : owned.
-
Value “E” : exclusive.
-
Value “S” : shared.
-
Value “I” : invalid.
See also ■ CACHE
■ CACHE.view
▲ ’Release Information’ in ’Release History’
©1989-2016 Lauterbach GmbH
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CACHE
CACHE.FLUSH
Clean and invalidate CACHE
Format:
CACHE.FLUSH
:
IC | DC | L2
Writes back modified (dirty) lines to the next cache level or memory and invalidate the entire cache. Only the specified cache is affected. In case the operation is not supported by the CPU, the result will be a “function not implemented” error message.
See also ■ CACHE
■ CACHE.view
CACHE.GET
Format:
Get CACHE contents
CACHE.GET
Synchronize TRACE32 software with the target on the entire cache. TRACE32 loads all cache lines for which it does not have up-to-date data. For diagnostic purposes only.
See also ■ CACHE
■ CACHE.view
©1989-2016 Lauterbach GmbH
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CACHE
CACHE.INFO
Format:
View all information related to an address
CACHE.INFO
Displays all information related to a physical address. If the given address is logical, TRACE32 first translates it into physical. The information contains: •
All cache lines that cache the physical address, including both instruction and data cache.
•
All TLB entries that contain translation rules for the physical address.
•
All mmu entries that contain translation rules for the physical address (or all pages mapped to the given physical address), including both the task and kernel MMU entries.
See also ■ CACHE
■ CACHE.view
CACHE.INVALIDATE
Invalidate CACHE
Format:
CACHE.INVALIDATE
:
IC | DC | L2
Invalidates the entire cache. Only the specified cache is affected. In case the operation is not supported by the CPU, the result will be a “function not implemented” error message.
See also ■ CACHE
■ CACHE.view
©1989-2016 Lauterbach GmbH
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CACHE
CACHE.List
List CACHE contents
Format:
CACHE.List
:
IC | DC | L2
Displays a list of the CACHE contents. B::CACHE.List DC address C:0000C310--0000C32F C:0000C330--0000C33F C:0000C340--0000C34F C:0000C350--0000C35F C:0000C360--0000C37F C:0000C380--0000C38F C:0000C390--0000C3AF C:0000C3B0--0000C3CF C:0000C3D0--0000C3DF C:0000C3E0--0000C41F C:0000C420--0000C47F C:0000C480--0000C50F C:0000C510--0000C52F
dcache dirtway 00 way 00 dirtway 01 dirtway 00 dirtway 01 dirtway 00 dirtway 01 dirtway 00 dirtway 01 dirtway 00 dirtway 01 dirtway 00
\\Diabp8\Global\__predef_fname+0x4C \\Diabp8\Global\__argv \\Diabp8\Global\__heap_ptr \\Diabp8\diabp8\func2\fstatic2 \\Diabp8\Global\vstruct1+0x4 \\Diabp8\Global\vuchar \\Diabp8\Global\vpushort \\Diabp8\Global\vppppulong \\Diabp8\Global\funcptr \\Diabp8\Global\__no_malloc_warning \\Diabp8\Global\freeptr+0x8 \\Diabp8\Global\vtdef2 \\Diabp8\Global\stra1+0x8
See also ■ CACHE
■ CACHE.view
©1989-2016 Lauterbach GmbH
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CACHE
CACHE.ListFunc
List cached functions
Format:
CACHE.ListFunc
:
IC | DC | L2
Displays how much of each function is cached. B::CACHE.ListFunc address P:00000030--000012E4 -"diabp8 P:00000030--0000004B +'func0 P:00000058--0000008B +'func1 P:00000098--0000012B +'func2 P:00000138--0000019B +'func2a P:000001A8--00000207 +'func2b P:00000214--0000027B +'func2d P:00000288--000002A7 +'func3 P:000002B4--00000323 +'func4 P:00000330--0000037B +'func5 P:00000388--0000058B +'func8
valid 62.476% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 53.571% 100.000% 23.255%
dirty locked 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000% 0.000%
Detailed information about a function is displayed by double clicking to the function with the mouse. B::D.L P:0x2B4 /ICACHE icache addr/line way xx 224 way 01 P:000002B4 way 01 P:000002B8 way 01 P:000002BC P:000002C0 P:000002C4 P:000002C8 225 P:000002CC P:000002D0 P:000002D4 P:000002D8 P:000002DC way way way way way
00 00 00 00 00
227 P:000002E0 P:000002E4 P:000002E8 P:000002EC
code { 9421FFF0 7C0802A6 93E1000C 90010014 90810008 3BE30000
label
mnemonic
func4:
stwu mflr stw stw stw mr
r1,-0x10(r1) r0 r31,0x0C(r1) r0,0x14(r1) r4,0x8(r1) r31,r3
lwz lwz lwz addi stw
r12,0x8(r1) r11,0x8(r1) r11,0x4(r11) r11,r11,0x1 r11,0x4(r12)
mr lwz lwz lwz
r11,r31 r12,0x8(r1) r9,0x0(r12) r10,0x4(r12)
str.count++; 81810008 81610008 816B0004 396B0001 916C0004 return str; 397F0000 81810008 812C0000 814C0004
See also ■ CACHE
■ CACHE.view ©1989-2016 Lauterbach GmbH
General Commands Reference Guide C
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CACHE
CACHE.ListLine
tbd.
Format:
CACHE.ListLine
:
IC | DC | L2
tbd.
See also ■ CACHE
■ CACHE.view
©1989-2016 Lauterbach GmbH
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CACHE
CACHE.ListVar
List cached variables
Format:
CACHE.ListVar [ | ]
:
IC | DC | L2
Displays all cached variables. B::CACHE.ListVar address
valid
D:0000C318--0000C31B D:0000C31C--0000C31F D:0000C320--0000C323 D:0000C324--0000C327 D:0000C350--0000C353 D:0000C354--0000C357 D:000012D4--000012E4 D:0000C328--0000C32C D:0000C358--0000C35B D:0000C35C--0000C363 D:0000C364--0000C364 D:0000C366--0000C367
-"diabp8 func2\fstatic func9\stat1 func9\stat2 func26\x1 func2\fstatic2 mstatic1 -"Global cstr1 vdiarray vtdef1 vstruct1 vchar vshort
dirty
locked
100.000% 100.000% 100.000% 100.000% 100.000% 100.000%
100.000% 100.000% 100.000% 100.000% 100.000% 100.000%
0.000% 0.000% 0.000% 0.000% 0.000% 0.000%
0.000% 100.000% 100.000% 100.000% 100.000% 100.000%
0.000% 100.000% 100.000% 100.000% 100.000% 100.000%
0.000% 0.000% 0.000% 0.000% 0.000% 0.000%
Detailed information about a variable is displayed by double clicking to the variable with the mouse. B::D.V %var dcache dirtway 00 dirtway 00 dirtway 00 dirtway 00 dirtway 00 dirtway 00 dirtway 00 dirtway 00
D:0xC5D0 /DCACHE address data DC:0000C618 00 DC:0000C619 00 DC:0000C61A 00 DC:0000C61B 00 DC:0000C61C 00 DC:0000C61D 00 DC:0000C61E 00 DC:0000C61F 00 DC:0000C620 00 DC:0000C621 00 DC:0000C622 00 DC:0000C623 00 DC:0000C624 00 DC:0000C625 00
value symbol stra2[0][4].pastr ..\stra2+0x48 ..\stra2+0x49 ..\stra2+0x4A ..\stra2+0x4B stra2[0][4].pastr ..\stra2+0x4C ..\stra2+0x4D ..\stra2+0x4E ..\stra2+0x4F stra2[1][0].pstru ..\stra2+0x50 ..\stra2+0x51 ..\stra2+0x52 ..\stra2+0x53 stra2[1][0].ppstr ..\stra2+0x54 ..\stra2+0x55
See also ■ CACHE
■ CACHE.view
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CACHE
CACHE.RELOAD
Format:
Reload CACHE
CACHE.RELOAD
Delete all cache data that TRACE32 already loaded. Cache data that is needed afterwards will be reloaded from the target. For diagnostic purpose only.
See also ■ CACHE
■ CACHE.view
CACHE.view
Format:
Display CACHE control register
CACHE.view
B::CACHE.view IC_CST 80000002 IC_ADR IC_DAT
40000802 00000E82
DC_CST
80000000
DC_ADR DC_DAT
40000400 0000C660
IEN enabled CMD no cmd ICER1 no error ICER2 no error
ICER3 no error
DEN enabled DFWT off LES off CMD no cmd DCER1 no error DCER2 no error DCER3 no error
See also ■ ■ ■ ■
CACHE CACHE.FLUSH CACHE.List CACHE.RELOAD
■ CACHE.CLEAN ■ CACHE.GET ■ CACHE.ListFunc
■ CACHE.ComPare ■ CACHE.INFO ■ CACHE.ListLine
■ CACHE.DUMP ■ CACHE.INVALIDATE ■ CACHE.ListVar
▲ ’Release Information’ in ’Release History’
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CACHE
CAnalyzer CAnalyzer is the command group that controls the trace features of the CombiProbe. An comprehensive description of the usage of the CombiProbe is given in “CombiProbe User’s Guide” (combiprobe_user.pdf).
CombiProbe-specific Trace Commands See also ■ CAnalyzer.DecodeMode
■ CAnalyzer.PipeWRITE
CAnalyzer.DecodeMode
■ CAnalyzer.TraceCLOCK
■ CAnalyzer.WRITE
Define how to decode the received trace data
Format:
CAnalyzer.DecodeMode
:
AUTO XTIv2 SDTI STP SWV CSITM CSETM
This CombiProbe-specific trace command can be used to explicitly define how the recorded trace data should be decoded. In general the CombiProbe will try to use the correct setting automatically, dependent on the CPU selection and enabled debug features (like ITM for example). Nevertheless it is possible that you explicitly need to specify the trace decoding in cases where the debugger chooses the wrong defaults; for example if you are debugging an ARM core, which implements an ITM and at the same time an STP module and you now need to specify which of the two outputs you are actually recording.
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General Commands Reference Guide C
19
CAnalyzer
CAnalyzer.PipeWRITE
Define a named pipe as trace sink
Format:
CAnalyzer.PipeWRITE [/]
:
ChannelID MasterID
