CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

CS401 Computer Architecture and Assembly Language Programming 1.ASCII stands for American Standard Code for Information Interchange 79/page American Standard Code for Internet Information American Standard Code for Interchanging Information All Standard Codes for Information Interchange 2. The purpose of MOVS instruction is Move a memory location to register Move register to a memory location Move register to register Move memory to memory 84page 3.. IBM AT has how many PICs (Programmable interrupt controller) 1 2 (Pg. 104) 3 4 4. Which of the following IRQs is derived by a key board? IRQ 0 IRQ 1 (Pg. 106) IRQ 2 IRQ 3 5. which bit sets the character "blinking" on the screen? 5 6 7 (Pg. 73) 8 6. If the direction of the processing of a string is from higher addresses towards lower addresses then ZF is cleared DF is cleared (Pg. 84) ZF is set DF is set 7. In the instruction "mov word [es:160], 0x1230", 30 represents the character _________ B A 0 (Pg. 73) 1 8. IBM PC has separate memory address space and peripheral address space. Peripheral address space is selected when _____ instructions is given to the processor.

1

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

IN (Pg. 107) ADD MOV DEC 9. The time interval between two timer ticks is ____ 40ms 45ms 50ms 55ms (Pg. 114) 10. The Single step interrupt is ______ Hardware interrupt Like divide by zero interrupt 125page Like divide by 1 interrupt Like divide by 2 interrupt 11. In graphics mode a location in video memory corresponds to a __________ on the screen. line dot (Pg. 142) circle rectangle 12. The value of AH register in the write Graphics pixel service is ______ 0Ch(Pg. 144) 0Bh 1Ch 2Ch 13. The space where the current state of a task is stored is called __________ control block Process control block(Pg. 132) stack hard disk 14. INT 21 service 01H is used to read character from standard input with echo. It returns the result in _______ register. Al 133 bl cl bh 15. VESA VBE 2.0 is a standard for _______ Ultra resolution mode High resolution mode (Pg. 172) Medium resolution mode Low resolution mode 16. The Physical address of Interrupt Descriptor Table (IVT) is stored in _______ GDTR LGTD IDTR (Pg. 174) IVT 17. IDTR is a _________ register. 16 bit 20 bit 32 bit 48 bit (Pg. 174)

2

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

18. In Assembly language programming, how many prevalent Calling Conventions do exist ? 1 2(Pg. 180) 3 4 19. In NASM, an imported symbol is declared with the _________ while and exported symbol is declared with the _________ Global directive, External directive External directive, Global directive (Pg. 181) Home Directive, Foreign Directive Foreign Directive, Home Directive 20. Which byte of the DOS input buffer holds the number of characters actually read on return? First Byte Second Byte (Pg. 144) Third Byte Last Byte 21. What is the size of a Sector of a standard 1.44MB Floppy disk having 80 tracks and 18 Sectors/track? 128 Bytes 256 Bytes 512 Bytes(Pg. 148) 1024 Bytes 22. The thread registration code initializes the PCB and adds it to the linked list. so that which will give it a turn? assembler scheduler (Pg. 133) linker debugger 23. Video services are exported via INT 7 INT 10 (Pg. 142) INT 9 INT 8 24. The maximum memory, IAPX88 can access is________. 1 KB 64 KB 1 MB (Pg. 12) 64 MB 25. Only ___________ instructions allow moving data from memory to memory. String (Pg. 21) word indirect stack 26. If BL contains 5 decimal then after a right shift BL will contain 3 2 2.5 10 27. “mov byte [num1], 5” is _________ instruction.

3

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

illegal stack based memory indirect legal (Pg. 22) 28. Which of the following gives more logical view of the storage medium ? DOS RAM ROM BIOS (Pg. 148) 29. In device attribute word, which of the following bit decides whether it is a character device or a block device ? Bit 12 Bit 13 Bit 15 (Pg. 158) 30. In 9 pin DB-9, which pin number is assigned to DSR (Data Set Ready) ? 4 5 6 (Pg. 164) 7 31. In 9 pin DB-9, which pin number is assigned to CTS (Clear To Send) ? 6 7 8 (Pg. 164) 9 32. Which of the following BIOS INT provides serial port services INT14 (Pg. 164) INT11 INT12 INT13 33. A 32 bit address register can access up to .......................... of memory, so memory access has increased a lot. 2GB 4GB(Pg. 168) 6GB 8GB 34. The table index (TI) is set to _____ to access the GDT (Global Descriptor Table). 1 0 (Pg. 168) -1 -2 35. In 68K processors there is a ........................ program counter (PC) that holds the address of currently executing instruction. 8 bit 16 bit 32 bit(Pg. 184) 64 bit 36. In 68K processors there is a 32 bit ...................... that holds the address of currently executing instruction. Program counter (Pg. 184)

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Stack pointer Register Stack 37. Which of the following Register is closely associated with REP prefix? AX BX CX (Pg. 85) DX 38. Which of the following is a special type of interrupt that returns to the same instruction instead of the next instruction? Divide overflow interrupt (Pg. 99) Debug interrupt Arithmetic overflow interrupt Change of sign interrupt 39. In Programmable Interrupt Controller which one of the following ports is used for selectively enabling or disabling interrupts? 19 20 21 (Pg. 107) 22 40. Which one of the following interrupts is used for arithmetic overflow? INT 4 (Pg. 98) INT 1 INT 2 INT 3 CS401 Computer Architecture and Assembly Language Programming The shift logical right operation inserts A zero at right (Pg. 44) A zero at left A one at right A one at right The FLAGS register contains 5 status flags 6 status flags 7 status flags 8 status flags In string instructions, the mode is called auto-increment mode when ZF is cleared DF is cleared(Pg. 84) CX is set DF is set IBM AT has how many PICs (Programmable interrupt controller) 1 2 (Pg. 106) 3 4 Which of the following IRQs is used for sound card or network card? IRQ 4

5

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

IRQ 5(Pg. 106) IRQ 6 IRQ 7 Which of the following interrupt is of highest priority interrupt? Key board interrupt Timer interrupt(pg 114) INT 2 INT 3 In 8088 architecture, whenever an element is pushed on the stack SP is decremented by 1 SP is decremented by 2(Pg. 60) SP is decremented by 3 SP is decremented by 4 Which of the following operations relating to PUSH is true? SP
SP-2 61page [SP]
AX SP
SP+2 [SP]
AX SP
SP-1 [SP]
AX SP
SP+1 [SP]
AX Stack is a data structure which behaves as Last in first out manner All in no out manner Last in last out manner First in last out manner (Pg. 59) Which of the following is an illegal instruction ? PUSH AX PUSH BX PUSH DL PUSH DX Which of the following will set zero flag for all values of ax? mov ax, 0 add ax, 0 32 add ax, ax sub ax, ax _____ can process blocks of data in one go. Logical instructions String instructions(Pg. 84) Word instructions Array instructions ________ are not used in mathematical operations. Carry, Interrupt and Trap flag Direction, Interrupt and Trap flag (Pg. 126) Direction, Overflow and Trap flag Direction, Interrupt and Sign flag INT 21 service 01H is used to read character from standard input with echo. It returns the result in _______ register.

6

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Al (Pg. 144) bl cl bh VESA VBE 2.0 is a standard for _______ Ultra resolution mode High resolution mode (Pg. 172) Medium resolution mode Low resolution mode VESA (an organization) organizes 16 color bits for every pixel in _________ format. 5:5:5 5:6:5 172 5:5:6 5:6:6 The Physical address of Interrupt Descriptor Table (IVT) is stored in _______ GDTR LGTD IDTR (Pg. 174) IVT 18.. IDTR is a _________ register. 16 bit 20 bit 32 bit 48 bit (Pg. 174) In Assembly language programming, how many prevalent Calling Conventions do exist ? 1 2(Pg. 180) 3 4 In Computer Architecture, CISC stands for ________ Complex Instruction Set Computer (Pg. 184) Complex Instruction System Computer Correct Instruction Set Computer Correct Instruction System Computer In multi-tasking environment, which is called scheduler for saving and restoring the registers? INT 10 INT 09 INT 08 (Pg. 133) INT 07 Threads can have function calls, parameters and which type of variables? global local (Pg. 133) legal illegal The thread registration code initializes the PCB and adds it to the linked list. so that which will give it a turn? assembler scheduler(Pg. 133) linker

7

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

debugger In multi-tasking programming, all threads are Independent to each other 135 Dependent on each other Not executed Not scheduled We have two logical parts of our ____________, the code and the data Program(Pg. 12) register processor memory In device attribute word, which of the following bit decides whether it is a character device or a block device ? Bit 12 Bit 13 Bit 14 Bit 15 (Pg. 158) The serial port connection is a ------------------ connector 9 pin DB-9(Pg. 164) 8 pin DB-9 3 pin DB-9 9 pin DB-5 In 9 pin DB-9, which pin number is assigned to CTS (Clear To Send) ? 6 7 8(Pg. 164) 9 In 9 pin DB-9, which pin number is assigned to CD (Carrier Detect) ? 1 (Pg. 164) 2 3 4 In 9 pin DB-9, RI (Ring Indicator) is assigned on pin number _____ 6 7 8 9 (Pg. 164) Which of the following BIOS INT provides serial port services INT14 (Pg. 164) INT11 INT12 INT13 8088 is a ........................... 16 bit processor (Pg. 168) 32 bit processor 64 bit processor 128 bit processor AX register in extended 32 bit register is renamed as _______ AXE EAX 167

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

AAX XAX The table index (TI) is set to _____ to access the GDT (Global Descriptor Table). 1 0 (Pg. 168) -1 -2 In 68K processors there is a 32 bit ...................... that holds the address of currently executing instruction. Program counter 183 Stack pointer Register Stack Programmable Interrupt Controller (PIC) has One input signals and eight output signals One input signal and one output signal Eight input signals and one output signals (Pg. 105) Eight input signals and eight output signals An 8 x 16 font is stored in ______________ bytes. 2 4 8 16 142 Which of the following is a special type of interrupt that returns to the same instruction instead of the next instruction? Divide overflow interrupt 99 Debug interrupt Arithmetic overflow interrupt Change of sign interrupt ______ number of pin(s) of a processor is/are used by the external hardware to generate an interrupt. 1 105 2 3 4 In Programmable Interrupt Controller which one of the following ports is used for selectively enabling or disabling interrupts? 19 20 21(Pg. 107) 22 CS401 Computer Architecture and Assembly Language Programming 1. LODS instruction transfers a byte or word from source to AL or AX register (Pg. 84) BL or BX register CL or CX register DL or DX register 2. The routine that executes in response to an INT instruction is called

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

ISR(Pg. 96) IRS ISP IRT 3. IRQ is referred to Eight input signals(Pg. 106) Eight output signals One input signals One output signal 4. The data on which we want to perform some operations is called Opcode Operand(Pg. 3) Operator Operation 5. Regarding assembler, which statement is true: Assembler converts mnemonics to the corresponding OPCODE Assembler converts OPCODE to the corresponding mnemonics 12 Assembler executes the assembly code all at once Assembler executes the assembly code step by step 6. In the word designated for one screen location, the higher address contains The character code The attribute byte (Pg. 73) The parameters The dimensions 7. During the execution of an INT instruction some contents are pushed on to the stack, the order of pushing them is CS, IP and then FLAGS register IP, CS and then FLAGS register FLAGS register, CS and then IP dout FLAGS register, IP and then CS 8. When two devices in the system want to use the same IRQ line then what will happen? An IRQ Collision An IRQ Conflict (Pg. 106) An IRQ Crash An IRQ Blockage 9. "mov [bp], al" moves the one byte content of the AL register to the address contained in BP register in the current Stack segment(Pg. 27) Code segment Data segment Extra segment 10. What decimal value is represented by the Signed Binary Number 1000 0110? 134 from net 86 -122 -134 11 A 32 bit processor has an accumulator of ________ 8 bits 16 bits 32 bits 4

10

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

64 bits 12. IBM PC has separate memory address space and peripheral address space. Peripheral address space is selected when _____ instructions is given to the processor. IN(Pg. 107) ADD MOV DEC 13. The number of pins in a parallel port connector are _____ 20 25(Pg. 117) 30 35 14. INT 10 is used for __________ services. BIOS video(Pg. 142) DOS video RAM Disk 15. ________ are not used in mathematical operations. Carry, Interrupt and Trap flag Direction, Interrupt and Trap flag 125 Direction, Overflow and Trap flag Direction, Interrupt and Sign flag 16. VESA (an organization) organizes 16 color bits for every pixel in _________ format. 5:5:5 5:6:5 172 5:5:6 5:6:6 17. VESA stands for _________ Variable Electronics Standards Association Video Electronics Standards Association(Pg. 172) Video Energy Standards Association Vega Energy Standards Association 18. VBE stands for _________, as proposed by VESA (an organization). Video BIOS Extensions(Pg. 172) Video BIOS Emergence Video Binary Extensions Video Blocked Extensions 19. The Physical address of Interrupt Descriptor Table (IVT) is stored in _______ GDTR LGTD IDTR(Pg.174 ) IVT 20. In Computer Architecture, the Protected mode is different from _______ Programming mode Real time mode Visualization mode Memory mode 21. In Computer Architecture, RISC stands for ________ Reversed Instruction Set Computer Reversed Instruction System Computer

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Reduced Instruction Set Computer(Pg. 184) Reduced Instruction System Computer 22. Which byte of the DOS input buffer holds the number of characters actually read on return? First Byte Second Byte(Pg. 144) Third Byte Last Byte 23. When a 16 bit number is divided by 8 bit number, the quotient will be stored in AX AL 77 AH DX 24. In multi-tasking environment, which is called scheduler for saving and restoring the registers? INT 10 INT 09 INT 08(Pg. 133) INT 07 25. The thread registration code initializes the PCB and adds it to the linked list. so that which will give it a turn? assembler scheduler(Pg. 133) linker debugger 26. In multi-tasking programming, all threads are Independent to each other 135 Dependent on each other Not executed Not scheduled 27. Video services are exported via INT 7 INT 10(Pg. 142) INT 9 INT 8 28. "INT 10 Video - Scroll Up Window" is a type of video services used in which mode? Graphics Text (Pg. 142) Audio Numeric 29. Which of the following gives more logical view of the storage medium ? DOS RAM ROM BIOS(Pg. 148) 30. In device attribute word, which of the following bit decides whether it is a character device or a block device ? Bit 12 Bit 13 Bit 14

12

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Bit 15(Pg. 158) 31. The serial port connection is a ------------------ connector 9 pin DB-9(Pg. 164) 8 pin DB-9 3 pin DB-9 9 pin DB-5 32. In 9 pin DB-9, which pin number is assigned to CD (Carrier Detect) ? 1(Pg. 164) 2 3 4 33. Which of the following BIOS INT provides serial port services INT14(Pg. 164) INT11 INT12 INT13 34. 8088 is a ........................... 16 bit processor(Pg. 168) 32 bit processor 64 bit processor 128 bit processor 35. AX register in extended 32 bit register is renamed as _______ AXE EAX 167 AAX XAX 36. In 68K processors there is a ........................ program counter (PC) that holds the address of currently executing instruction. 8 bit 16 bit 32 bit(Pg. 184) 64 bit 37. In 68K processors there is a 32 bit ...................... that holds the address of currently executing instruction. Program counter 184 Stack pointer Register Stack 38. Which bit of the Attribute Byte (Counting from right to left, starting from 0) represents the GREEN component of foreground color? 1 (Pg. 73) 2 3 4 39. In Programmable Interrupt Controller which one of the following ports is used for selectively enabling or disabling interrupts? 19 20 21(Pg. 107) 22

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

40. In Programmable Interrupt Controller, Port ______ is referred as a Control port. 19 20(Pg. 107) 21 22 CS401 Computer Architecture and Assembly Language Programming LODS instruction transfers a byte or word from source to AL or AX register(Pg.84 ) BL or BX register CL or CX register DL or DX register The routine that executes in response to an INT instruction is called ISR(Pg. 96) IRS ISP IRT IRQ is referred to Eight input signals(Pg. 105) Eight output signals One input signals One output signal The data on which we want to perform some operations is called Opcode Operand(Pg.3 ) Operator Operation Regarding assembler, which statement is true: Assembler converts mnemonics to the corresponding OPCODE Assembler converts OPCODE to the corresponding mnemonics 12 Assembler executes the assembly code all at once Assembler executes the assembly code step by step In the word designated for one screen location, the higher address contains The character code The attribute byte(Pg. 73) The parameters The dimensions During the execution of an INT instruction some contents are pushed on to the stack, the order of pushing them is CS, IP and then FLAGS register IP, CS and then FLAGS register FLAGS register, CS and then IP FLAGS register, IP and then CS When two devices in the system want to use the same IRQ line then what will happen? An IRQ Collision An IRQ Conflict(Pg. 106) An IRQ Crash An IRQ Blockage "mov [bp], al" moves the one byte content of the AL register to the address contained in BP register in the current Stack segment(Pg. 27)

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Code segment Data segment Extra segment What decimal value is represented by the Signed Binary Number 1000 0110? 134 net 86 -122 -134 A 32 bit processor has an accumulator of ________ 8 bits 16 bits 32 bits 4 64 bits IBM PC has separate memory address space and peripheral address space. Peripheral address space is selected when _____ instructions is given to the processor. IN(Pg. 107) ADD MOV DEC The number of pins in a parallel port connector are _____ 20 25(Pg. 117) 30 35 INT 10 is used for __________ services. BIOS video(Pg. 142) DOS video RAM Disk ________ are not used in mathematical operations. Carry, Interrupt and Trap flag Direction, Interrupt and Trap flag Direction, Overflow and Trap flag Direction, Interrupt and Sign flag VESA (an organization) organizes 16 color bits for every pixel in _________ format. 5:5:5 5:6:5(Pg. 172) 5:5:6 5:6:6 VESA stands for _________ Variable Electronics Standards Association(Pg. 172) Video Electronics Standards Association Video Energy Standards Association Video Energy Standards Association VBE stands for _________, as proposed by VESA (an organization). Video BIOS Extensions (Pg. 172) Video BIOS Emergence Video Binary Extensions Video Blocked Extensions The Physical address of Interrupt Descriptor Table (IVT) is stored in _______

15

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

GDTR LGTD IDTR (Pg. 174) IVT In Computer Architecture, the Protected mode is different from _______ Programming mode Real time mode Visualization mode Memory mode In Computer Architecture, RISC stands for ________ Reversed Instruction Set Computer Reversed Instruction System Computer Reduced Instruction Set Computer(Pg. 184) Reduced Instruction System Computer Which byte of the DOS input buffer holds the number of characters actually read on return? First Byte Second Byte(Pg. 144) Third Byte Last Byte When a 16 bit number is divided by 8 bit number, the quotient will be stored in AX AL 77 AH DX In multi-tasking environment, which is called scheduler for saving and restoring the registers? INT 10 INT 09 INT 08(Pg. 133) INT 07 The thread registration code initializes the PCB and adds it to the linked list. so that which will give it a turn? assembler scheduler(Pg. 133) linker debugger

In multi-tasking programming, all threads are Independent to each other 135 Dependent on each other Not executed Not scheduled Video services are exported via INT 7 INT 10(Pg. 142) INT 9 INT 8 "INT 10 Video - Scroll Up Window" is a type of video services used in which mode? Graphics Text(Pg. 142)

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Audio Numeric Which of the following gives more logical view of the storage medium ? DOS RAM ROM BIOS(Pg. 148) In device attribute word, which of the following bit decides whether it is a character device or a block device ? Bit 12 Bit 13 Bit 14 Bit 15(Pg. 158) The serial port connection is a ------------------ connector 9 pin DB-9 164page 8 pin DB-9 3 pin DB-9 9 pin DB-5 In 9 pin DB-9, which pin number is assigned to CD (Carrier Detect) ? 1(Pg. 164) 2 3 4 Which of the following BIOS INT provides serial port services INT14(Pg. 164) INT11 INT12 INT13 8088 is a ........................... 16 bit processor(Pg. 168) 32 bit processor 64 bit processor 128 bit processor AX register in extended 32 bit register is renamed as _______ AXE EAX 167 AAX XAX In 68K processors there is a ........................ program counter (PC) that holds the address of currently executing instruction. 8 bit 16 bit 32 bit(Pg. 184) 64 bit In 68K processors there is a 32 bit ...................... that holds the address of currently executing instruction. Program counter 184 Stack pointer Register Stack

17

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Which bit of the Attribute Byte (Counting from right to left, starting from 0) represents the GREEN component of foreground color? 1(Pg. 73) 2 3 4 In Programmable Interrupt Controller, Port ______ is referred as a Control port. 19 20(Pg. 107) 21 22 CS401 Computer Architecture and Assembly Language Programming The assembly instruction to put the value of AX on the stack is PUSH AX 170 Mov Stack, AX ADD AX SEND AX The physical address of the stack is obtained by SS:SI combination SS:SP combination(Pg. 60) ES:BP combination ES:SP combination In the execution of the instruction “REP STOSB” STOSB will repeat itself AX times BX times CX times(Pg. 84) DX times Which of the following IRQs is used for sound card or network card? IRQ 4 IRQ 5(Pg. 106) IRQ 6 IRQ 7 The maximum parameters a subroutine can receive (with the help of registers) are 6 7 64 8 9 After the execution of CMP instruction, the contents of Source changes Destination changes Both (Source and Destination) changes Source and Destination do not change 31 To transfer control back, the RET instruction takes 2 arguments 3 arguments 4 arguments No arguments(Pg. 56) When two devices in the system want to use the same IRQ line then what will happen? An IRQ Collision

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

An IRQ Conflict(Pg. 106) An IRQ Crash An IRQ Blockage After the execution of following two instructions, what will happen ? PUSH AX POP DX The value of DX will be at the top of stack The value of AX will be at the top of stack The value of DX will be copied into AX The value of AX will be copied into DX 61page The bits of ________ register work independently. If combined all these bits then they are meaningless. Accumulator (AX) Instruction Pointer (IP) Flag 4page Base IBM PC has separate memory address space and peripheral address space. Peripheral address space is selected when _____ instructions is given to the processor. IN(Pg. 107) ADD MOV DEC The time interval between two timer ticks is ____ 40ms 45ms 50ms 55ms(Pg. 114) ________ are not used in mathematical operations. Carry, Interrupt and Trap flag Direction, Interrupt and Trap flag 125page Direction, Overflow and Trap flag Direction, Interrupt and Sign flag In DOS input buffer, the number of characters actually read on return is stored in ___________ byte. third fourth first(Pg. 144) second The value of AH register in the write Graphics pixel service is ______ 0Ch 144page 0Bh 1Ch 2Ch The space where the current state of a task is stored is called __________ control block Process control block 132page stack hard disk VESA VBE 2.0 is a standard for _______ Ultra resolution mode

19

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

High resolution mode(Pg. 172) Medium resolution mode Low resolution mode VBE stands for _________, as proposed by VESA (an organization). Video BIOS Extensions(Pg. 172) Video BIOS Emergence Video Binary Extensions Video Blocked Extensions IDTR is a _________ register. 16 bit 20 bit 32 bit 48 bit(Pg. 174) In Assembly language programming, how many prevalent Calling Conventions do exist ? 1 2 179page 3 4 In Motorola 68K processors, ________ registers can hold addresses in indirect memory accesses. A0-A7 183 B0-B7 C0-C7 D0-D7 Motorola 68K processors have _________ 32 bit general purpose registers. 32 64 8 16 183page Which byte of the DOS input buffer holds the number of characters actually read on return? First Byte Second Byte(Pg. 144) Third Byte Last Byte 24.In multi-tasking environment, which is called scheduler for saving and restoring the registers? INT 10 INT 09 INT 08(Pg. 133) The thread registration code initializes the PCB and adds it to the linked list. so that which will give it a turn? linker debugger assembler scheduler (Pg. 133) In multi-tasking programming, all threads are Independent to each other 135 Dependent on each other Not executed

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

Not scheduled We have two logical parts of our ____________, the code and the data Program(Pg. 12) register processor memory There are _________ registers in iAPX88 architecture that can hold address of data. 3 4(Pg. 22) 5 6 BIOS sees the disks as logical storage device raw storage device(Pg. 148) in the form of sectors only in the form of tracks only 30.In device attribute word, which of the following bit decides whether it is a character device or a block device ? Bit 12 Bit 13 Bit 14 Bit 15(Pg. 158) 31. In 9 pin DB-9, which pin number is assigned to CTS (Clear To Send) ? 6 7 8(Pg. 164) 9 32. In 9 pin DB-9, which pin number is assigned to RD (Received Data) ? 1 2(Pg.164 ) 3 4 33. In 9 pin DB-9, which pin number is assigned to TD (Transmitted Data) ? 1 2 3(Pg. 164) 4 34. In 9 pin DB-9, which pin number is assigned to DTR (Data Terminal Ready) ? 1 2 3 4(Pg. 164) 35. 8088 is a ........................... 16 bit processor(Pg. 168) 32 bit processor 64 bit processor 128 bit processor 36. The table index (TI) is set to _____ to access the GDT (Global Descriptor Table). 1 0(Pg. 168)

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

-1 -2 37. In 68K processors there is a 32 bit ...................... that holds the address of currently executing instruction. Program counter Stack pointer Register Stack 38. Which of the following pins of a parallel port connector are grounded? 10-18 18-25(Pg. 117) 25-32 32-39 39. In Programmable Interrupt Controller, Port ______ is referred as a Control port. 19 20(Pg. 107) 21 22 40. Which one of the following interrupts is used for arithmetic overflow? INT 4(Pg. 98) INT 1 INT 2 INT 3 CS401 Computer Architecture and Assembly Language Programming The basic root instruction for all comparisons is? COM CMP(Pg. 32) COMPAR COMP The assembly instruction to put the value of AX on the stack is PUSH AX 61 Mov Stack, AX ADD AX SEND AX ASCII stands for American Standard Code for Information Interchange(Pg.79 ) American Standard Code for Internet Information American Standard Code for Interchanging Information All Standard Codes for Information Interchange Which of the following IRQs is connected to serial port COM 2? IRQ 0 IRQ 1 IRQ 2 IRQ 3(Pg. 106) Which of the following interrupt is of highest priority interrupt? Key board interrupt Timer interrupt(Pg. 114) INT 2 INT 3

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

6.The first instruction of “COM” file must be at offset: 0x0010 0x0100 page12 0x1000 0x0000 In string instructions, CX is always Decremented by 1 page84 Decremented by 2 Incremented by 1 Incremented by 2 Which of the following flags will be affected by MOVSW? DF PF ZF No effect on flags internet What is does NASM stand for? Native Assembler Netwide Assembler 10 Natural Assembler National Academy of Scientific Machines IBM PC has separate memory address space and peripheral address space. Peripheral address space is selected when _____ instructions is given to the processor. IN(Pg. 107) ADD MOV DEC INT 10 is used for __________ services. BIOS video(Pg. 100) DOS video RAM Disk The Single step interrupt is ______ Hardware interrupt 105 Like divide by zero interrupt Like divide by 1 interrupt Like divide by 2 interrupt In graphics mode a location in video memory corresponds to a __________ on the screen. line dot(Pg. 142) circle rectangle A thread can not be created ______ in static way in dynamic way 133 in static and dynamic way at the same time manually The value of AH register in the write Graphics pixel service is ______ 0Ch 144 0Bh 1Ch

23

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

2Ch VESA stands for _________ Variable Electronics Standards Association Video Electronics Standards Association(Pg. 172) Video Energy Standards Association Vega Energy Standards Association The Physical address of Interrupt Descriptor Table (IVT) is stored in _______ GDTR LGTD IDTR(Pg.174 ) IVT In Computer Architecture, the Protected mode is different from _______ Programming mode Real time mode Visualization mode Memory mode internet In Assembly language programming, how many prevalent Calling Conventions do exist ? 1 2 179page 3 4 In Motorola 68K processors, ________ registers can hold addresses in indirect memory accesses. A0-A7 183page C0-C7 D0-D7 Motorola 68K processors have _________ 32 bit general purpose registers. 32 183page 64 8 16 Constants cannot appear as the ______________ operand. souce destination(Pg. 17) memory register Suppose AL contains 5 decimal then after two left shifts produces the value as 5 10 15 20 In device attribute word, which of the following bit decides whether it is a character device or a block device ? Bit 12 Bit 13 Bit 14 Bit 15(Pg. 158) In 9 pin DB-9, which pin number is assigned to RTS (Request To Send) ? 5 6

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CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

7(Pg. 164) 8 In 9 pin DB-9, which pin number is assigned to CTS (Clear To Send) ? 6 7 8(Pg. 164) 9 In 9 pin DB-9, which pin number is assigned to RD (Received Data) ? 1 2(Pg.164 ) 3 4 In 9 pin DB-9, which pin number is assigned to DTR (Data Terminal Ready) ? 1 2 3 4(Pg. 164) In 9 pin DB-9, RI (Ring Indicator) is assigned on pin number _____ 6 7 8 9(Pg. 164) Which of the following BIOS INT provides serial port services INT14(Pg. 164) INT11 INT12 INT13 A 32 bit address register can access up to .......................... of memory, so memory access has increased a lot. 2GB 4GB(Pg. 168) 6GB 8GB The table index (TI) is set to _____ to access the GDT (Global Descriptor Table). 1 0(Pg. 168 ) -1 -2 In 68K processors there is a ........................ program counter (PC) that holds the address of currently executing instruction. 8 bit 16 bit 32 bit(Pg. 184) 64 bit Which of the following Register is closely associated with REP prefix? AX BX CX 85 DX An 8 x 16 font is stored in ______________ bytes.

25

CS401 Computer Architecture and Assembly Language Programming

Final Term Fall-2012

2 4 8 16 142page 36.The priority of IRQ 0 interrupt is ________ high highest(Pg. 106) low medium 37. Which of the following is a special type of interrupt that returns to the same instruction instead of the next instruction? Divide overflow interrupt(Pg. 99) Debug interrupt Arithmetic overflow interrupt Change of sign interrupt 38. Which of the following IRQs is used for Floppy disk drive? IRQ 6(Pg. 106) IRQ 7 IRQ 4 IRQ 5 39. In Programmable Interrupt Controller which one of the following ports is used for selectively enabling or disabling interrupts? 19 20 21(Pg. 107) 22 40. Which one of the following interrupts is used for arithmetic overflow? INT 4(Pg. 98) INT 1 INT 2 INT 3

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