FQPF3P50

August 2000

QFET

TM

FQPF3P50 500V P-Channel MOSFET General Description

Features

These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge.

• • • • • •

-1.9A, -500V, RDS(on) = 4.9Ω @VGS = -10 V Low gate charge ( typical 18 nC) Low Crss ( typical 9.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability

S ! ● ●

G!

▶ ▲ ●

GD S

TO-220F !

FQPF Series

Absolute Maximum Ratings Symbol VDSS ID

D

TC = 25°C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C)

IDM

Drain Current

VGSS

Gate-Source Voltage

EAS

Single Pulsed Avalanche Energy

IAR

Avalanche Current

EAR

Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C)

dv/dt PD TJ, TSTG TL

- Pulsed

FQPF3P50 -500

Units V

-1.9

A

-1.2

A

-7.6

A

± 30

V

(Note 2)

250

mJ

(Note 1)

-1.9

A

(Note 1)

3.9 -4.5 39 0.31 -55 to +150

mJ V/ns W W/°C °C

300

°C

(Note 1)

(Note 3)

- Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

Thermal Characteristics Symbol RθJC

Parameter Thermal Resistance, Junction-to-Case

RθJA

Thermal Resistance, Junction-to-Ambient

©2000 Fairchild Semiconductor International

Typ --

Max 3.2

Units °C/W

--

62.5

°C/W

Rev. A, August 2000

Symbol

TC = 25°C unless otherwise noted

Parameter

Test Conditions

Min

Typ

Max

Units

-500

--

--

V

--

0.42

--

V/°C

Off Characteristics BVDSS

Drain-Source Breakdown Voltage

VGS = 0 V, ID = -250 µA

∆BVDSS / ∆TJ

Breakdown Voltage Temperature Coefficient

ID = -250 µA, Referenced to 25°C

IDSS IGSSF IGSSR

VDS = -500 V, VGS = 0 V

--

--

-1

µA

VDS = -400 V, TC = 125°C

--

--

-10

µA

Gate-Body Leakage Current, Forward

VGS = -30 V, VDS = 0 V

--

--

-100

nA

Gate-Body Leakage Current, Reverse

VGS = 30 V, VDS = 0 V

--

--

100

nA

Zero Gate Voltage Drain Current

On Characteristics VGS(th)

Gate Threshold Voltage

VDS = VGS, ID = -250 µA

-3.0

--

-5.0

V

RDS(on)

Static Drain-Source On-Resistance

VGS = -10 V, ID = -0.95 A

--

3.9

4.9

Ω

gFS

Forward Transconductance

VDS = -50 V, ID = -0.95 A

--

2.0

--

S

--

510

660

pF

--

70

90

pF

--

9.5

12

pF

--

12

35

ns

--

56

120

ns

--

35

80

ns

--

45

100

ns

--

18

23

nC

(Note 4)

Dynamic Characteristics Ciss

Input Capacitance

Coss

Output Capacitance

Crss

Reverse Transfer Capacitance

VDS = -25 V, VGS = 0 V, f = 1.0 MHz

Switching Characteristics td(on)

Turn-On Delay Time

tr

Turn-On Rise Time

td(off)

Turn-Off Delay Time

tf

Turn-Off Fall Time

Qg

Total Gate Charge

Qgs

Gate-Source Charge

Qgd

Gate-Drain Charge

VDD = -250 V, ID = -2.7 A, RG = 25 Ω (Note 4, 5)

VDS = -400 V, ID = -2.7 A, VGS = -10 V (Note 4, 5)

--

3.6

--

nC

--

9.2

--

nC

A

Drain-Source Diode Characteristics and Maximum Ratings IS

Maximum Continuous Drain-Source Diode Forward Current

--

--

-1.9

ISM

--

--

-7.6

A

VSD

Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -1.9 A Drain-Source Diode Forward Voltage

--

--

-5.0

V

trr

Reverse Recovery Time

--

270

--

ns

Qrr

Reverse Recovery Charge

--

1.5

--

µC

VGS = 0 V, IS = -2.7 A, dIF / dt = 100 A/µs

(Note 4)

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 125mH, IAS = -1.9A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ -2.7A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature

©2000 Fairchild Semiconductor International

Rev. A, August 2000

FQPF3P50

Elerical Characteristics

VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.5 V -6.0 V Bottom : -5.5 V

0

-I D, Drain Current [A]

10

-I D , Drain Current [A]

Top :

-1

10

※ Notes : 1. 250μs Pulse Test 2. TC = 25℃

0

10

150℃

25℃ ※ Notes : 1. VDS = -50V 2. 250μs Pulse Test

-55℃

-2

10

-1

-1

0

10

10

1

10

2

10

4

6

8

10

-VGS , Gate-Source Voltage [V]

-VDS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

8

VGS = - 10V 6

-I DR , Reverse Drain Current [A]

RDS(on) [ Ω ], Drain-Source On-Resistance

7

VGS = - 20V

5

4

3 ※ Note : TJ = 25℃

2

0

10

150℃

25℃

※ Notes : 1. VGS = 0V 2. 250μs Pulse Test

-1

0

2

4

6

8

10

0.0

0.5

1.0

1.5

2.0

2.5

3.0

-ID , Drain Current [A]

-VSD , Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature

12

1200 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd

800

Ciss 600

Coss 400

※ Notes : 1. VGS = 0 V 2. f = 1 MHz

Crss

200

0 -1 10

10

-V GS , Gate-Source Voltage [V]

1000

Capacitance [pF]

FQPF3P50

Typical Characteristics

VDS = -100V VDS = -250V

8

VDS = -400V

6

4

2 ※ Note : ID = -2.7 A

0 0

10

1

10

VDS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

©2000 Fairchild Semiconductor International

0

2

4

6

8

10

12

14

16

18

20

QG, Total Gate Charge [nC]

Figure 6. Gate Charge Characteristics

Rev. A, August 2000

(Continued)

2.5

1.2

2.0

1.1

RDS(ON) , (Normalized) Drain-Source On-Resistance

-BV DSS , (Normalized) Drain-Source Breakdown Voltage

FQPF3P50

Typical Characteristics

1.0

※ Notes : 1. VGS = 0 V 2. ID = -250 μA

0.9

0.8 -100

-50

0

50

100

150

1.5

1.0

※ Notes : 1. VGS = -10 V 2. ID = -1.35 A

0.5

0.0 -100

200

-50

o

0

50

100

150

200

o

TJ, Junction Temperature [ C]

TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation vs. Temperature

Figure 8. On-Resistance Variation vs. Temperature

2.0 Operation in This Area is Limited by R DS(on) 1

10

-I D, Drain Current [A]

-I D, Drain Current [A]

1.5

1 ms 10 ms 100 ms

0

10

DC

-1

10

※ Notes :

1.0

0.5

o

1. TC = 25 C o

2. TJ = 150 C 3. Single Pulse -2

10

0

1

10

2

10

0.0 25

3

10

10

50

Figure 9. Maximum Safe Operating Area

100

125

150

Figure 10. Maximum Drain Current vs. Case Temperature

D = 0 .5 10

0

0 .2 ※ N o te s : 1 . Z θ J C ( t) = 3 .2 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t)

0 .1 0 .0 5 10

-1

0 .0 2

PDM

0 .0 1

θ JC

( t) , T h e r m a l R e s p o n s e

75

TC, Case Temperature [℃]

-VDS, Drain-Source Voltage [V]

t1

Z

t2 s i n g le p u ls e 10

-2

10

-5

10

-4

10

-3

10

-2

10

-1

10

0

10

1

t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]

Figure 11. Transient Thermal Response Curve

©2000 Fairchild Semiconductor International

Rev. A, August 2000

FQPF3P50

Gate Charge Test Circuit & Waveform

VGS

Same Type as DUT

50KΩ

Qg

200nF

12V

-10V

300nF

VDS

VGS

Qgs

Qgd

DUT -3mA

Charge

Resistive Switching Test Circuit & Waveforms

VDS

RL

t on

VDD

VGS RG

td(on)

VGS

t off tr

td(off)

tf

10%

DUT

-10V

VDS

90%

Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD

L VDS

tp

ID RG

VDD DUT

-10V tp

©2000 Fairchild Semiconductor International

VDD

Time VDS (t)

ID (t) IAS BVDSS

Rev. A, August 2000

FQPF3P50

Peak Diode Recovery dv/dt Test Circuit & Waveforms

+ VDS DUT

_

I SD L Driver RG

VGS

VGS ( Driver )

I SD ( DUT )

Compliment of DUT (N-Channel)

VDD

• dv/dt controlled by RG • ISD controlled by pulse period

Gate Pulse Width D = -------------------------Gate Pulse Period

10V

Body Diode Reverse Current

IRM di/dt IFM , Body Diode Forward Current

VDS ( DUT )

VSD

Body Diode Forward Voltage Drop

VDD

Body Diode Recovery dv/dt

©2000 Fairchild Semiconductor International

Rev. A, August 2000

3.30 ±0.10

TO-220F 10.16 ±0.20

2.54 ±0.20

ø3.18 ±0.10

(7.00)

(1.00x45°)

15.87 ±0.20

15.80 ±0.20

6.68 ±0.20

(0.70)

MAX1.47 0.80 ±0.10 ) 0°

(3

9.75 ±0.30

0.35 ±0.10

#1 +0.10

0.50 –0.05

2.54TYP [2.54 ±0.20]

2.54TYP [2.54 ±0.20]

9.40 ±0.20

©2000 Fairchild Semiconductor International

2.76 ±0.20

4.70 ±0.20

FQPF3P50

Package Dimensions

Rev. A, August 2000

TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ E2CMOS™ FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™

HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench® QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6

SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™

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result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification

Product Status

Definition

Advance Information

Formative or In Design

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

No Identification Needed

Full Production

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

©2000 Fairchild Semiconductor International

Rev.E