FC512

FPGA Configurator

ISI - Interconnect Systems, Inc.

ISI

Copyright © 2014

Interconnect Systems, Inc.

1

FC512

FPGA Configurator

A fully-featured FPGA configuration device • 512Mb Flash + controller • Compatible with Arria 10 and Stratix V FPGAs • Fastest possible Altera FPGA configuration via FPP interface • Supports multiple FPGA bitstreams • FPGA read/write access to Flash • Supports Remote System Upgrade • USB Blaster II functionality • Integrated & validated solution simplifies system design

In a tiny BGA package

13x13mm

ISI

Copyright © 2014

Interconnect Systems, Inc.

2

FC512

FPGA Configurator

Fast FPGA configuration is often needed: • PCIe spec requires interface to be ready for training within 100ms of reset •

Fast System-On-Time is required for many embedded applications

FC512 provides the fastest FPGA configuration: •

Supports up to 32-bit wide Fast Passive Parallel (FPP) configuration bus

•

100 MHz, 400 MBytes/sec configuration speed

•

Sub-100ms configuration time for many large FPGAs

In the smallest footprint:

Package Specs • 13x13mm body size • 224 balls • 0.8mm pitch

Actual Size

ISI

Copyright © 2014

Interconnect Systems, Inc.

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FC512

FPGA Configurator

PCB Area Comparison

Discrete 32-Bit Implementation

FC512 Implementation

QSPI QSPI QSPI QSPI

FPGA 35x35

FPGA CPLD

35x35

17x17

ISI

40x40

QSPI QSPI

40x40

45x45

QSPI QSPI

45x45

FC512 13x13

Configuration Area ~ 765 mm2

Configuration Area = 169 mm2

Calculated assuming 6x8mm QSPI package & 1mm spacing between components

> 75% area reduction!

Copyright © 2014

Interconnect Systems, Inc.

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FC512

FPGA Configurator

Example: Nallatech 385 PCIe Card

Discrete Components PCB area ~ 600 mm2 16-bit bus

FC512 Twice the speed FC512

1/3 FC512 Area = 169 mm2 32-bit bus

the size ISI

Copyright © 2014

Interconnect Systems, Inc.

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FC512

FPGA Configurator

Additional Features

Flexible Flash Usage •

After FPGA configuration completes, the FPGA has read/write access to Flash

•

Remote System Update: User’s FPGA design can update Bitstreams in the flash •

Qsys IP provided for easy flash-memory mapping into user application

•

Multiple bitstreams support updating without risk of bricking device

•

Excess memory can be used for non-volatile user purposes

•

Supports soft reconfiguration with user-selectable bitstream

•

The same dedicated FPP configuration pins are re-used for FPGA flash access • No additional FPGA pins are required

• ISI can provide units pre-programmed with customer-specific bitstream(s)

ISI

Copyright © 2014

Interconnect Systems, Inc.

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FC512

FPGA Configurator

Additional Features

USB Blaster II – Integrated IP On-card USB development, debug and programming port •

Eliminates need for external USB pod, while providing 8X faster interface than standard USB Blaster

•

Provides ability to program internal flash with new images directly from Altera Quartus Programmer tools Enables Signal Tap debug

•

Provides command shell access to NIOS processors

•

ISI provides reference schematic including companion Cypress USB controller

ISI

•

Copyright © 2014

Interconnect Systems, Inc.

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FC512

FPGA Configurator

Typical Implementation

1.8V

3.3V USB

VINT

VCCPGM VCCPT

VCCIO2 VCCIO1

ARRIA 10

FC512A2 CYPRESS uC

VCCIO_2A

CONF_DONE nSTATUS nCONFIG DATA[0:31] DCLK JTAG nCE

OSC

* Contact ISI for Block Diagram for Stratix V Implementation * Wiring shown for configuration including integrated USB Blaster II

Full Technical Support • Experienced tech support resources with direct design experience available to assist with your design ISI

Copyright © 2014

Interconnect Systems, Inc.

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FC512

FPGA Configurator

Ordering Information

Part Numbering Diagram ORDERING INFORMATION

Contact ISI for information for additional planned speed grade and operating temp options

ISI

Copyright © 2014

Interconnect Systems, Inc.

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Summary and Contact Information

FC512

 Complete Configuration Solution in a Single BGA Package  32-bit Config Bus Provides Fastest Possible Configuration Time  Validated, Integrated Device Simplifies User’s System Design

Thank you for your interest! Please contact ISI to discuss your application: Regional Sales Managers:

Dave Gagnon [email protected]

Western US & CAN, Central & South America

Ken Roberson [email protected]

Eastern US & CAN

Craig Petrie [email protected]

Europe/Asia/Middle East

Technical Marketing Engineer: John Moore [email protected] Product Datasheet is available at www.isipkg.com/fc512 ISI

Copyright © 2014

Interconnect Systems, Inc.

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