IET Power Electronics Research Article

Extended maximum boost control scheme based on single-phase modulator for three-phase Z-source inverter

ISSN 1755-4535 Received on 16th February 2015 Revised on 22nd July 2015 Accepted on 10th August 2015 doi: 10.1049/iet-pel.2015.0124 www.ietdl.org

Nassereddine Sabeur 1, Saad Mekhilef 1 ✉, Ammar Masaoud 2 1

Power Electronics and Renewable Energy Research Laboratory (PEARL), Department of Electrical Engineering, University of Malaya, Kuala Lumpur, Malaysia 2 Department of Electrical and Computer Engineering, Curtin University (Sarawak), Miri, Malaysia ✉ E-mail: [email protected]

Abstract: This study proposes a new control method for Z-source inverter (ZSI) – called the one-dimension ZSI (ODZSI) – based on the single-phase modulator technique. The notable feature of the proposed control compared with the spacevector modulation strategy is its reduced computational processing time, which is attractive for digital implementation. Compared with the maximum boost control (MBC), which uses carrier-based pulse width modulation control methods, the proposed algorithm enhances the output voltage and current quality. In this study, the results of MBC are compared with those obtained with a single-phase modulator for three-phase ZSI showing its advantage for improving the line output current and voltage total harmonic distortion. The obtained simulation and hardware results ensure the feasibility and validate the performance of the ODZSI modulation method applied to each phase. The proposed method is easier for digital implementation with less computation, and will be beneficial for further industrial applications of ZSIs. The simulation results are carried out using MATLAB/Simulink, and the hardware performance are provided and discussed.

1

Introduction

The conventional voltage source inverter (VSI) is a common circuit topology for dc/ac power conversion. The main drawback of VSI is that the maximum output voltage obtained can never exceed the dc-link voltage. To obtain an output voltage higher than the input, an additional stage of dc/dc converter is required, which increases the cost of the system and decreases the efficiency. To overcome the aforementioned disadvantages of VSI, Z-source inverter (ZSI) is introduced in [1] where a unique impedance network is coupled between the dc power source and the inverter main circuit. The obtained efficiency is higher due to the main feature of ZSI, which combines the advantages of buck/boost in one-stage power conversion. Moreover, the reliability is improved due to the inclusion of the shoot-through (ST) interval, which is not allowed in VSI because it destroys the devices. The operation of ZSI has an additional ST state to boost the dc-link voltage besides the eight switching states in conventional converters, that is, six active and two null vectors [2]. The structure of the ZSI and its equivalent circuits are depicted in Figs. 1a–c, respectively. The ZSI has gained increasing attention and has been used in several applications such as wind power generation [3, 4], photovoltaic systems [5–10] and electrical drive systems [11–13]. The basic topology of the two-level ZSI has been extended to a single- and multiple-phase three-level inverter in [14–16] with carefully inserted ST to achieve the desired output performance. Many control techniques such as carrier-based pulse width modulation (CB-PWM) and space-vector PWM (SVPWM), have been proposed for controlling ST in ZSI [17–22]. Since the ZSI was proposed in 2003, considerable work has been done on this subject, especially for the PWM control methods. There are four different control methods for ZSI: namely, the simple boost control (SBC) [17], the maximum boost control (MBC) [18], the maximum constant boost control [19] and the

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modified SV modulation boost control methods [23], which were compared in [24, 25]. The MBC using carrier-based achieves the highest voltage gain by maximising the ST interval time; it turns all traditional zero states into the ST state while keeping the six active states unchanged, thus, minimising the voltage stress across the switches. The variable ST time produces a low-frequency ripple in the inductor current and the capacitor voltage. The sketch map of this control is depicted in Fig. 2. On the other hand, the maximum constant boost control achieves a maximum boost factor while keeping the ST duty ratio constant, which eliminates the low-frequency harmonic component in the impedance-source network. However, the voltage stress is relatively higher due to the presence of null vectors (000) and (111). The √

range of the modulation index is extended from 1 to 2/ 3 by injecting a third-harmonic component with 1/6 of the fundamental component magnitude to the three-phase-voltage references. A detailed comparison of four (space vector modulations (ZSVMs)) SV modulations for the three-phase Z-source/quasi-ZSI and SBC is carried out in [26, 27], the results of which show that (ZSVMs) achieve a higher dc-link voltage utilisation compared with the SBC. A good summary and review of all the topologies and switching control types proposed for Z-source converters so far were provided by Siwakoti et al. [28, 29]. The voltage SV and flow diagram for implementing the SVPWM-based MBC (SV-MBC) strategy in [21] is shown in Fig. 3. It can be clearly seen that the procedure is too complex due to the difficulty in determining the location of the reference, the calculation of the ON-times for each vector in every sector and the determination and selection of the switching states. The aim of this paper is to present a new time-domain duty-cycle computation technique called one-dimension ZSI (ODZSI). This is based on a single-phase modulator that has been adapted to generate the ST pulses, thereby showing its conceptual simplicity and its very low computational cost

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Fig. 1 Structure of the ZSI and its equivalent circuits a Basic topology of ZSI b Equivalent circuit of ZSI during ST state c Equivalent circuit of ZSI during non-ST states

Fig. 2 CB-PWM strategy for MBC

compared with SV strategies that have become one of the most important modulation techniques for three-phase converters due to their easy digital implantation and wide linear modulation range [30]. The obtained simulation and hardware results demonstrate that the ODZSI applied to each phase are similar to the conventional techniques and advantageously enhance the output voltage and current quality.

2

Proposed ODZSI

The principle of the method in [31] can also be used to develop a high switching frequency modulation technique for the ZSI. The OD modulation technique is based on the generation of the reference line-to-ground voltage as an average of the nearest voltage levels. The single-phase modulation problem is reduced to very simple calculations, which can easily

Fig. 3 Voltage SV and flow diagram a SV for ZSIs b Flow diagram for SV-MBC strategy

determine the switching sequence (formed by two switching states) and the corresponding switching times [32, 33]. To derive the relationship between the reference inverter line-to-ground voltages VXg_ref and inverter switching states Sx, the volt–second balancing principle is implemented, as shown in Fig. 4. For a given reference inverter line-to-ground voltage Vxg_ref, this reference voltage can be generated by the two nearest sequent

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Fig. 4 Vag_ref, Vbg_ref and Vcg_ref generated by two nearest voltage levels

voltage levels as Table 1 Switching states for a three-phase legs ZSI controlled by ODZSI Switching state

S1

S2

S3

S4

S5

S6

null (000) → ST active (100) active (110) active (010) active (011) active (001) active (101) null (111) → ST

1 1 1 0 0 0 1 1

1 0 0 1 1 1 0 1

1 0 1 1 1 0 0 1

1 1 0 0 0 1 1 1

1 0 0 0 1 1 1 1

1 1 1 1 0 0 0 1

Fig. 6 Simulation and experimental results a Hardware prototype b Control block diagram

Table 2 Simulation model parameters of the ZSI Parameters

Value

desired output line-to-line voltage VLL (rms) Z-source inductances (L1 and L2) Z-source capacitances (C1 and C2) switching frequency ac load inductance ac load resistance

60 V 1 mH 1.2 mF 10 kHz 1.3 mH 9.3 Ω

Substitution of (3) in (2) yields  T2 = Ts ×

Vxg ref − Sx Vdc

 (4)

The switching state of phase x (Sx) is determined using the integer function integer (INT) that returns the nearest INT less than or equal to its argument  Sx = INT Fig. 5 Proposed ODZSI strategy for MBC

· T s = V1 · T 1 + V2 · T 2

(1)

· Ts = Sx∗ Vdc · T1 + (Sx + 1) · Vdc · T2

(2)

Vxg Vxg

ref

ref

where x denotes phases a, b or c and Ts = T1 + T2

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(3)

Vxg ref Vdc

 (5)

With the switching state of phase x (Sph−x) and its dwell times T1 and T2 are calculated (Sph−x = Sx during T1 and Sph−x = Sx + 1 during T2), the next step is to generate the ZSI switching pulses. The ST is introduced when the switching state Sph−a = Sph−b = Sph−c = 1 or Sph−a = Sph−b = Sph−c = 0 where all zero states are turned to ST state by turning on the upper and bottom switches simultaneously without affecting the active vectors. Table 1 lists the switching states for a three-phase legs ZSI controlled by the proposed algorithm. To increase the range of the modulation index M, the third-harmonic injection can be used here. The operation principle of the proposed high switching modulation technique method for ZSI is illustrated in Fig. 5.

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3

Simulation and experimental results

To verify the validity and feasibility of the proposed control strategy, simulation and experiments have been performed using a laboratory prototype, as shown in Fig. 6. The three-phase ZSI hardware is built using the parameters summarised in Table 2.

The aim of the prototype is to compare the performance of the proposed control algorithm for ZSI under different input voltages to obtain the same output line-to-line VLL voltage of about 60 V [root mean square (rms)]. The simulation results with modulation index values M = 0.9, 1.1 and 1.15 are plotted in Figs. 7–9 where the corresponding input dc voltage sources (Vdc) are 60, 72 and 76.5 V, respectively.

Fig. 7 Simulation waveforms for M = 0.9 and Vdc = 60 V a Vdc (top) and Vin (bottom) b Inverter VLL (top) and VPh (bottom) voltages c IL

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Fig. 8 Simulation waveforms for M = 1.1 and Vdc = 60 V a 72 V (top) and Vin (bottom) b Inverter VLL (top) and VPh (bottom) voltages c IL

The simulation waveforms of the inverter dc-link (Vin) and the Vdc are depicted in Figs. 7a–9a where the corresponding modulation index values are M = 0.9, 1.1 and 1.15, respectively. Moreover, Figs. 7b–9b show the simulation waveforms of the inverter line-to-line VLL (top) and line-to-neutral Vph (bottom) voltages and the last part (c) shows the output line current IL. It can be clearly seen that the controller manages to generate the appropriate switching gate signals that lead the inverter to output the desired waveform. Table 3 summarises the obtained results. The experimental results obtained under the same operation parameters and the same laboratory prototype as in the

IET Power Electron., 2016, Vol. 9, Iss. 4, pp. 669–679 & The Institution of Engineering and Technology 2016

simulation are illustrated in Figs. 10–12 at different modulation index values M = 0.9, 1.1 and 1.15, respectively. Each figure shows the waveform of Vin and Vdc in figure part (a), the ac output VLL voltage (top) and the Vph are illustrated in figure part (b), and the last two figure parts (c and d) depict the ac output current and total harmonic distortion (THD) spectrum, respectively. The THD graph contains the fundamental frequency component of about 60 V followed by 19 harmonics components. It can be clearly seen that there is a great matching between the proposed and conventional methods. Moreover, the experimental and simulation results match very

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Fig. 9 Simulation waveforms for M = 1.15 and Vdc = 76.5 V a Vdc (top) and Vin (bottom) b Inverter VLL (top) and VPh (bottom) voltages c IL

Table 3 Summary of obtained experimental results under different conditions Vdc

M

VLL (rms), V

60 72 76.5

0.9 1.1 1.15

60.78 59.45 59.93

well, which verify the performance of the proposed control algorithm. The variation of THD with the modulation index for the inverter VLL voltage is depicted in Figs. 13 and 14. This illustrates that THD is inversely proportional to the modulation index M. In other words, a lower THD in the output voltage is experienced at a higher modulation index. The graph compares the THD of the VLL voltage for the proposed algorithm and CB-PWM within a range

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Fig. 10 Experimental waveforms for M = 0.9 (Vdc = 60 V and VLL(rms) = 60.78 V) a Vin (top) and Vdc (bottom) b Inverter VLL (top) and VPh (bottom) voltages c IL d THD spectrum

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Fig. 11 Experimental waveforms for M = 1.1 (Vdc = 72 V and VLL(rms) = 59.45 V) a Vin (top) and Vdc (bottom) b Inverter VLL (top) and VPh (bottom) voltages c IL d THD spectrum

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Fig. 12 Experimental waveforms for M = 1.15 (Vdc = 76.5 V and VLL(rms) = 59.93 V) a Vin (top) and Vdc (bottom) b Inverter VLL (top) and VPh (bottom) voltages c IL d THD spectrum

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Table 4 Comparison between the proposed ODZSI and CB-PWM

line current harmonic, % VLL(THD), % VLL (rms), V

Fig. 13 VLL(THD) versus M for MBC

ODZSI

CB-PWM

11.86 26.31 59.45

16.02 35.46 59.39

of modulation indices [0.9–1.15]. It can be seen that the THD using ODZSI is about 10% less than the conventional technique, which augments the output voltage quality. Table 4 summarises the obtained results for Vdc = 72 and M = 1.1.

4

Conclusion

In this paper, a new control method has been presented based on the single-phase modulator to obtain the maximum voltage gain of the ZSI. The ST period is maximised by turning all zero states into the ST state, whereas the active state remains unchanged. The results obtained show that the proposed control strategy achieves the same performance compared with CB-PWM for the ZSI and minimises the line voltage and current THD. Simulations using MATLAB/Simulink and experiment were carried out to demonstrate the validity and feasibility of the proposed control algorithm under different modulation index values.

5

Acknowledgments

The authors would like to acknowledge the financial support from the Ministry of Higher Education (MoHE), Malaysia, through the UM High Impact Research Grant UM-MOHE UM.C/HIR/MOHE/ENG/17 and UMRG project No. RP015D-13AET.

6

Fig. 14 VLL(THD) at M = 0.9, 1.1 and 1.15, respectively, using CB-PWM

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