EXPERMENT NUMBER (1) LOGIC GATES AND BOOLEAN ALGEBRA

University of Technology Department of Electrical and Electronic Engineering Digital Techniques Laboratory First Year EXPERMENT NUMBER (1) LOGIC GAT...
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University of Technology Department of Electrical and Electronic Engineering

Digital Techniques Laboratory First Year

EXPERMENT NUMBER (1) LOGIC GATES AND BOOLEAN ALGEBRA OBJECT: After completing this experiment, you will be able to: 1- Use TTL logic to verify experimentally several of rules for Boolean algebra. 2- Experimentally determine the truth table for circuits with two input variables. THEORY: In analog circuits many different voltages may exist at the same time, whereas in digital circuits there are only two. These two voltages are referred to as logic 1 and logic 0 states, as true and false or by some other similar name. Because of the use of only two states, digital logic is said to be binary in nature. In digital logic there are three basic elements: The AND gate, the OR gate, and Inverter (NOT gate). What the do is very simple but it is essential that you under stand them by inter connecting a number of these gates into circuits, they can perform various increasingly complex functions such as addition of two numbers, counting, multiplication or division of any two numbers, keeping the time of day, and even running a whole computer. To learn their characteristics and the simple short and methods by which their functions can be described, the two gates and the inverter will be studied separately. 1- The AND Gate : The AND gate is a device whose output is a logic 1 if both of its inputs are logic 1. If any one of the inputs is a 0, the output will be a 0.This gate is shown by a symbol in Fig. (1-1). Where the two inputs are 1-1

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on the left, marked A and B, and the output is on the right, marked C. The truth table is shown in Table (1-1) and the logic equation is C = A.B.

A B

C

Fig. (1-1) The AND logic gate symbol.

Table (1-1) Truth table for AND gate A

B

C

0 0 1 1

0 1 0 1

0 0 0 1

2-The OR Gate: The OR gate is a device whose

output is a logic 1 if either one or

both its inputs are logic 1. The OR gate is shown by symbol in Fig. (1-2) with the two inputs A and B again on the left and the output C on the right. The truth table for OR gate is shown in Table (1-2) and the logic equation is C = A + B.

A B

C

Fig. (1-2) OR logic gate symbol.

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Digital Techniques Laboratory First Year

Table (1-2) Truth table for OR gate. A

B

C

0 0 1 1

0 1 0 1

0 1 1 1

3- The Inverter: The third and most simple element of digital logic is the inverter, it is also known as the NOT function. The inverter is different from the AND and OR gates, in that it has only a single input. The inverter simply converts logic 1 at its input to logic 0 at its output and conversely, logic 0 to a 1. The inverter can be represented by either of the symbols shown in Fig. (1-3).

Fig. (1-3) The logic symbol for NOT gate.

Table (1-3) Truth table for INVERTOR A

C

0 1

1 0

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4- The NAND Gate: The NAND gate function is the complement of the AND function, as indicated by a graphic symbol which consists of an AND graphic symbol followed by a small circle (bubble) which represents the NOT gate that is shown in Fig. (1-4) and the truth table shown in Table (1-4).

A B

C

Fig. (`1-4) Logic Symbol for NAND gate

Table (1-4) Truth table for NAND gate A

B

C

0 0 1 1

0 1 0 1

1 1 1 0

5- The NOR Gate: The NOR function is the complement of the OR function and uses an OR graphic symbol followed by small circle (bubble) which represents NOT gate. That is shown in Fig. (1-5) and the truth table shown in Table (1-5).

A B

C

Fig (1-5) Logic Symbol for NOR gate.

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Table (1-5) Truth table for NOR gate A

B

C

0 0 1 1

0 1 0 1

1 0 0 0

6- The EX - OR Gate: There is one more gate that needs to be considered – The gate EX – OR which has only two inputs, shown in Fig. (1-6). The EX - OR gate has a logic high output when either of its inputs is high but not when both are high or both are low. Notice that in the logic equation we have introduced a new symbol

called EX - OR. The EX - OR gate

is quite useful, since its output is high only when the inputs are different, it's truth table shown in Table (6) the logic equation is :

C = AB + A B C =A B

A B C A B Fig. (1-6) EX - OR logic symbol and its equivalent circuit. 1-5

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Table (1-6) Truth table for EX – OR A

B

C

0 0 1 1

0 1 0 1

0 1 1 0

7- The EX-NOR Gate: Standard symbol for EX-NOR gate is shown in Fig (1-7-a). The bubble on the output indicates that its output is opposite that of the XOR gate. When the two inputs logic levels are opposite, the output is low. Fig (1-7-b) shows EX-OR gate equivalent circuit, and its truth table shown in Table (1-7)

A B

C (a)

A B C A B

(b)

Fig (1-7)

(a) EX- NOR logic symbol (b) its equivalent circuit

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Table (1-7) Truth table for EX -NOR. A

B

C

0 0 1 1

0 1 0 1

1 0 0 1

TIMING DIAGRAMS: When a logic gate is performing a useful function in a circuit, its inputs can change and its output will react to these changes according to the truth table for that gate. It is often quite useful to have a symbolic representation for these logic states, as they change with time. A convenient method for doing this is to draw a timing diagram. The main purpose of a timing diagram is to show what the conditions in a logic circuit are at any one particular time. By using timing lines, it is possible to oversee all inputs and outputs simultaneously. If any input or output line is displayed on an oscilloscope screen. A B C

(a)

A B C

(b) 1-7

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A B C

(c)

A B C

(d) Fig. (1-8) Timing diagram for logic gates. (a) Timing diagram for AND gate. (b) Timing diagram for OR gate. (c)Timing diagram for EX-OR gate. (d) Timing diagram for EX-NOR gate.

Boolean algebra consists of a set of laws that have logical relationships. Unlike ordinary algebra, where an unknown can take any value, the elements of Boolean algebra are binary variables and can have only one of two valves 1 or 0 (also called TRUE or FALSE). Variables are typically letters of the alphabet. Symbols used in Boolean algebra include the bar, which is NOT or complement, the connective + which implies logical addition and is read " OR " and the connective which implies 1-8

logical multiplication

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and is read

u

Digital Techniques Laboratory First Year

AND ". The dot is frequently eliminated when logical

multiplication is shown. Thus A.B is written AB. The basic rules of Boolean algebra are shown in Table (1-8).

Table (1-8) Basic rules of Boolean algebra 1

A +0= A

2

A+ 1 =1

3

A. 0 = 0

4

A. 1 = A

5

A+ A = A

6

A+ A =1

7

A. A = A

8

A. A = 0

9

A=A

10

A + AB = A

11

A+ AB = A+B

12

(A + B)(A + C) = A + BC

Note: -A, B, and C can represent a single variable or combination of variables

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In this experiment you will use TTL logic to become familiar with this important family. There are several subfamilies of CMOS which have different specifications. The original CMOS family was the 4000 series. Other families include the 54C / 74C family, which is functionally and pin - out - compatible with TTL 54 / 74 series, and the 54 HC / 74HC, which is functionally and pin - out - compatible with TTL 54LS / 74LS logic. The 54C / 74C series is faster and can sink 50% more current that the 4000 series. One disadvantage of CMOS is that it is damaged more easily than TTL. Because the TTL (Transistor - Transistor Logic) is the most widely used logic family. Almost every major manufacturer has a TTL product line and most common TTL integrated circuits are produced by several companies.

APPARATUS: 1.

Oscilloscope.

2.

The software Electronic Work Bench

3. Function generator. 4. Logic INTIKIT unit 5. I C ‘s

7 4 0 4 , 7 4 3 2 , 7 4 0 8 , 7 4 8 6 , 7 4 0 , 7 4 0 2 , 74266.

PROCEDURE:

Part One: Using practical connection:1- Connect the circuit shown in Fig. (1-1). 2- Apply a signal to (A) input from the first pulse generator of amplitude 4 V (P-P), f = 1KHz. Draw the wave form of input A. 3- Apply a signal to (B) input from the second pulse generator of amplitude, 4V (P-P), f = 500Hz. Draw the wave from of input B. 4- Draw the output waveform of the AND logic gate. 1-10

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5- Repeat steps (2), (3) and (4) for Fig. (1-2), Fig. (1-3), Fig. (1-4), Fig. (1-5), Fig (1-6), Fig (1-7) and draw the output waveforms for each figure. 6- Prove rule 1 (see Table 8) with the circuit of Fig. (1-9). Use 5V for the power supply, with 0V to 4V level on the output. Sketch the input signal, Vin, and voltage on your sketches. To obtain the proper time relationship between signals, look at both signals at one time on the scope while triggering on one channel only. Vin

Vout

Fig. (1-9) The OR - gate that implement rule (1)

7-Change the circuit to that of Fig. (1-10). Sketch the input and output signals. Vin

Vout

Fig. (1-10) The OR- gate that implement rule (5). 8-Connect the circuit of Fig. (1-11). Sketch the input and output signals. Which rule of this circuit illustrates? Vin

Vout

Fig. (1-11) The AND - gate that implement rule (7). 9- Design a circuit that illustrates rule 10, Use the signal generator for A and a switch (or wire) for B. Sketch the A input and output signal. 1-11

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Part Two: Simulation using Electronic Work Bench (EWB) package. 1. Connect the circuit shown in Fig. (1-1, 2, 3, 4, 5, 6, 7) by using logic gates. 2. Connect the circuit shown in Fig. (1-1, 2, 3, 4, 5, 6, 7) by using IC’s 7404, 7432, 7408, 7436, 7400, 7402 and 74266. 3. Repeat steps 1, 2 for three and four variables inputs and find the truth table. 4. Connect all Boolean Algebra rules in Table (1-8) by using gates and ICs. The following window shows the simulation of 4-inputs OR gate using (EWB) package.

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DISCUSSION: 1- Design the logic circuit for the following conditions and draw the output wave form, X is a 0 if any two of the three variables A, B, and C are 1, X is a1 for all other conditions. 2- Implement the following function with only AND and NOT gates. F=A B + A B + B C W=X Y (X Z + X Y Z + Y Z) + X Z 3- TTL SSI comes mostly in 14 - pin packages. Two pins are reserved for power supply and the other pins are used for input and output terminals. How many gates are enclosed in one such package if it contains the following types of gates:a) 2 - input exclusive - OR gates. b) 3 - input AND gates. c) 4 – input NAND gates. d) 5-input NOR gates. e) 8 - input NAND gates. 4- Use NAND gate, NOR gate, or combinations of both to implement the following expression:a) X=A [B + C (D + E)] b) X = B (CDE + E F G) (A B + C) 5 - a) What is the applications of AND gate and OR gate? b) In OR gate why 1 + 1 = 1? c) The Fig. (12 - a) shows the A & B inputs and the output is C, For the OR gate using the A and B inputs of Fig. (12 - a) draw the C output for each of the following: •

The AND gate.

• The NAND gate Fig. (12 – b). • The NOR gate Fig. (12 – c). • The negative AND gate Fig. (12 – d). 1-13

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• The negative OR gate Fig. (12 – e).

A

B

C

A B

A B

C (a)

A B

C (b)

A

C

C

B

(c)

(d) Fig. (1-12) For problem (5).

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EXPERIMENT NUMBER (2) THE APPLICATIONS OF EXCLUSIVE- OR OBJECT: The EX - OR is a widely used function because of special arithmetic properties which will be discussed below and because of its wide applications. THEORY: 1- Parity Checker: Errors can occur as digital codes are being transferred from one point to another within a digital system or while codes are being transmitted from one system to another. The errors take the form of undesired changes in the bits that make up the coded information that is, a 1 can change to a 0 or a 0 to 1, due to component malfunctions or electrical noise. If we have four bit word, to detect the occurrence of an odd number of errors in this word, a single bit will be added to the word that makes the number of (ones) in the word either even number (even parity) or odd number (odd parity), so, if an odd number of errors occurred in the word, then, the total number of ones will not remain the same, it will change from odd to even or from even to odd. The EX - OR gate is the most suitable circuit to provide parity checker. Fig. (2-1) shown the circuit of four bit even parity checker. A B X C D

L=even parity bit H=odd parity bit

Fig. (2-1) Four bit parity checker. 2-1

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2- Control Inverter: The EX - OR gate can be used as a (NOT) gate by connecting one of the inputs to logic 1, for this reason it can be used to complement a word by using one of the inputs as control line as shown in Fig. (2-2). When the control signal is logic zero then X=A, Y= B, Z=C, and when control signal is logic one then

X= A, Y= B, Z= C

A

B

C Control signal

x

y

z

Fig. (2-2) Control inverter logic circuit. 3- Binary to Gray / Gray to Binary Conversion: U

The Gray code is widely used in many digital systems specially in shaft encoders and analog to digital converter, but it is very difficult to use the Gray –code in arithmetic operations, since there are only one bit change between any two consecutive Gray code number, and it is un-weighted code and the EX-OR gate is the most suitable gate for this purpose as shown in Fig (2-3). X1

X2

X3

X4 Gray code

Binary code A

C

B

D

MSB

A

X1

B

C

D

X2

X3

X4

Binary code

Gray code

MSB

(a)

(b)

Fig. (2-3) (a) Gray to Binary convertor. (b) Binary to Gray convertor.

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4- Digital Comparator: The basic function of comparator is to compare the magnitude of two quantities in order to determine the relationship of those quantities. In its simplest form, a comparator circuit determines if two numbers are equal. The EX-OR gate is a basic comparator because its output is a 1 if its two input bits are not equal and a 0 if the inputs are equal. If the comparison is such that the states of one number with respect to the other is to be specified one of the three conditions A > B, A< B, and A = B.

Table (2-1) Comparator of two numbers one bit each. A B

A>B

A