EE 1205 Introduction to Electrical Engineering Lab Manual Howard T. Russell, Jr., PhD V 1.3 August 26, 2012 © 2010 OPALtx
Electrical Engineering Department
University of Texas at Arlington
EE 1205 Introduction to Electrical Engineering Lab Manual V 1.3 August 26, 2012 © 2010 OPALtx Table of Contents Lab Meeting No. 1
Introduction to EE Labs …………………………………………..2
Lab Experiment No. 1
Resistors and Resistor Color Bands .............................................30
Lab Experiment No. 2
Resistor Connections …..………………………………………..32
Lab Experiment No. 3
Ohm’s Law ……………………………………………………...42
Lab Experiment No. 4
Kirchhoff’s Laws ……………………………………………….49
Lab Experiment No. 5
Voltage and Current Maps .……………………………………..59
Lab Experiment No. 6
Network Theorems – Part 1 ……………………………………..68
Lab Experiment No. 7
Cooling Fan Control Circuit ……………………………………..79
Lab Experiment No. 8
Audio Amplifier Networks .……………………………………..84
Appendix 1
Breadboard Layout Examples ………….………………………..86
Appendix 2
Lab Measurement Example …………….………………………..90
Appendix 3
Bills of Material …………….………….………………………..96
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Lab Meeting No. 1
Introduction to EE labs
I. Introduction The objective of this first lab meeting is to introduce beginning EE students to a professional laboratory environment where electronic circuits are built and electrical engineering experiments performed. The following topics will be addressed in this introductory meeting – • an orientation regarding proper behavior and safety while in the lab, • tools and tool box requirements, • lab instruments, • cables, connectors, probes, and wires, • electronic components, parts, and the parts request form, • lab report format, • useful web sites, and • lab rules. II. Lab Orientation All EE 1205 students are required to attend an orientation regarding proper behavior and safety while in the lab. This orientation is presented by the resident lab technicians who are responsible for the maintenance and up-keep of the EE labs in Nedderman Hall. III. Tools and Tool Box (Attachment A) Basic items such as pliers, cutters, and wire strippers are integral components in any electrical engineer’s tool box. These tools are necessary to build circuits and perform experiments in the EE lab. Therefore, it is a mandatory requirement that all EE 1205 students obtain and maintain a tool box containing a set of electrical engineering specific tools. The tool box requirement is not an option and all students must bring their tool box fully loaded to every lab meeting beginning with the second meeting. Students without a tool box on the second and subsequent lab meetings will not be allowed in the lab and will receive a zero for the lab. A list of these tools along with their photographs is included in Attachment A at the end of this document. IV. Lab Instruments (Attachment B) The electrical engineering labs located in rooms NH129, NH129A, NH148, and NH148A are equipped with the most current industry standard test and measurement equipment found in professional electrical engineering companies. Each lab is divided into a series of lab benches with each bench containing the following instruments – • Agilent 34401A 6½ digit multimeter (DMM), • Agilent E3620A dual dc power supply (25V, 1A), • Agilent 54621A 60MHz dual channel oscilloscope, and • Agilent 33120A 15MHz function generator. Most of the experiments performed in EE 1205 will involve the above mentioned instruments to some degree. Data sheets for these instruments are included in Attachment B. V. Cables, Connectors, Probes, and Wires Each lab is equipped with one or more wall-mounted racks containing a variety of cables, connectors, oscilloscope probes, and wires. These connectors provide the necessary electrical connections among the bench instruments and your circuits. VI. Electronic Components, Parts, and the Parts Request Form (Attachment C) A wide assortment of electronic components and parts are available in the EE lab. An extensive list of components and parts can be found on the lab web site www-ee.uta.edu/eelabs2/. Click on ‘parts available’ for a view of the list. The experiments performed in EE 1205 labs involve the use of parts supplied by the lab GTA. In more advanced courses, students will have to order their own parts through the lab by submitting an online parts request form. A copy of this form is shown in Attachment C. Most of the parts listed on the lab web site are considered disposable. This means that once parts are given to the student, the student is allowed to keep and accumulate them. For parts not on the list, a formal written request for these parts may be submitted along with instructor approval to lab personnel. VII. Lab Report Format (Attachment D) Formal lab reports are due typically within one week after each lab experiment. Exceptions are made for more complex and/or extensive lab experiments. The format for lab reports is outlined below. - 2 -
• Title Page. Every lab report begins with a title page. This page includes the course and section number, experiment number, experiment title, date the experiment was performed, date the report submitted, and student name and ID number. A sample of the EE 1205 lab report cover page is included in Attachment D. • Introduction. A brief description of the purpose of the lab and a discussion of key information the reader will need to understand the experiment. Give a brief description of the theory the experiment is based upon. • Procedure. Describe how the experiment was performed. List equipment, instruments, and components used in the experiment. Include the theory, equations, and detailed schematics of circuits involved. • Results. Present the results of the experiment with data collected from measurements performed. Data should be professionally and neatly presented in the form of tables, graphs, and plots. • Discussions. Discuss any new ideas and/or questions produced in the experimental process. Comment on the validity, accuracy, and usefulness of the procedure. • Conclusion. A description of what the experiment revealed. Generate a comparison between the expected results based on theory and the actual results. An attempt should be made here to explain any discrepancies between these results. • Appendix. The appendix should contain actual compiled data, notes and comments, equations, sketches, and schematics made during the experiment. • References. List any material contributed from other sources. VIII. Useful Web Sites Mouser Electronics Jameco Electronics Marlin P. Jones & Associates, Inc. Electronics Express/RSR Nuts and Volts (magazine)
www.mouser.com www.jameco.com www.mpja.com www.elexp.com www.nutsvolts.com
IX. Lab Rules 1. Regardless of the lab section, student attendance in all EE 1205 labs is mandatory and not an option. You must attend each and every lab meeting for the entire time the lab is scheduled to be in session. 2. As indication of your attendance, you must sign and write the time of day on the lab attendance sheet provided at the beginning of each lab. If your signature and time stamp are not on the attendance sheet, you are considered to be absent and not in attendance for that lab meeting. 3. Do not sign for your lab partner(s) if they are not in attendance. 4. You must bring your tool box containing all required tools to each and every lab meeting. This is mandatory and not an option. The presence of your tool box will be checked off on the lab attendance sheet by the lab instructor or GTA. If you are in the lab without your tool box, you are considered to be absent and not in attendance for that lab meeting. 5. You are responsible for obtaining and applying data sheets for any and all components used in the lab experiments. 6. It is mandatory that the circuits you build and layout for the lab experiments work and perform as designed. This is not an option. You are responsible for trouble shooting your circuits and correcting any problems that cause them not to work. 7. Lab partners are well-advised to divide all tasks involved in lab experiments in an equal manner in order to gain experience in performing these tasks. For example, swap breadboard layout and measurement tasks so each partner becomes equally familiar with these jobs. 8. Formal lab reports are due on the date indicated. Reports submitted after the due date are considered late. Any late lab reports will not be counted in your lab grade. 9. A hands-on lab examination will be given at the end of the semester. This exam will be given to each student on a one-to-one basis with the instructor and/or GTA. The exam will test your ability and skills to • read a schematic diagram, • build a circuit on a breadboard, • measure voltage, current, and resistance, and • properly use and apply lab equipment. 10. Performance on the lab exam along with lab attendance and tool box is counted in the total lab grade. 11. If necessary, exceptions, additions, modifications, inclusions, and details to these and all other lab rules will be provided prior to or during the lab.
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Attachment A Tools and the Tool Box August 2, 2009 Component
Example Brand
Example Source
Suitable container (all-purpose plastic tool box; fishing tackle box)
Keter (13” all-purpose box)
Wal-Mart
3.64
Needle nose pliers (4” to 5”) (Figure 1)
Stanley (mini plier set)
Wal-Mart
12.88 (set of 6)
Diagonal cutters (4” to 5”) (Figure 2)
Stanley (mini plier set)
Wal-Mart
Wire strippers (5”) (Figure 3) Prototype breadboard (6.5” x 2” to 6.5” x 4” with 3 to 5 binding posts) (Figures 4 and 5) Precision screwdriver set (6 to 11 piece set with slotted and Phillips screwdrivers) (Figure 6) 22 gauge solid hook-up wire (Figure 7)
H-Tools (cutter and stripper, 34-899C) Elenco (Model 9425, 6.5” x 2”, 830 test points)
Fry’s
3.49
Fry’s
9.99
Stanley (6 piece; 4 slotted, 2 Phillips)
Wal-Mart
4.88
Fry’s product number: PLU#1615281
Fry’s
2.99 Tax: Total:
Photos
Figure 1 5” needle-nose pliers
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Price ($)
3.09 40.96
Figure 2 5” diagonal cutters
Figure 3 Wire strippers
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Figure 4 Three binding post breadboard
Figure 5 Three binding post breadboard
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Figure 6 Screwdriver set
Figure 7 22 gauge wire
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Attachment B
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Attachment C
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Attachment D
EE 1205.002 Lab Experiment 2 Resistors and Resistor Color Bands
Date experiment performed:
June 7, 2010
Date Lab Report submitted:
June 14, 2010
Student name:
Howard T. Russell, Jr.
Student ID:
1000xxxxxxxxx
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Lab Experiment No. 1
Resistors and Resistor Color Bands
I. Introduction Resistors are the most common of electronic components found in many circuits and systems. This lab experiment is designed • to sharpen your skill at reading specified values and tolerances from resistor color bands, and • to introduce you into taking resistor measurements using the DMM. II. Experiment Procedure The lab GTA will give you a numbered plastic bag containing 8 quarter-watt axial-lead (through-hole) metal film resistors of various values and tolerances. Your task is to record the number of your bag at the top of Table 1 shown in Section IV on the following page, and complete the entries in this Table using the resistor color guide and the DMM on the work bench. The procedure for this job is as follows – (a) using only the resistor color guide, fill out columns 2 through 9 for each resistor’s specified value and tolerance; show your results to the lab GTA before turning on the DMM, (b) power up the DMM and measure the actual resistance of each corresponding resistor; record these values in column 10 of the Table, (c) compute the error in percent (%) between the color band value and the measured value for each corresponding resistor; record these errors in column 11; use the color band or specified value as the basis for the percent, that is Error ( % ) =
Measured value − Color band value ⋅100% Color band value
(1)
(d) when you have finished reading color bands and taking measurements, return the bag of resistors to the GTA. The first two rows in Table 1 illustrate an example of the procedure on two resistors Ra and Rb. Resistor Ra in the first row has 4 color bands with colors green (5), brown (1), orange (3), and gold (±5%). The specified value of this resistor is determined from Ra = 5N
1N
000 N Ω = 51K Ω
(2)
green brown orange
with a tolerance of ±5%. However, its value measured with the DMM is 50.5KΩ as is recorded in column 10. The error between its measured and specified values is computed from equation (1) where Error ( % ) =
50.5 K Ω − 51K Ω ⋅100% ≅ −0.98% 51K Ω
(3)
This error is recorded in last column as indicated. The procedure is repeated on resistor Rb which has 5 color bands. The second row of Table 1 contains values for this resistor. Clearly, the differences between the specified and measured values for both resistors are well within specified tolerances. III. Lab Report The report for this lab experiment must be word-processed and contain the following items – • Title Page. • Introduction. • Procedure. • Results. Table 1 neatly and completely filled out with the results of your readings, measurements, and calculations. • Discussions. Provide detailed answers and discussions to the following questions – (a) Are the calculated errors between specified and measured values within specified tolerances? If not, explain why not. (b) How many resistors had measured values larger than their specified values? (c) How many resistors had measured values smaller than their specified values? (d) Explain reasons for the discrepancies in (b) and (c).
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•
Conclusion. Provide detailed answers and discussions to the following questions – (a) In your opinion, is the color band coding of resistors an efficient means of labeling values on quarter-watt axial-lead resistors? (b) Is this coding method suitable for ⅛ watt or smaller axial-lead resistors? Explain why or why not. (c) What other methods can be used? Explain in detail advantages and disadvantages. Appendix. References.
• • IV.
Resistor Data Table 1 Axial-lead resistor values Bag No.________ Color band
1
2
3
4
5
Color band value (Ω)
Color band tolerance (%)
Measured value (Ω)
Error (%)
R
Bands
Ra*
4
green
brown
orange
gold
N/A
51K
±5
50.5K
-0.98
Rb*
5
red
orange
violet
red
brown
23.7K
±1
23.8K
+0.42
R1 R2 R3 R4 R5 R6 R7 R8 *Resistor examples
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Lab Experiment No. 2
Resistor Connections
I. Introduction In this lab exercise, you will learn – • how to read schematic diagrams of electronic networks, • how to transform schematics into actual element connections, • correct ways to layout a breadboard connection of a network, • how to connect the DMM for measuring resistance, and • how to combine resistors to establish terminal equivalence. II. Experiment Procedure A collection of resistive networks are given in Figures 1 through 6. The schematic diagram of the network is shown in (a) while the resistor connection is shown in (b) in each Figure. Obtain from the lab GTA all of the resistors required for these experiments. Use these resistors to correctly layout each of these networks on your breadboard. Apply the bench DMM to take measurements and make calculations required to fill out the tables provided with each network. Use specified and calculated values as the basis for percentage variations. (a) Series connection. A series connection of resistors is shown in Figure 1. The schematic diagram of this connection is shown in Figure 1(a) while the actual resistor connection is shown in Figure 1(b). Fill out Table 1 with data obtained below. i. Measure the resistance of each resistor in the series connection. ii. With the specified resistor value as the basis, calculate resistor variations in per-cent (%). iii. Calculate the value of the resistance at the terminals A-B. This is the terminal resistance RAB. iv. Apply the DMM to measure RAB. v. Calculate the variation in RAB in (%). (b) Parallel connection. A parallel connection of resistors is shown in Figure 2. The schematic diagram of this connection is shown in Figure 2(a) while actual resistor connection is shown in Figure 2(b). Fill out Table 2 with data obtained below. i. Measure the resistance of each resistor in the parallel connection. ii. With the specified resistor value as the basis, calculate resistor variations in per-cent (%). iii. Calculate the value of the resistance at the terminals A-B. This is the terminal resistance RAB. iv. Apply the DMM to measure RAB. v. Calculate the variation in RAB in (%). (c) Series/parallel combination. A series connection of parallel resistors is shown in Figure 3. The schematic diagram of this connection is shown in Figure 3(a) while the actual resistor connection is shown in Figure 3(b). Fill out Table 3 with data obtained below. i. Measure the resistance of each resistor in the connection. ii. With the specified resistor value as the basis, calculate resistor variations in per-cent (%). iii. Calculate the value of the resistor Rx that will produce a terminal resistance RAB of 84Ω. iv. Obtain this resistor from the lab GTA and connect it into the network. v. Apply the DMM to measure RAB. vi. Calculate the variation in RAB from 84Ω in (%). (d) Parallel/series combination. A parallel connection of series resistors is shown in Figure 4. The schematic diagram of this connection is shown in Figure 4(a) while the actual resistor connection is shown in Figure 4(b). Fill out Table 4 with data obtained below. i. Measure the resistance of each resistor in the connection. ii. With the specified resistor value as the basis, calculate resistor variations in per-cent (%). iii. Calculate the value of the resistor Rx that will produce a terminal resistance RAB of 1.83KΩ. iv. Obtain this resistor from the lab GTA and connect it into the network. v. Apply the DMM to measure RAB. vi. Calculate the variation in RAB from 1.42KΩ in (%). (e) Combination 1 (Combo 1) connection. A combination connection of resistors in series and parallel is shown in Figure 5. The schematic diagram of this connection is shown in Figure 5(a) while the actual resistor connection is shown in Figures 5(b). Fill out Table 5 with data obtained below. - 32 -
i. ii. iii. iv. v.
Measure the resistance of each resistor in the connection. With the specified resistor value as the basis, calculate the resistor variation in per-cent (%). Calculate the value of the resistance at the terminals A-B. This is the terminal resistance RAB. Apply the DMM to measure RAB. Calculate the variation in RAB in (%).
(f) Combination 2 (Combo 2) connection. Yet another combination connection of resistors in series and parallel is shown in Figure 6. The schematic diagram of this connection is shown in Figure 6(a) while the actual resistor connection is shown in Figures 6(b). Fill out Table 6 with data obtained below. i. Measure the resistance of each resistor in the connection. ii. With the specified resistor value as the basis, calculate the resistor variation in per-cent (%). iii. Calculate the value of the resistance at the terminals A-B. This is the terminal resistance RAB. iv. Apply the DMM to measure RAB. v. Calculate the variation in RAB in (%). III. Lab Report The report for this lab experiment must be word-processed and contain the following items – • Title Page. • Introduction. • Procedure. • Results. • Discussions. (a) Suggest useful applications for the connections studied in this experiment. • Conclusion. Provide detailed comments and discussions on the items listed below for each resistor network. (a) Are all resistors within tolerance? List those that are not. (b) Account for the difference between measured RAB and calculated RAB (that is, the calculated variation or tolerance of RAB). (c) Explain how the variation in RAB corresponds to resistor tolerance. (d) Explain how close the calculated values of Rx in the series/parallel and parallel/series connections are to standard resistor values. Consider resistor tolerance. • Appendix. • References.
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Series Connection 1 R1
1
R2
A 3.9KΩ
A
2
R1
2 R2
2KΩ R3
RAB 8.2KΩ
5.1KΩ
RAB
R3
1.2KΩ
B 4
R5
R4
3
B
R5
R4 4
(a)
(b)
Figure 1 (a) Schematic for the series connection (b) Component connection diagram Table 1 Series connection Resistor (Ri)
Specified value (Ω)
R1
3.9K
R2
2K
R3
5.1K
R4
1.2K
R5
8.2K
Terminal resistance
Calculated value (Ω)
Measured value (Ω)
Variation (%)
Measured value (Ω)
Variation (%)
RAB
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3
Parallel Connection A A R1
R2
R4
R3
R5
RAB
RAB 10KΩ
7.5KΩ
15KΩ
3.3KΩ
R1
R2
R3
2.2KΩ
B B
(a)
(b)
Figure 2 (a) Schematic for the parallel connection (b) Component connection diagram Table 2 Parallel connection Resistor (Ri)
Specified value (Ω)
R1
10K
R2
7.5K
R3
15K
R4
3.3K
R5
2.2K
Terminal resistance
Calculated value (Ω)
Measured value (Ω)
Variation (%)
Measured value (Ω)
Variation (%)
RAB
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R4
R5
Series/Parallel Connection R6
R1 15Ω
Rx A
2
R3
75Ω
30Ω
62Ω
R4
R6 R3 R1
R7
3
1
A 12Ω R2
27Ω
82Ω
56Ω
R8
RAB
Rx
R7 2
1 R2
R9
B
(b)
(a)
Figure 3 (a) Schematic for the series/parallel connection (b) Component connection diagram Table 3 Series/parallel connection Resistor (Ri)
Specified value (Ω)
R1
15
R2
12
R3
30
R4
27
R5
56
R6
75
R7
62
R8
82
R9
91
Measured value (Ω)
Variation (%)
Measured value (Ω)
Variation (%)
Rx Terminal resistance
Specified value (Ω)
RAB
84
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R8
R9
91Ω
B
3
R5
RAB R5
R4
Parallel/Series Connection
R6
R6
7.5KΩ
4
R3 A
R3
R1
A
RAB B
4
3.0KΩ
R1 Rx
1.5KΩ
2
1
2.7KΩ
5
3
8.2KΩ
R4
1.2KΩ
R2
2
R8
RAB
1
Rx
5
R4
R2 R5
R7
6.2KΩ
R7
3
R8
6
5.6KΩ
B R9
9.1KΩ
6
R5
R9
(a)
(b)
Figure 4 (a) Schematic for the parallel/series connection (b) Component connection diagram Table 4 Parallel/series connection Resistor (Ri)
Specified value (Ω)
R1
1.5K
R2
1.2K
R3
3K
R4
2.7K
R5
5.6K
R6
7.5K
R7
6.2K
R8
8.2K
R9
9.1K
Measured value (Ω)
Variation (%)
Measured value (Ω)
Variation (%)
Rx Terminal resistance
Specified value (Ω)
RAB
1.83K Combo 1 Connection - 37 -
R1
R9
1
5
A 1.2KΩ
200Ω R3
R4
R5 1.2KΩ
3.6KΩ
R11
2
R15
6 R12
1.3KΩ
R6
RAB
1KΩ
1.8KΩ
R13 1.5KΩ 7
R8 2.2KΩ
1KΩ
R14 2.2KΩ 300Ω
1.3KΩ B R2
4
R10
Figure 5 (a) Schematic for Combo 1 connection (b) Component connection diagram
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8
9 3KΩ
3
R7
2KΩ
R16
1KΩ
Table 5 Combo 1 connection Resistor (Ri)
Specified value (Ω)
R1
200
R2
1.3K
R3
3.6K
R4
1.2K
R5
1.8K
R6
1.3K
R7
2.2K
R8
2.2K
R9
1.2K
R10
300
R11
1K
R12
1.5K
R13
3K
R14
1K
R15
2K
R16
1K
Terminal resistance
Calculated value (Ω)
Measured value (Ω)
Variation (%)
Measured value (Ω)
Variation (%)
RAB
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Combo 2 connection R1
1
A 47KΩ R3
R2
120KΩ
10KΩ
R9
R13
R14 100KΩ
30KΩ 2 4 R4
RAB
R5
R10
30KΩ
20KΩ
7 R11
100KΩ
R15
300KΩ 3
8
5 R6
R7 15KΩ
15KΩ
R12
30KΩ R8
B 22KΩ
6
Figure 6 (a) Schematic for Combo 2 connection (b) Component connection diagram
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15KΩ
R16
75KΩ
150KΩ
Table 6 Combo 2 connection Resistor (Ri)
Specified value (Ω)
R1
47K
R2
30K
R3
120K
R4
20K
R5
30K
R6
15K
R7
30K
R8
22K
R9
10K
R10
300K
R11
100K
R12
15K
R13
100K
R14
150K
R15
15K
R16
75K
Terminal resistance
Calculated value (Ω)
Measured value (Ω)
Variation (%)
Measured value (Ω)
Variation (%)
RAB
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Lab Experiment No. 3
Ohm’s Law
I. Introduction In this lab exercise, you will learn – • how to connect the DMM to network elements, • how to generate a VI plot, • the verification of Ohm’s law, and • the calculation of element power. II. Experiment Procedure Schematic diagrams for resistive networks N1 through N5 are shown in Figures 1 through 5 on the following pages. Current directions for each element are shown with line arrows. The actual element connections are also shown. The correct way to connect the DMM as an ammeter (AM) and as a voltmeter (VM) is shown in Figure 1(c) for reference. (a) Resistor VI plot. In network N1, the 10KΩ resistor R1 is connected to the Agilent E3620A power supply. The supply voltage V1 is to be varied from 0 volts to 20 volts with the voltage steps shown in Table 1. i. Measure and record the value of R1. Place the value in Table 1 where indicated. ii. Use the digital multi-meter (DMM) to measure the voltage across and the current through R1 for each value of V1. Record these measurements in Table 1 where indicated. iii. Use Excel to generate a graph of VR1 (linear scale vertical axis) plotted against IR1 (linear scale horizontal axis). Calculate the value of the slope of this plot and compare to the measured value of R1. Calculate the difference in percent (DiffR1) between these two values with the measured value as the base. Record these values in Table 1 where indicated. (b) Verification of Ohm’s law. Networks N2 through N5 contain various combinations of resistors and voltage sources. Data tables are provided for each network. i. For each network, use the digital multi-meter (DMM) to measure the voltage across and the current through each element (dc voltage sources and resistors), and the value of each resistor. Record these measurements in the tables where indicated. Again, the correct way to connect the DMM as an ammeter (AM) and as a voltmeter (VM) is shown in Figure 1(c). ii. Verify the validity of Ohm’s law by calculating each resistor current from its measured voltage and the measured value of its resistance. That is, from Ohm’s law, I Ri ( calc ) =
VRi ( meas )
(1)
Ri ( meas )
where VRi(meas) is the voltage measured across resistor Ri in volts (V), Ri(meas) is the measured value of Ri’s resistance in ohms (Ω), and IRi(calc) is the calculated value in amps (A) of the current through Ri. Record these calculated values in the tables where indicated. iii. Verify the accuracy of Ohm’s law by calculating the percent difference (DiffI) between the measured resistor current (IRi(meas)) and calculated current (IRi(calc)) with the measured value as the base. In other words Diff I ( % ) =
I Ri ( calc ) − I Ri ( meas ) I Ri ( meas )
⋅100%
(2)
Record these differences in the tables where indicated. iv. Calculate the power dissipated by each resistor and delivered to or from each voltage source. The power in Watts (W) delivered to a network element e is computed from Pe = Ve ⋅ I e
(3)
where Ve is the voltage drop across e, Ie is the current through e, and Pe is the power delivered to the element. If Pe is negative, power is delivered from the element to the network. Calculate Pe using measured variables. Record these powers in the tables where indicated. - 42 -
III. Lab Report The report for this lab experiment must be word-processed and contain the following items – • Title Page. • Introduction. • Procedure. • Results. • Discussions. (a) Suggest useful applications for Ohm’s law as studied in this experiment. • Conclusion. (a) Are all measured and calculated currents within resistor tolerance? List those that are not. (b) Explain how resistor variations produce differences between measured and calculated currents. (c) Which method of determining resistor currents (measurement versus calculation) yields more accurate results? Explain. (d) Which method is more convenient? Explain. (e) Explain how you would convince your boss (via a sales pitch) to use on method over the other. Strengthen your sales pitch with solid engineering practice and mathematical reasoning. • Appendix. • References.
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IV. 1.
Resistive Networks Network N1. 1 Agilent E3620A V1 10KΩ
R1
V1
N1
V2
2
R1 1
2
(a)
(b) DMM (AM)
IV1
1 IR1 DMM (AM)
DMM (VM)
VV1
V1 R1
VR1 DMM (VM)
10KΩ
2 (c)
Figure 1 (a) Network N1 (b) Component connections (c) DMM connections Table 1 Measured variables from N1 V1 (V)
VR1 (V)
IR1 (A)
Slope of VI plot (Ω)
DiffR1 (%)
0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 R1(meas) (Ω)
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2.
Network N2. Agilent E3620A R1
1
V1
2
V2
1KΩ V1
R2
9V
2KΩ
1
4
R3 R1 N2
4
3KΩ
R3
3 2
3 R2
(a)
(b)
Figure 2 (a) Network N2 (b) Component connections Table 2 N2 measured and calculated variables Element
Specified value
R1
1KΩ
R2
2KΩ
R3
3KΩ
V1
9V
Measure value
Ve(meas) (V)
Ie(meas) (A)
- 45 -
Ie(calc) (A)
DiffI (%)
N/A
N/A
Pe (W)
3.
Network N3. Agilent E3620A V1
V2
1
V1
5V
R1
R2
R3 R1
300KΩ
150KΩ
120KΩ 1
2
N3
R2
2
R3 (b)
(a)
Figure 3 (a) Network N3 (b) Component connections Table 3 N3 measured and calculated variables Element
Specified value
R1
300KΩ
R2
150KΩ
R3
120KΩ
V1
5V
Measure value
Ve(meas) (V)
Ie(meas) (A)
- 46 -
Ie(calc) (A)
DiffI (%)
N/A
N/A
Pe (W)
4.
Network N4. 1 Agilent E3620A V1 V1
3V
47KΩ
R1
2 V2
5V
N4
V2
R2
R3
100KΩ 1
20KΩ
R1
R2
3
2 3
R3
(a)
(b)
Figure 4 (a) Network N4 (b) Component connections Table 4 N4 measured and calculated variables Element
Specified value
R1
47KΩ
R2
20KΩ
R3
100KΩ
V1 V2
Measure value
Ve(meas) (V)
Ie(meas) (A)
Ie(calc) (A)
DiffI (%)
3V
N/A
N/A
5V
N/A
N/A
- 47 -
Pe (W)
5.
Network N5. Agilent E3620A V1 1
R1
R2
2
10KΩ V1
10V
N5
V2
3
30KΩ R3
3KΩ
15V
V2
1
2
R1
4
R2
3
R3 4
(a)
(b)
Figure 5 (a) Network N5 (b) Component connections Table 5 N5 measured and calculated variables Element
Specified value
R1
10KΩ
R2
30KΩ
R3
3KΩ
V1 V2
Measure value
Ve(meas) (V)
Ie(meas) (A)
Ie(calc) (A)
DiffI (%)
10V
N/A
N/A
15V
N/A
N/A
- 48 -
Pe (W)
Lab Experiment No. 4
Kirchhoff’s Laws
I. Introduction In this lab exercise, you will learn – • how to read schematic diagrams of electronic networks, • how to draw and use network graphs, • how to transform schematics into actual component connections, • correct ways to layout a breadboard connection of a network, • how to connect the DMM to network components, and • the verification of KCL and KVL. II. Experiment Procedure Four resistive networks N1 through N4 are shown on the following pages. Each network is accompanied with its oriented graph, a simplified connection diagram, and a photo of its suggested breadboard layout. Your job in this lab experiment is to fill out the three tables included with each network with the following data: (where ‘x’ denotes the network number; eg, x = 1 for network 1, x = 2 for network 2, etc.) (a) Table x.1 (variable map) – measure and record i. the value of each network element, ii. the voltage across each network element with node polarities, and iii. the current through each voltage source with node polarities. (b) Table x.1 (variable map) – calculate and record i. the current through each resistor using Ohm’s law, and ii. the power dissipated by each element. (c) Table x.2 (KCL) – calculate and record i. the total current into each node, ii. the total current out of each node, and iii. verification of KCL at each node. (d) Table x.3 (KVL) – calculate and record i. the total clockwise voltage drop around each circuit, ii. the total counter clockwise voltage drop around each circuit, and iii. verification of KVL for each circuit. III. Lab Report The report for this lab experiment must be word-processed and contain the following items – • Title Page. • Introduction. • Procedure. • Results. • Discussions. (a) Comment with respect to accuracy versus convenience on the application of Ohm’s law to determine element current. • Conclusion. Provide detailed comments and discussions on the items listed below for each resistor network. (a) Does the total power dissipated equal the total power supplied? Explain why or why not. (b) Are the network laws KCL and KVL verified? Explain any discrepancies. • Appendix. • References.
- 49 -
IV.
Resistor Networks Network N1 v1
1
Agilent E3620A V1
V1
R1
10V
1KΩ
eV1
eR1
G1 N1 (a)
2
R1 v2
1KΩ 1
(b)
2 (c)
Figure 1.1 (a) Network N1 (b) Graph G1 of N1 (c) Component connections
Figure 1.2 Breadboard layout of N1
- 50 -
V2
Table 1.1 Voltage, current, and power map for N1 Element voltage Nodes Element
Specified value
R1
1KΩ
V1
10V
Measured value
+
−
1
2
Element current Nodes
Measured value (V)
+
−
Calculated value (A)
Table 1.2 Kirchhoff current law Node
Total current into (Iin) (A)
Total current out of (Iout) (A)
KCL (Iin – Iout) (A)
1 2
Table 1.3 Kirchhoff voltage law Circuit
Total cw voltage drop (Vcw) (V)
Total ccw voltage drop (Vccw) (V)
V1, R1
- 51 -
KVL (Vcw – Vccw) (V)
Element power (W)
Network N2 R1
1
2
v1
eR1
Agilent E3620A
v2
V1
1KΩ V1
R2
9V
2KΩ
eV1
eR2 1
R3 N2
4
3KΩ
(a)
V2
3
v4
eR3
4
v3
G2
R1 (b)
R3
2
3 R2 (c)
Figure 2.1 (a) Network N2 (b) Graph G2 of N2 (c) Component connections
Figure 2.2 Breadboard layout of N2
- 52 -
Table 2.1 Voltage, current, and power map for N2 Element voltage Nodes Element
Specified value
R1
1KΩ
R2
2KΩ
R3
3KΩ
V1
9V
Measured value
+
−
1
4
Element current Nodes
Measured value (V)
+
−
Calculated value (A)
Table 2.2 Kirchhoff current law Node
Total current into (Iin) (A)
Total current out of (Iout) (A)
KCL (Iin – Iout) (A)
1 2 3 4
Table 2.3 Kirchhoff voltage law Circuit
Total cw voltage drop (Vcw) (V)
Total ccw voltage drop (Vccw) (V)
V1, R1, R2, R3
- 53 -
KVL (Vcw – Vccw) (V)
Element power (W)
Network N3 1
R1
R2
2
3 v1
3.9KΩ R5
15V
V1
eV1
9.1KΩ
R3
12KΩ R4
R6 6 4.7KΩ
eR1
v2
5
eR5
v6
2.2KΩ
eR6 v 5 G3
4
N3 (a)
(b)
Agilent E3620A V1
V2
1
6
R1
R6
R5
2
R2
3
5
R4
R3
4 (c)
Figure 3.1 (a) Network N3 (b) Graph G3 of N3 (c) Component connections
Figure 3.2 Breadboard layout of N3 - 54 -
eR2
v3
1.2KΩ eR3
eR4
v4
Table 3.1 Voltage, current, and power map for N3 Element voltage Nodes Element
Specified value
R1
3.9KΩ
R2
1.2KΩ
R3
9.1KΩ
R4
2.2KΩ
R5
12KΩ
R6
4.7KΩ
V1
15V
Measured value
+
−
1
6
Element current Nodes
Measured value (V)
+
−
Calculated value (A)
Table 3.2 Kirchhoff current law Node
Total current into (Iin) (A)
Total current out of (Iout) (A)
KCL (Iin – Iout) (A)
1 2 3 4 5 6
Table 3.3 Kirchhoff voltage law Circuit
Total cw voltage drop (Vcw) (V)
Total ccw voltage drop (Vccw) (V)
V1, R1, R5, R6 R5, R2, R3, R4 V1, R1, R2, R3, R4, R6
- 55 -
KVL (Vcw – Vccw) (V)
Element power (W)
Network N4 V1 R2
1
R3
2
82KΩ R1
220KΩ
3.3KΩ
N4
3
V2
10V
R4
R7
150KΩ
12KΩ
4
G4
eR7 (b)
Agilent E3620A V2
3 1
R3
2
R2 R1
6
R4
R7
R5 4 R6 (c)
Figure 4.1 (a) Network N4 (b) Graph G4 of N4 (c) Component connections
- 56 -
5
v3
eR5 v5
4.7KΩ
V1
eR3
eR4
eR6 v6
(a)
v2
eV2
eR1
R5
5
eR2
v1
47KΩ
R6
6
eV1
5V
v4
Figure 4.2 Breadboard layout of N4 Table 4.1 Voltage, current, and power map for N4 Element voltage Nodes Element
Specified value
R1
220KΩ
R2
82KΩ
R3
47KΩ
R4
150KΩ
R5
12KΩ
R6
3.3KΩ
R7
4.7KΩ
V1 V2
Measured value
+
−
5V
1
3
10V
2
5
Nodes Measured value (V)
- 57 -
Element current
+
−
Calculated value (A)
Element power (W)
Table 4.2 Kirchhoff current law Node
Total current into (Iin) (A)
Total current out of (Iout) (A)
KCL (Iin – Iout) (A)
1 2 3 4 5 6
Table 4.3 Kirchhoff voltage law Circuit
Total cw voltage drop (Vcw) (V)
Total ccw voltage drop (Vccw) (V)
R1, R2, V2, R6 V2, R3, R4, R5 R2, V1, R3 R6, R5, R7
- 58 -
KVL (Vcw – Vccw) (V)
Lab Experiment No. 5
Voltage and Current Maps
I. Introduction The purpose of this lab is to gain additional familiarity with making measurements on electrical networks. The experiments involved in this lab address the following topics – (a) reading and understanding a schematic diagram, (b) proper layout of a network on a breadboard, (c) application of electronic test equipment to make voltage and current measurements, (d) generation of a voltage, current, and power map of a network under test (NUT), and (e) performing the least number of measurements necessary to generate the map. The theory and equations associated with these experiments are covered in your class notes. Your job in this session is to build and apply two measurement methods on each of the given networks in order to expand your hands-on experience in working with networks and test equipment. For each network included, make use of the parts supplied by the GTA, and the DMM and dc power supply located on the lab bench. II. Breadboard construction and network measurements The schematics for three resistive networks are shown in Figures 1 through 3. Node ‘0’ is the designated ground or reference node for each network. Each network has three corresponding data tables that are to be filled out. You are to perform the following tasks. (a) Direct measurement method i. Build the network on your breadboard with particular attention paid to strict layout procedures. ii. Measure with the DMM the resistance of each resistor and record it in Table xx1(a) in the column where indicated. iii. Power the network with the dc power supply set to the specified voltage indicated on the schematic. iv. Use the DMM to measure the voltage drop across each resistor and label on the schematic with a positive sign (+) the resistor’s positive terminal. Record the voltage reading in Table xx(a) where indicated. v. Complete Table xx(a) entries by computing with Ohm’s law the current through (use the measured resistor values in Table xx(a)) and the power dissipated by each resistor. Use KCL to compute the current through and the power dissipated by the power supply. (b) Indirect (node) measurement method i. Using the same network breadboard layout in (a), measure the voltage at each node (Vni) with respect to the ground node (node ‘0’) and record in Table xx(b) where indicated. Label on the schematic the polarity of the node voltage with a positive (+) or negative (–) sign. ii. Apply KVL to the node voltages to calculate the voltage across each network resistor. Record the KVL expression and resistor voltage in Table xx(c). iii. Complete the entries in Table xx(c) by computing with Ohm’s law the current through (use the measured resistor values in Table xx(a)) and the power dissipated by each resistor. Use KCL to compute the current through and the power dissipated by the power supply. III. An example An example network is worked with the results presented in Tables at the end of this lab statement. Node ‘B’ is the designated ground node for this network. IV. Comparisons, comments and conclusions Compare the voltages, currents and power dissipation in Tables xx(a) and xx(c) for each network. Make comments on which measurement method is more efficient, practical and easier to perform.
1
‘xx’ refers to the Figure number; ‘1’ for Figure 1, ‘2’ for Figure 2, etc. - 59 -
Network N1 R1
1
R2
2
33KΩ
47KΩ 56KΩ
R5 R7
3
22KΩ
12KΩ
R3 5 Eps R6
6
N1
10V R4
0
68KΩ
4
18KΩ
Figure 1 Resistive network N1 Table 1(a) Variable map for network N1 from direct measurements Component
Spec value
R1
33KΩ
R2
47KΩ
R3
12KΩ
R4
18KΩ
R5
56KΩ
R6
68KΩ
R7
22KΩ
Eps
10V
Measured value
VRi (V)
Table 1(b) Node-to-ground voltages Node i
Vni (V)
1 2 3 4 5 6
- 60 -
IRi (A)
PRi (W)
Table 1(c) Variable map for N1 from node measurements Component
KVL
VRi (V)
R1 R2 R3 R4 R5 R6 R7 Eps
- 61 -
IRi (A)
PRi (W)
Network N2 R7 10KΩ
R1
1
R2
2
47KΩ
33KΩ
R8
Eps
R9
15V
82KΩ
R6 5 N2
3
R5
20KΩ
R3
8.2KΩ
68KΩ
R4
0
13KΩ
4
39KΩ
Figure 2 Resistive network N2 Table 2(a) Variable map for network N2 from direct measurements Component
Spec value
R1
47KΩ
R2
33KΩ
R3
68KΩ
R4
39KΩ
R5
20KΩ
R6
13KΩ
R7
10KΩ
R8
82KΩ
R9
8.2KΩ
Eps
15V
Measured value
VRi (V)
Table 2(b) Node-to-ground voltages Node i
Vni (V)
1 2 3 4 5
- 62 -
IRi (A)
PRi (W)
Table 2(c) Variable map for N2 from node measurements Component
KVL
VRi (V)
R1 R2 R3 R4 R5 R6 R7 R8 R9 Eps
- 63 -
IRi (A)
PRi (W)
Network N3 R1
1
4
100Ω
Eps1
R4
12V
1.2KΩ R2
0
R8
2.4KΩ
R7
3
6
R5
1.8KΩ
2.7KΩ
120Ω
2.4KΩ Eps2
1.2KΩ
12V
R9
R6 R3 2
5
100Ω
Figure 3 Resistive network N3 Table 3(a) Variable map for network N3 from direct measurements Component
Spec value
R1
100Ω
R2
120Ω
R3
100Ω
R4
1.2KΩ
R5
1.8KΩ
R6
1.2KΩ
R7
2.7KΩ
R8
2.4KΩ
R9
2.4KΩ
Eps1
12V
Eps2
12V
Measured value
VRi (V)
Table 3(b) Node-to-ground voltages Node i
Vni (V)
1 2 3 4 5 6
- 64 -
IRi (A)
PRi (W)
Table 3(c) Variable map for N3 from node measurements Component
KVL
VRi (V)
R1 R2 R3 R4 R5 R6 R7 R8 R9 Eps
- 65 -
IRi (A)
PRi (W)
Example Network R1
R2
A
1
4
10KΩ
3.3KΩ
Vps
56KΩ
680Ω
R5
R3
10V R6
R4
B 2
56KΩ
3
51KΩ
Figure 4 Example resistive network Table 4(a) Variable map for the example network from direct measurements Component
Spec value
Measured value
VRi (V)
IRi (A)
PRi (W)
R1
10KΩ
9.832KΩ
1.07043
108.87µ
116.53µ
R2
47KΩ
3.2473KΩ
0.17961
55.31µ
9.934µ
R3
12KΩ
674.49Ω
37.316m
55.32µ
2.064µ
R4
18KΩ
49.938KΩ
2.7577
55.22µ
152.29µ
R5
56KΩ
55.538KΩ
2.9745
53.56µ
159.3µ
R6
68KΩ
55.405kΩ
6.0255
108.75µ
655.29µ
Vps
10V
10.09V
10.09
-108.75µ
-1.0972m
Table 4(b) Node-to-ground voltages Node i
Vni (V)
1
9.0
2
6.0255
3
8.7832
4
8.8205
A
10.09
- 66 -
Table 4(c) Variable map for example network from node measurements Component
KVL
VRi (V)
IRi (A)
PRi (W)
R1
V A – V1
1.09
110.86µ
120.84µ
R2
V 1 – V4
0.17948
55.27µ
9.919µ
R3
V 4 – V3
37.316m
55.32µ
2.064µ
R4
V 3 – V2
2.7577
55.22µ
152.29µ
R5
V 1 – V2
2.9745
53.55µ
159.3µ
R6
V2
6.0255
108.75µ
655.29µ
Eps
VA
10.09
(-IR1) -108.97µ
-1.0985m
- 67 -
Lab Experiment No. 6
Network Theorems – Part 1
I. Introduction The purpose of this lab is to gain familiarity with several important Electrical Engineering theorems. The experiments performed in this lab involve the following concepts – • voltage and current division, • superposition theorem, and • Thevenin’s theorem. The theory and equations associated with these experiments are covered in your class notes. Your job in this session is to investigate and apply the above theorems on resistive networks to provide a hands-on experience to the theory covered in the lectures on these topics. For each of the networks given below, use the parts supplied by the GTA, and the DMM and dc power supply located on the lab bench. II. Experiment Procedures Procedures for performing experiments on a collection of resistive networks are attached. These experiments involve the theory and applications covered in the lecture on voltage and current division, superposition, and Thevenin’s equivalent. In your lab report, provide detailed answers and discussions to the following – • Discussion. (a) With respect to resistor tolerance, are the results of the measurements within tolerance to calculated values using specified component values? (b) Explain reasons for any discrepancies between calculated and measured results. (c) How useful are these theorems and operations? Can you think of any specific applications?
- 68 -
III. Voltage Division Part A. Voltage divider network N1. 1. Build network N1 shown in Figure 1 on your breadboard using parts supplied by the GTA. 2. Measure the values of the voltage source Eg1 and each resistor with the DMM and record in Table 1(a) where indicated. 3. Use the voltage divider operation to do the following: a. calculate voltages V1 through V3 using the specified values for the components and record in Table 1(b), b. calculate the voltages using the measured values for the components and record values in Table 1(b), c. measure with the DMM the voltages on the N1 and record in Table 1(b), and d. calculate the difference in percent (%) between the voltages measured from the network (3c) and those calculated with specified component values (3a) as the basis, and record in Table 1(b). 4. Provide comments on the accuracy of the voltage divider network N1 for generating precise voltage values with respect to resistor tolerance.
R1
R2
30KΩ
Eg1
12V
R3
15KΩ
10KΩ
R5
R4 30KΩ
15KΩ
R6
15KΩ
V1
V2
V3
N1
Figure 1 Network N1 Table 1(a) N1 component values Component
Specified value
Eg1
12V
R1
30KΩ
R2
15KΩ
R3
10KΩ
R4
30KΩ
R5
15KΩ
R6
15KΩ
- 69 -
Measured value
Table 1(b) N1 voltage values
Voltage
Calculated from specified R values (V)
Calculated from measured R values (V)
V1 V2 V3
- 70 -
Measured from N1 (V)
Difference (%)
Part B. Application of voltage division. 1. Build network N2 shown in Figure 2(a) on your breadboard using parts supplied by the GTA. 2. Measure the values of each resistor with the DMM and record in Table 2(a) where indicated. 3. Use resistor combination operations to do the following: a. calculate the value of the resistance at terminals A-B of N2 (RAB) using specified component values and record in Table 2(b), b. calculate the value of RAB using measured component values and record in Table 2(b), and, c. use the DMM to measure the value of RAB and record in Table 2(b). 4. Connect terminals A-B of N2 to the 10V source and RG as shown in Figure 2(b) and do the following: a. select a specified value of RG to be as close as possible to that of the calculated value of RAB; record this value in Table 2(c), b. obtain this resistor from the GTA, measure its value, measure the value of EG, and record in Table 2(c), c. measure the voltage VAB across terminals A-B of N2 and record in Table 2(c), d. apply the voltage divider operation to calculate the value of RAB using the measured values of EG, RG, and VAB; record in Table 2(c), and e. calculate the difference in percent between RAB’s DMM measured value (3c) and RAB’s value calculated from the voltage divider operation (4d), use the DMM value as the basis; record in Table 2(c). 5. Provide comments on the accuracy of voltage division for calculating network input resistance with respect to resistor tolerance. R1
A
R3
1
15KΩ R2
RAB R9 B
30KΩ R8
10KΩ 5
2
2KΩ 30KΩ R5
R4
4
7.5KΩ
2KΩ
N2 (a)
RG
EG
10V
A
VAB
B (b)
Figure 2 (a) Network N2 (b) Voltage divider with N2
- 71 -
24KΩ R6 R7
N2
10KΩ
3
Table 2(a) N2 component values Component
Specified value
R1
15KΩ
R2
30KΩ
R3
2KΩ
R4
30KΩ
R5
24KΩ
R6
10KΩ
R7
2KΩ
R8
7.5KΩ
R9
10KΩ
Measured value
Table 2(b) RAB from N2 (Figure 2(a)) Condition
RAB (Ω)
Calculated from specified R values Calculated from measured R values RAB measured with DMM
Table 2(c) RAB from voltage division (Figure 2(b)) RG specified (Ω)
RG measured (Ω)
EG measured (V)
VAB measured (V)
- 72 -
RAB calculated (Ω)
Difference (%)
IV. Current Division R-2R current divider network N3. 1. Build R-2R network N3 shown in Figure 3 on your breadboard using parts supplied by the GTA. 2. Apply the current division operation to calculate values for the currents listed on the schematic and record in Table 3. Use specified resistor and voltage source values in these calculations. 3. Measure with the DMM these currents and record their values in Table 3. 4. Calculate the difference in percent (%) between the currents measured from the network (3) and those calculated with specified component values (2) as the basis, and record in Table 3 where indicated. 5. Provide comments on the accuracy of the current divider network N1 for providing precise binary-weighted currents resistor scaling and tolerance. RG1 1KΩ IG I1
RG2 1KΩ 24V
EG
R2
R1
2KΩ
R4 I3
1KΩ R3
R6 I5
1KΩ
2KΩ
R5
I7
1KΩ
2KΩ
R7
2KΩ
I8 R8 2KΩ
N3
Figure 3 R-2R network N3 Table 3 N3 currents Current
Calculated from current division (A)
Measured from N3 (A)
IG I1 I3 I5 I7 I8
- 73 -
Difference (%)
V. Superposition Part A. Network N4. 1. Build network N4 shown in Figure 4 on your breadboard using parts supplied by the GTA. 2. Measure the values of each resistor with the DMM and record in Table 4(a) where indicated. 3. Perform the following operations. a. With EG1 turned on and operating, measure its value and record in Table 4(a) then turn off voltage source EG2 by removing it from the connection and replacing it with a short circuit, i. calculate voltage VAB using the specified component values and record in Table 4(b), ii. calculate voltage VAB using the measured component values and record in Table 4(b), iii. measure with the DMM voltage VAB from the breadboard and record in Table 4(b), and iv. calculate the difference in percent (%) between VAB measured and VAB calculated with specified component values as the basis, and record in Table 4(b). b. With EG2 turned on and operating, measure its value and record in Table 4(a) then turn off voltage source EG1 by removing it from the connection and replacing it with a short circuit, i. calculate voltage VAB using the specified component values and record in Table 4(b), ii. calculate voltage VAB using the measured component values and record in Table 4(b), iii. measure with the DMM voltage VAB from the breadboard and record in Table 4(b), and iv. calculate the difference in percent (%) between VAB measured and VAB calculated with specified component values as the basis, and record in Table 4(b). c. Apply the superposition theorem to i. calculate the total voltage for VAB by adding the values calculated from specified component values, record in Table 4(b), and ii. calculate the total voltage for VAB by adding the values calculated from measured component values, record in Table 4(b). d. With EG1 and EG2 turned on and operating, i. measure the total voltage VAB directly from N4, and ii. calculate the difference in percent (%) between the total VAB measured from N4 (3di) and the total VAB calculated with specified component values (3ci) as the basis, and record in Table 4(b). 4. Provide comments on the accuracy of superposition for providing precise voltage measurements and on the ease of making these measurements. R1
R2
A
30KΩ
EG1
14V
15KΩ R3
VAB
7.5KΩ N4 B
Figure 4 Network N4
- 74 -
EG2
14V
Table 4(a) N4 component values Component
Specified value
EG1
14V
EG2
14V
R1
30KΩ
R2
15KΩ
Measured value
Table 4(b) N4 voltages
Voltage
Calculated from specified R values (V)
Calculated from measured R values (V)
VAB (EG2 = 0) VAB (EG1 = 0) VAB (total)
- 75 -
Measured from N4 (V)
Difference (%)
Part B. Network N5. 1. Build network N5 shown in Figure 5 on your breadboard using parts supplied by the GTA. 2. Perform the operations similar to those performed in Part A. a. With EG1 turned on and operating, turn off voltage source EG2 by removing it from the connection and replacing it with a short circuit, measure voltages VAB and VCD, and record in the first column of Table 5. b. With EG2 turned on and operating, turn off voltage source EG1 by removing it from the connection and replacing it with a short circuit, measure voltages VAB and VCD, and record in the second column of Table 5. c. Apply the superposition theorem to calculate total measured values for VAB and VCD, and record in the third column of Table 5. d. With EG1 and EG2 turned on and operating, measure VAB and VCD directly from N5, and record in the fourth column of Table 5. e. Calculate the difference in percent (%) between VAB and VCD measured directly from N5 (fourth column) and VAB and VCD calculated from superposition (third column) with the measured values as the basis. Record in the last column of Table 5. 3. Provide comments on the accuracy of superposition for providing precise voltage measurements and on the ease of making these measurements. R1 1KΩ EG1
R2
A N5
R3
D 8.2KΩ
15V
5.1KΩ
R5
6.8KΩ
R4
4.7KΩ
EG2
R6 C 3.9KΩ
B 12V R7 2.7KΩ
Figure 5 Network N5 Table 5 N5 voltages
Voltage
Measured with EG2 = 0 (V)
Measured with EG1 = 0 (V)
Total from superposition (V)
VAB VCD
- 76 -
Total measurement (V)
Difference (%)
VI. Thevenin’s Equivalent Network N6. 1. Build network N6 shown in Figure 6 on your breadboard using parts supplied by the GTA. 2. Measure the values of the voltage sources and resistors with the DMM, and record in Table 6(a). 3. Apply basic network operations to do the following: a. calculate values for the Thevenin’s voltage source ETH, Thevenin’s resistance RTH, and the current IL through RL using the specified values of the components and record in Table 6(b), b. calculate values for ETH, RTH, and IL using the measured values of the components and record in Table 6(b), c. apply the DMM on N6 to measure values for ETH, RTH, and IL and record in Table 6(b), and d. calculate the difference in percent (%) between ETH, RTH, and IL measured from the network (c) and those calculated with specified resistor values (a) as the basis, and record in Table 6b where indicated. 4. Provide comments on the accuracy and convenience of Thevenin’s equivalent for providing precise resistor currents connected as loads to the network. R2
R1 30KΩ
EG1
15KΩ
A RL
20V
10V
7.5KΩ 15KΩ
N6
R3
B
30KΩ R4
(a)
RTH A RL
ETH
7.5KΩ B
N6TH (b)
Figure 6 (a) Network N6 (b) Thevenin’s equivalent network
- 77 -
EG2
Table 6(a) N6 component values Component
Specified value
EG1
20V
EG2
10V
R1
30KΩ
R2
15KΩ
R3
15KΩ
R4
30KΩ
RL
7.5KΩ
Measured value
Table 6(b) N6 Thevenin’s equivalent Component
Calculated from specified R values
Calculated from measured R values
ETH RTH IL
- 78 -
Measured from N6
Difference (%)
Lab Experiment No. 7
Cooling Fan Control Circuit
I. Introduction This lab experience involves a project rather than an experiment. The project is to build and test circuits that use a thermistor to control temperature by activating a cooling fan. II. The Thermistor: Theory of Operation A thermistor is a resistor constructed from special material having a resistivity significantly sensitive to temperature [1,2]. This material allows the resistance of the thermistor to exhibit a predictable variation over a wide range of temperature. These devices are used as temperature sensors, current limiters, bias current compensators, and circuit protectors. The resistance-temperature (RT) characteristics of thermistors are very non-linear. For example, the RT characteristics of one class of thermistors is modeled with an exponential equation derived from the Steinhart-Hart equation for [2] Rt (T ) = Rt (To ) e
⎛1 1 ⎞ B ⎜⎜ − ⎟⎟ ⎝ T To ⎠
(1)
In this equation, T is the ambient temperature in °K, To is the reference or nominal temperature (usually 300.15°K or 27°C), Rt(To) is thermistor resistance at the nominal temperature, and B is a model parameter in °K. The plot of a RT curve for a typical thermistor with a nominal temperature resistance of 6KΩ for two values of B is shown in Figure 1. Over small ranges of temperature, the RT curve exhibits a near straight-line behavior. In these ranges, the resistance of a thermistor can be approximated with a first-order relationship to temperature modeled by ⎡ TCR Rt (T ) = Rt (To ) ⎢1 + (T − To )⎤⎥ ⎣ 100 ⎦
(2)
where TCR is the temperature coefficient in %/°C. If the TCR is positive, the thermistor is referred to as a positive temperature coefficient (PTC) device and Rt increases as temperature increases. Conversely, if TCR is negative, then Rt decreases with an increase in temperature and the thermistor is a negative temperature coefficient (NTC) device. The TCR for a typical PTC thermistor is on the order of 0.2%/°C to 0.5%/°C while that for a NTC device is between –5%/°C to –3%/°C. III. Fan Control Circuits There are two versions for the fan control circuit used in this project. The schematic of the first version (Ckt. 1) is shown in Figure 2 where a 5KΩ NTC thermistor RT is connected to a 10KΩ trim pot (R1) to form a voltage divider. The thermistor is placed next to an object (target) whose ambient temperature is to be regulated by the cooling fan. The voltage from the divider provides the excitation (Vin) to the 555 timer which is configured as a Schmitt trigger [3]. Assuming the currents into pins 2 and 6 of the 555 are very small, Vin is expressed as Vin =
Rt (T )
Rt (T ) + R1
(3)
VCC
where Rt(T) is the temperature dependent resistance of RT. The output of the 555 (Vo) drives a pair of 2N3904 NPN bipolar junction transistors (BJT) Q1 and Q2 to control a cooling fan and the light-emitting diode (LED) D1. The LED provides visual indication of the fan’s condition. The voltage transfer curve (VTC) of the control circuit is shown in Figure 3. At the target’s nominal operating temperature (To), Rt(To) is about 5KΩ such that Vin is slightly larger than 8V which is the ‘high’ threshold voltage (VTH) of the Schmitt trigger. The value for Vin at To can be adjusted by trimming R1. At this point, Vo is approximately equal to zero volts causing Q1 and Q2 to be turned off such that the fan and LED are also turned off. As the target’s temperature begins to increase, Rt(T) begins to decrease causing Vin to decrease as well. When Vin reaches the ‘low’ threshold voltage (VTL), the Schmitt trigger changes state causing Vo to immediately increase to the supply voltage 12V. This voltage is large enough to cause Q1 and Q2 to conduct, and to turn on the fan and the LED. By positioning the fan to direct a flow of cool air toward the target, its temperature will begin to decrease such that Rt(T) and, consequently, Vin will start to increase. When Vin reaches VTH, Vo immediately drops to zero volts which turns Q1 and Q2 off. As a result, the fan and LED are also turned off to complete the operating cycle. - 79 -
The schematic for the second version (Ckt. 2) of the control circuit is shown in Figure 4. In this circuit, the pchannel junction field-effect transistor (PJFET) J1 and the 10KΩ trim pot R1 make a current source that forces current into the thermistor RT. The operation of this circuit to control the cooling fan is basically identical to that of the first version. IV. Components and Instruments The components and instruments required for this lab are listed below. Components: Resistors: 100Ω 1KΩ (2) 10KΩ trim pot NTC thermistor Capacitors: 0.01µF (2)
10µF
Active devices: IC: 555 timer Red LED
NPN BJT: 2N3904 (2) PJFET: J271
Instruments: Power supply Agilent E3620A
Multimeter Agilent 34401A
Additional: 12V cooling fan Tool box
Breadboard Hook-up wire
V. Project Procedure Both circuit versions described above are to be built and tested in the lab. The following tasks are to be performed. (a) Download, store, and print data sheets for the components listed below NTC502-RC thermistor (Xicon) 555 timer (Fairchild Semiconductor Corp. or National Semiconductor Corp.) NPN BJT 2N3904 (Fairchild Semiconductor Corp.) PJFET J271 (Fairchild Semiconductor Corp.) (b) Obtain a fan from the GTA. Confirm the operation of the fan by connecting it to the Agilent E3620A power supply. Connect the red lead to positive (+) and the black lead to negative (−). Adjust the voltage to 12V and verify that the fan is operational. If the fan does not operate, obtain another from the GTA. (Note: Be sure to return all fans to the GTA after the project is completed.) (c) Build Ckt. 1 shown in Figure 2 on your breadboard. Follow the breadboard layout shown in the photo in Figure 5. Place the fan and thermistor connections at the far end of the breadboard for convenient access. (d) With the power supply voltage Vps of 12V, adjust R1 such that Vin is slightly larger than 8V. Measure and record Vin, and indicate that the fan and LED are off. (e) Use a heat source (hair dryer) to blow hot air onto the thermistor. Measure and record Vin when the fan and LED turn on. This voltage should be slightly less than 4V. (f) Remove the heat source and direct the air flow from the fan onto the thermistor. Measure and record Vin as the temperature of the thermistor decreases to nominal. As Vin exceeds 8V, the fan and LED should turn off. (g) Repeat (c) through (f) for Ckt. 2 shown in Figure 4.
- 80 -
VI. References [1] M. Sapoff and R.M. Oppenheim, “Theory and application of self-heated themistors,” Proc. IEEE, vol. 51, pp. 1292-1305, Oct. 1963. [2] E.A. Boucher, “Theory and applications of thermistors,” Chemical Instrumentation, vol. 44, no. 11, pp. A935-A966, Nov. 1967. [3] S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd Edition, The McGrawHill Companies, Inc., New York, NY, 2002. (ISBN 0-07-232084-2) 1 .10
3
Resistance (Kohms)
100
10
1
0.1
50
25
0
25
50 Temperature (C)
75
100
125
150
B = 3900K B = 4100K
Figure 1 RT curve for a typical thermistor Agilent power supply +VCC red C1
10μF 25V R1
black
10KΩ trimpot
C2
8 2
Vps
555 timer
Vin
3
R2 1KΩ
Rt(T)
5KΩ NTC thermistor
Q1
0.01μF
R3 1KΩ
1
Q1, Q2 - 2N3904
Figure 2 Fan control circuit Ckt. 1 with a thermistor in a voltage divider
- 81 -
100Ω
R4 C3
0.01μF
Vo
6
12V RT
D1 red LED
fan
Q2
Vo
12V fan on
hysteresis band
fan off
0V
VTH 8V
VTL 4V
0V
12V
Vin
increasing decreasing
Figure 3 Control circuit VTC Agilent power supply +VCC red C1
10KΩ trimpot
R1
10μF 25V
D1 red LED
fan black C2
8
J1 2
Vps
555 timer
Vin
3
Vo R2 1KΩ
6
12V
Q1
0.01μF
R3 1KΩ
1 RT Rt(T)
5KΩ NTC thermistor
J1 - J271
Q1, Q2 - 2N3904
Figure 4 Fan control circuit Ckt. 2with a thermistor driven by a current source
- 82 -
100Ω
R4 C3
0.01μF
Q2
Figure 5 Breadboard layout Ckt. 1
- 83 -
Lab Experiment No. 8
Audio Amplifier Networks
I. Introduction The purpose of this lab session is to gain familiarity with several well-known audio amplifier circuits built with standard operational amplifiers (op-amp). Your job in this session is to design (where necessary), build, test, and evaluate each of these circuits in order to expand your hands-on experience in working with the devices. For each network listed below, use TLC274 quad op-amps, standard 5% resistors, a ±5 volt dc power supply, and an ac signal generator. For measurements, use ac voltmeters, DVMs, and oscilloscopes. II. Components and Instruments The components and instruments required for this lab are listed below. Components: Op-amp: TLC274 Resistors 510Ω 5.1KΩ 10KΩ 18KΩ 30KΩ 39KΩ 51KΩ 10KΩ single-turn potentiometer Instruments: Function generator Agilent 33120A 15MHz Power supply Agilent E3620A
20KΩ
Oscilloscope Agilent 54621A 60MHz dual-channel Multimeter Agilent 34401A
Additional: Breadboard Tool box Hook-up wire Oscilloscope probes III. Lab Assignment Download from the internet the data sheet for the Texas Instrument’s TLC274 quad op-amp. You will need this document for the device pin configuration. Use this op-amp to build and perform measurements on the following amplifier networks. A. Amplifier No. 1. The dual-output audio panpot amplifier (see problem 1.25 Ref .1) shown in Figure 1. Determine the 1KHz voltage gain at each output as the pot RP is varied over its full range. B. Amplifier No. 2. The bridge amplifier (see problem 1.74 Ref. 1, Ref. 2) shown in Figure 2. Design this amplifier for a differential output voltage gain of 8. Determine the maximum undistorted peak-to-peak voltage swing across the load resistor RL at 1KHz. IV. References 1. S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd Ed., The McGraw-Hill Companies, Inc., New York, NY, 2002, (ISBN 0-07-232084-2). 2. NSC data sheet, “LM4991, 3W Audio Power Amplifier with Shutdown Mode”, Audio Power Amplifier Series, National Semiconductor Corporation, 2003.
- 84 -
R1L
R3L
5KΩ
10KΩ
R2L
20KΩ
+5V
VoL
OAL
left channel -5V RP 10KΩ Vin
+5V right channel VoR
OAR
5KΩ
10KΩ
R1R
R3R
-5V
R2R 20KΩ
Figure 1 Audio panpot amplifier R1a
R2a
10KΩ
+5V Vo1
OA1
-5V
Vin
RL
ΔVo
510Ω R2b
R1b
Vo2
10KΩ
+5V
OA2
-5V
Figure 2 Bridge amplifier (aka Boomer Amplifier)
- 85 -
Appendix 1
Breadboard Layout Examples EE 1205 Bread board layout techniques September 13, 2008 HTR, Jr.
binding post (black)
binding post (red)
R3
R1
1KΩ
R2 33KΩ Figure 1 Resistor network schematic
Figu re 2 Wrong way – off the board with loops
- 86 -
200KΩ
Figure 3 Right way - low to the board and tight
Figure 4 Right way – low to the board and even tighter
- 87 -
Breadboard layout examples HTR, Jr. February, 25, 2009
- 88 -
- 89 -
Appendix 2
Lab Measurement Example Lab Measurement Example 1 R1
R2
A
1
4
10KΩ Vps
3.3KΩ
56KΩ
680Ω
R5
R3
10V R6 B
56KΩ
R4 2
Figure 1 Network schematic
Figure 2 Breadboard layout
- 90 -
51KΩ
3
Table 1 Voltage, current, and power map Element voltage Nodes Element
Specified value
Measured value
R1
10KΩ
9.8251KΩ
R2
3.3KΩ
3.2624KΩ
R3
680Ω
684.22Ω
R4
51KΩ
50.294KΩ
R5
56KΩ
55.175KΩ
R6
56KΩ
55.158KΩ
Vps
10V
+
−
A
B
Element current Nodes
Measured value (V)
+
−
Calculated value (A)
Table 2 Kirchhoff current law Node
Total current into (Iin) (A)
Total current out of (Iout) (A)
1 2 3 4 A B
- 91 -
KCL (Iin – Iout) (A)
Element power (W)
Table 3 Kirchhoff voltage law Circuit
Total cw voltage drop (Vcw) (V)
Total ccw voltage drop (Vccw) (V)
Vps, R1, R5, R6 R5, R2, R3, R4 Vps, R1, R2, R3, R4, R6
- 92 -
KVL (Vcw – Vccw) (V)
Lab Measurement Example 1
Solutions R1
R2
A
1
4
10KΩ Vps
3.3KΩ
56KΩ
680Ω
R5
R3
10V R6 B
56KΩ
R4 2
Figure 1 Network schematic
Figure 2 Breadboard layout
- 93 -
51KΩ
3
Table 1 Voltage, current, and power map Element voltage Nodes
Element current Nodes
Measured value
+
−
Measured value (V)
+
−
Calculated value (A)
Element power (W)
10KΩ
9.8251KΩ
A
1
1.09245
A
1
111.1897µ
121.4692µ
R2
3.3KΩ
3.2624KΩ
1
4
0.18271
1
4
56.00478µ
10.23263µ
R3
680Ω
684.22Ω
4
3
38.073m
4
3
55.64438µ
2.118549µ
R4
51KΩ
50.294KΩ
3
2
2.8199
3
2
56.06832µ
158.1071µ
R5
56KΩ
55.175KΩ
1
2
3.0406
1
2
55.10829µ
167.5623µ
R6
56KΩ
55.158KΩ
2
B
6.1287
2
B
111.1117µ
680.9704µ
Vps
10V
10.0147V
A
B
10.2831
A
B
-111.4µ
−1.145537m
Element
Specified value
R1
Table 2 Kirchhoff current law Node
Total current into (Iin) (A)
Total current out of (Iout) (A)
KCL (Iin – Iout) (A)
1
(IR1) 111.1897µ
(IR2 + IR5) 111.1131µ
76.63n (0.069%)
2
(IR4 + IR5) 111.1766µ
(IR6) 111.1117µ
64.91n (0.058%)
3
(IR3) 55.64438µ
(IR4) 56.06832µ
−423.9366n (0.762%)
4
(IR2) 56.00478µ
(IR3) 55.64438µ
360.4n (0.648%)
A
0
(IR1 + Ips) −210.3n
210.3n (0.189%)
B
(Ips + IR6) -288.3n
0
−288.3nA (0.259%)
- 94 -
Table 3 Kirchhoff voltage law Circuit
Total cw voltage drop (Vcw) (V)
Total ccw voltage drop (Vccw) (V)
KVL (Vcw – Vccw) (V)
Vps, R1, R5, R6
(VR1 + VR5 + VR6) 10.26175
(Vps) 10.2831
−21.35m (0.208%)
R5, R2, R3, R4
(VR2 + VR3 + VR4) 3.040683
(VR5) 3.0406
83µ (0.0027%)
Vps, R1, R2, R3, R4, R6
(VR1 + VR2 + VR3 + VR4 + VR6) 10.26183
(Vps) 10.2831
−21.267m (0.207%)
R1
R2
A
1
4
10KΩ Vps
3.3KΩ
R5
56KΩ
R3
680Ω
10V R6 B
56KΩ
R4 2
51KΩ
Figure 3 Oriented network schematic
Total power dissipated by resistors (delivered to resistors) = 1.14046mW Total power delivered by the power supply = 1.145537mW Absolute difference (%) = 5.076µW (0.445%)
- 95 -
3
Appendix 3
Bills of Material Lab 2 BOM
Lab 2 bill of materials (BOM) – resistor values 12Ω 15Ω 27Ω 30Ω 56Ω 62Ω 75Ω 82Ω 91Ω
200Ω 300Ω
1KΩ (3) 1.2KΩ (4) 1.3KΩ (2) 1.5KΩ (2) 1.8KΩ 2KΩ (2) 2.2KΩ (3) 2.7KΩ 3KΩ (2) 3.3KΩ 3.6KΩ 3.9KΩ 5.1KΩ 5.6KΩ 6.2KΩ 7.5KΩ (2) 8.2KΩ (2) 9.1KΩ
10KΩ (2) 15KΩ (4) 20KΩ 22KΩ 30KΩ (3) 47KΩ 75KΩ
Other – 47Ω 4.7KΩ
- 96 -
100KΩ (2) 120KΩ 150KΩ 300KΩ
Lab 3 BOM Lab 3 bill of materials (BOM) – resistor values Network N1: 1KΩ Network N2: 1KΩ 2KΩ
3KΩ
Network N3: 120KΩ 150KΩ 300KΩ Network N4: 20KΩ 47KΩ
100KΩ
Network N5: 3KΩ 10KΩ
30KΩ
- 97 -
Lab 4 BOM Lab 4 bill of materials (BOM) – resistor values Lab experiment No. 4 resistor list Network N1 1K
Network N2 1K 2K 3K
Network N3 1.2K 2.2K 3.9K 4.7K 9.1K 12K
- 98 -
Network N4 3.3K 4.7K 12K 47K 82K 150K 220K
Lab 5 BOM Lab 5 bill of materials (BOM) – resistor values Lab experiment No. 5 resistor list Network N1 12K 18K 22K 33K 47K 56K 68K
Network N2 8.2K 10K 13K 20K 33K 39K 47K 68K 82K
Network N3 100 (2) 120 1.2K (2) 1.8K 2.4K (2) 2.7K
- 99 -
Lab 6 BOM Lab 6 bill of materials (BOM) – resistor values Lab experiment No. 6 resistor list Voltage divider networks: Network N1 Network N2 10K 2K (2) 15K (3) 7.5K 30K (2) 10K (2) 15K 24K 30K (2) Current divider network: Network N3 1K (5) 2K (5) Superposition networks: Network N4 7.5K 15K 30K
Network N5 1K 2.7K 3.9K 4.7K 5.1K 6.8K 8.2K
Thevenin’s equivalent networks: (Same as N4 and N5)
- 100 -
Lab 7 BOM Lab 7 bill of materials (BOM) – component and resistor values Resistors: 100Ω 1KΩ (2) Capacitors: 0.01µF (2)
10KΩ trim pot
NTC thermistor
10µF
Active devices: IC: 555 timer Red LED
NPN BJT: 2N3904 (2) PJFET: J271
Additional: 12V cooling fan
- 101 -
Lab 8 BOM Lab 8 bill of materials (BOM) – component and resistor values Lab 8 Bill of Materials Part
Description
Op-amp
TLC274, quad CMOS op-amp, plastic encapsulated
1
Resistor
510Ω, 1/4W, 5%, carbon film resistor
1
Resistor
5.1KΩ, 1/4W, 5%, carbon film resistor
2
Resistor
10KΩ, 1/4W, 5%, carbon film resistor
10
Resistor
18KΩ, 1/4W, 5%, carbon film resistor
2
Resistor
20KΩ, 1/4W, 5%, carbon film resistor
2
Resistor
30KΩ, 1/4W, 5%, carbon film resistor
2
Resistor
39KΩ, 1/4W, 5%, carbon film resistor
2
Resistor
51KΩ, 1/4W, 5%, carbon film resistor
2
Pot
10KΩ, 1/4W, single turn potentiometer
1
Misc.
Wire
- 102 -
Count