Finite State Machine with Datapath Jan Madsen Informatics and Mathematical Modeling Technical University of Denmark Richard Petersens Plads, Building 321 DK2800 Lyngby, Denmark
Motivation void UnitControl() { up = down = 0; open = 1; while (1) { while (req == floor); open = 0; if (req > floor) { up = 1;} else {down = 1;} while (req != floor); open = 1; delay(10); } } }
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Datapath
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Motivation
inst mem
controller
datapath
data mem
? FSM ? Definition, notation, usage, extensions, system behaviour
? FSMD ? FSMD execution / timing ? Modeling 02131 Embedded Systems
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Finite State Machine, FSM ?Finite state machines are used to describe the behavior of a system and is one of the most fundamental models of computation. ?A finite state machine has a set of states, and its control moves from state to state in response to external inputs. ?The term "finite" refers to the fact that the set of states Q is a finite state.
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Finite State Machine, FSM ?A finite state machine is said to be deterministic if for a given state qi and a given input si there is only one possible next state. ?In case of two or more possible next states for the same input si, the finite state machine is said to be non-deterministic. ?we shall only be concerned with deterministic finite state machines.
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FSM definition FSM = < Q, ? , ?, q0, F > ?A finite set of states Q ?A finite set of input symbols, ? ?A transition function, ?: Q, ? ? Q ?A start state q0 from Q ?A set of final or accepting states, F Q
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FSM Notation ? Transition diagram
?Transition table
q0 s1
q0 q1
s4
s2
q2
s3
s1 q1
q1 q2
s2
s3
q2
s4 q3
q1
q3
q3
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Processing strings ? A FSM can be used to recognize a sequence of input symbols (a string) ? Used to describe regular languages and to show properties of such languages ? if two finite state machines represents the same language.
? The language of a finite state machine is the set of all strings which the finite state machines accepts. ? Let qn be the state after processing each input symbol in sequence, ? If qn belongs to F, the string is said to be accepted, ? otherwise it is rejected.
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Example ?We want to specify a FSM that accepts all and only the strings of 0’s and 1’s that have the sequence 01 somewhere in the string. ?{x01y | x and y are any string of 0’s and 1’s} ?Strings in the language ?01, 11010 and 100011
?Strings not in the language ?0 and 111000
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Example ?{x01y | x and y are any string of 0’s and 1’s} ?FSM = 1 q0
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0 0
q2
1
q1
0,1
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FSM extensions ?We are not always content with a machine which only accepts strings! ?We also need machines which produce some output as a reaction to the inputs ?There are two distinct approaches to include output: ?Moore: associate the emission of an outputevent with a state ?Mealy: associate the emission of an outputevent with a transition
?Both are equal in modeling capabilities 02131 Embedded Systems
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FSM with output FSM = < Q, ? , ? , ?, q0, F > ?A finite set of states Q ?A finite set of input symbols, ? ?A finite set of output symbols, ? ?A transition function, ?: Q, ? ? Q ?A start state q0 from Q ?A set of final or accepting states, F Q 02131 Embedded Systems
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FSM with output ? Moore machine
? Mealy machine
s1 q0/d0
s1/d1 q2/d2
q0
q2
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Describing behavior ?Seat belt alarm
?Specification: ?”Five seconds after the key is turned on, if the belt has not been fastened, an alarm will beep for ten seconds or until the key is turned off”
?FSM? ?Device a FSM with your neighbour (10 min.) 02131 Embedded Systems
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Seat belt alarm ?States: ?Off, Wait, Alarm
Key = on / Start
Wait
?Input events: ?Key ?Belt ?End
?Output events:
Off
Key = off or Belt = on /
End = 10 or Key = off or Belt = on / Alarm = off
End = 5 / Alarm = on
Alarm
?Alarm ?Start
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FSMD
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FSMD execution
inst mem
controller
datapath
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data mem
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von Neumann machine ? Controller: Instruction processor 1. 2. 3. 4. 5.
Determine label of next instruction Instruct memory to provide instruction Receive instruction and decode it Inform data processor of operation to be executed Determine labels of operands and pass them to data memory 6. Receive state information from data processor
? Defines the instruction sequence
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von Neumann machine ? Controller: Instruction processor
Get label
Request instruction
Receive instruction
Receive state
Operand labels
Instruct DP
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von Neumann machine ? Datapath: Data processor
Receive Inst type
Operand labels
Request operands Receive operands
Store result
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Return state
execute
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FSMD execution ? Executes in a number of steps Step i-1
Step i
Step i+1
? Steps are controlled by a clock
period T
frequency f = 1/T
? Within a period we have to read, compute and save ? For now, all we need to know is that there is a clock
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FSMD execution
Step i-1
Step i
Step i+1
F i-1
Fi
F i+1
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Simple example
+1
0
+1
0
time
0+1 0
0 0+1
1 0+1
0 0+1
1
1+1
0+1
2 1+1
2 1+1
1
1 1+1
2
1
0
0 0+1
1+1 1
0
+1
3 1+1
2
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Modelling
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Modeling model type
Mathematical domain
model type
model instance
model instance
When go==1 then blink leds five times
specification
implementation
Physical domain 02131 Embedded Systems
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Modeling: Hardware design Gezel: fdlsim
FSMD
Gezel
Mathematical domain Gezel: fdlvhd
FSMD
VHDL: Modelsim
VHDL
Xilinx
When go==1 then blink leds five times
specification
Xilinx FPGA
Physical domain 02131 Embedded Systems
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Modeling: Software design Mathematical domain Imperative languages
Imperative languages
C
Compiler: gcc
ASM
linker
When go==1 then blink leds five times
specification
Pentium III
Physical domain 02131 Embedded Systems
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