90 W-230 Vac Input PWM Switching Regulators

STR-W6253D 60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators Features and Benefits Description ▪ Overcurrent protection (OCP) with ac...
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STR-W6253D 60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators Features and Benefits

Description

▪ Overcurrent protection (OCP) with ac input voltage compensation function; no additional peripheral circuits required—minimizes dependency of OCP on ac input ▪ Overload protection (OLP) with integrated timer reduces power stress (temperature rise) at overload condition, requires no peripheral components ▪ Avalanche-guaranteed MOSFET improves device capability of withstanding excess surge voltage, providing a simple surge absorber circuit without breakdown voltage derating ▪ Start-up circuit eliminates the need for a start-up resistor, and helps to reduce input power consumption

The STR-W6200D series are current-mode PWM ICs that incorporate controller chips. These devices are manufactured using a proprietary high-voltage BCD process, and avalancheguaranteed MOSFETs. These elements allow power supply systems designs that are highly reliable and simple, with fewer peripheral components. These ICs also provide Auto-Burst mode operation, which lowers input power requirements at light loads, and improves efficiency over the entire load range and universal-input range. Applicatons include: ▪ ▪ ▪ ▪

Continued on the next page…

Package: TO-220

TV set top box LCD PC monitor, LCD TV Printer, scanner General consumer, PC, and industrial applications requiring SMPS power supply with standby mode

Not to scale

Functional Block Diagram STARTUP

VCC

D/ST

7.1 V

UVLO

REG

VREG

28.5 V

OVP

RST R SQ

15.5 V/ 8.9 V 7.1 V

ELP TSD

=1.6 mA

RQ

DMAX 75%

PWM OSC

I startup

S DRV

SQ R

S2

Frequency Modulation

FM/ELP

Q

OLP CK S1 tOLP = tFM ×32 R

12 V

OCP

Drain Peak Current Compensation

7.8 V

160 μA

Feedback Control

FB Slope Compensation

28103.53

LEB

S/OCP

GND

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

Features and Benefits (continued) ▪ Bias Assist function improves start-up performance by selfbiasing the VCC pin, and allows a use of a small value VCC capacitor, resulting in improved response to overvoltage conditions ▪ Very low current consumption in nonoperating (UVLO) state: ICC(off) = 5 μA (typical) at VCC = 13.8 V ▪ Slope compensation circuit stabilizes operation, preventing interference from subharmonics ▪ Leading Edge Blanking

▪ Various protections: • Overcurrent Protection (OCP), pulse-by-pulse sensing • Overload Protection (OLP), auto restart after certain duration • External Latch Protection (ELP), latched • Overvoltage Protection (OVP), latched • Thermal Shut Down (TSD), latched ▪ Externally-activated shut down protection (ELP) for emergency system shut down ▪ Auto-Burst Standby function (pin < 0.1 W at zero output load condition) ▪ Audible noise reducing function in Standby mode ▪ TO-220 full-molded package with 6 pins

Selection Guide Part Number

Packing

STRW6253D

50 pieces per tube

Pin-out Diagram

Terminal List Table Number

Name

1

D/ST

2

NC

3

S/OCP

4

Description

Functions

Drain/startup terminal

MOSFET drain and input of start-up signal

Clipped

No connection

Source/Overcurrent Protection terminal

MOSFET source and input of overcurrent detection signal

VCC

Power supply terminal

Input of power supply for control circuit

5

GND

Ground terminal

Ground

6

FB

Feedback terminal

Input of constant voltage control signal

7

FM/ELP

Frequency jittering and External Latch Protection terminal

Control input for frequency jittering control and External Latch Protection

1 2 3 4 5 6 7

All performance characteristics given are typical values for circuit or system baseline design only and are at the nominal operating voltage and an ambient temperature, TA, of 25°C, unless otherwise stated. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

2

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

ABSOLUTE MAXIMUM RATINGS at TA = 25°C Symbol

Terminal

Rating

Unit

Drain Current1

Characteristic

IDpeak

1-3

Single Pulse

Note

10

A

Maximum Switching Current2

IDMAX

1-3

TA = –20 to 125°C

10

A mJ

EAS

1-3

Single Pulse

86

IDpeak

1-3

VDD = 99 V, L = 20 mH

2.7

A

S/OCP Terminal Voltage

VOCP

3-5

–2 to 6

V

FM/ELP Terminal Voltage

VFM

7-5

–0.3 to 12

V

FM/ELP Terminal Inflow Current

IFM

7-5

3

mA

FB Terminal Voltage

VFB

6-5

–0.3 to 9

V

Controller (MIC) Input Voltage

VCC

4-5

0 to 32

V

MOSFET Power Dissipation4

PD1

8-1

With infinite heatsink

27.5

W

Without heatsink

1.3

W

Controller (MIC) Power Dissipation

PD2

5-3

For Vcc×Icc

0.8

W

Operating Internal Frame Temperature

TF



Refer to TOP

–20 to 115

°C

Operating Ambient Temperature

Top



–20 to 115

°C

Storage Temperature

Tstg



–40 to 125

°C

Channel Junction Temperature

TJ



150

°C

Single Pulse Avalanche Energy3

1Refer

to figure 1 2I DMAX is the drain current on the D/ST pin determined by the drive voltage of the IC and the threshold voltage, Vth, of the MOSFET 3Refer to figure 3 4Refer to figure 4

Figure 1 – MOSFET Safe Operating Area Derating Curve

Figure 2 – MOSFET Safe Operating Area Drain Current versus Voltage at TA = 25°C, Single Pulse 100.00

80

10.00 Drain Current, ID (A)

Safe Operating Area Temperature Derating Coefficient (%)

100

60

40

0. 1

1

it m ) t li S(on n rre R D Cu e to du

1.00

m

m s

s

0.10 20 Refer to figure 1 for MOSFET SOA temperature derating coefficient 0.01

0 0

25

50

75

100

Temperature, TF (°C)

125

150

1

10

100

1000

Drain-to-Source Voltage, VDS (V)

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

3

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

Figure 3 – MOSFET Avalanche Energy Derating Curve

Figure 4 – Transient Thermal Resistance 10.00 Transient Thermal Resistance, RQJC (°C/W)

80

60

40

20

1.00

0.10

0.01

0 25

50

75

100

125

150



10μ

100μ

1m

10m

100m

Time, t (s)

Channel Junction Temperature, TJ (°C)

Figure 5 – MOSFET Power Dissipation versus Temperature 30

25 Power Dissipation, PD1 (W)

EAS Temperature Derating Coefficient (%)

100

20

With infinite heatsink PD1 = 26 W at TA ≤ 25°C

15

10

5

Without heatsink PD1 = 1.3 W at TA ≤ 25°C

0 0

20

40

60

80

100

120

140

160

Ambient Temperature, TA (°C)

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

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60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

ELECTRICAL CHARACTERISTICS valid at VCC = 18 V, TA = 25°C, unless otherwise specified Characteristic

Symbol Terminal

Test Conditions

Min.

Typ.

Max

Units

Power Supply Start-up Operation Operation Start Voltage

VCC(ON)

4-5

(VCC voltage at which operation starts) Measurement circuit 1, VCC = 0 through 13.9 through 17.1 V

13.9

15.5

17.1

V

Operation Stop Voltage

VCC(OFF)

4-5

(VCC voltage at which operation stops) Measurement circuit 1, VCC = 17.1 through 9.8 to 8.0 V

8.0

8.9

9.8

V

ICC(ON)

4-5

(Inflow current into VCC terminal in oscillation) Measurement circuit 1



1.4

2.8

mA

Circuit Current in Non-Oscillation

ICC(STOP)

4-5

(Inflow current into VCC terminal at VFB = 0 V) Measurement circuit 1



0.8

1.3

mA

Circuit Current in Non-Operation

ICC(OFF)

4-5

(Inflow current into VCC terminal prior to oscillation) Measurement circuit 1, VCC = 13.8



5

20

μA

Start-up Current

Istartup

4-5

(Inflow current into D/ST terminal) Measurement circuit 7, VCC = 0, D/ST = 450 V

–0.9

–1.6

–2.3

mA

Bias Assist Voltage

VBIAS

4-5

(VCC voltage at which Istartup starts, and IstartupBias begins) Measurement circuit 7, VCC = 17.1 through 13.6 to 16.8 V

13.6

15.2

16.8

V

FM/ELP High Threshold Voltage

VFM(H)

7-5

(FM/ELP terminal voltage at which IFM changes from –13 μA to 13 μA) Measurement circuit 2

4.0

4.5

5.0

V

FM/ELP Low Threshold Voltage

VFM(L)

7-5

(FM/ELP terminal voltage at which IFM changes from 13 μA to –13 μA) Measurement circuit 2

2.4

2.8

3.2

V

FM/ELP Voltage Hysteresis

VFMhys

7-5

(VFM(H) – VFM(L)) Measurement circuit 2

1.4

1.7

1.8

V

–17.4

–13

–8.6

μA

Circuit Current in Operation

Operating Characteristics

FM/ELP Outflow Current1

IFMsrc

7-5

(FM/ELP terminal outflow current at VFM = VFM(L)) Measurement circuit 2

FM/ELP Inflow Current1

IFMsink

7-5

(FM/ELP terminal inflow current at VFM = VFM(H)) Measurement circuit 2

8.6

13

17.4

μA

Average Switching Frequency

fOSC(av)

1-5

(D/ST terminal average oscillation frequency) Measurement circuit 2

60

67

74

kHz

∆f

1-5

fOSC (peak-to-peak) Measurement circuit 2

4.8

6.9

9

kHz

DMAX

1-5

(Maximum width of the low portion of the D/ST terminal waveform) Measurement circuit 2

71

75

79

%

FB Maximum Feedback Current1

IFB(MAX)

6-5

(FB terminal outflow current at VFB = 0 V) Measurement circuit 3

–220

–160

–100

μA

Burst Threshold Voltage

Vburst(th)

6-5

Set VFM = 0 V and decrease VFB (Vburst(th) is the FB terminal voltage level at which D/ST changes from low to high) Measurement circuit 3

0.99

1.10

1.21

V

Slope Compensation Start-up Duty Cycle

DSLP

6-5

DSLP = (t3 / t4) × 100 (see figure for measurement circuit 4 for values of t) Measurement circuit 4



27



%

Slope Compensation Rate

SLP

6-5

SLP = 0.02 / (t2 – t1) (see figure for measurement circuit 4 for values of t) Measurement circuit 4

–22

–17

–12

mV/μs

Frequency Jitter Deviation Maximum Duty Cycle

Continued on next page…

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

5

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

ELECTRICAL CHARACTERISTICS, continued, valid at VCC = 18 V, TA = 25°C, unless otherwise specified Characteristic

Symbol Terminal

Test Conditions

Min.

Typ.

Max

Units

Set VFM = 0 V and increase VOCP. (VOCP1 is the S/OCP terminal voltage level at which D/ST changes from low to high) Measurement circuit 5

0.71

0.78

0.86

V

Protection Operation OCP Threshold Voltage at Zero Duty Cycle (0% On-Duty)

VOCP1

3-5

DPC



DPC = –0.75× SLP / fOSC(av)

1.5

1.9

2.3

mV/ DC%

OCP Threshold Voltage After Compensation

VOCP2

3-5

VOCP2 = DPC × DMAX + VOCP1

0.82

0.93

1.04

V

Leading Edge Blanking Time

tblank

1-5

(The low portion of the D/ST terminal waveform at VOCP = 2 V) Measurement circuit 5

280

400

520

ns

OLP Delay Time

tOLP

1-5

(Time between setting FB terminal open and when oscillation stops) Measurement circuit 6



200



ms

Circuit Current in OLP-Operation

ICC (OLP)

4-5

(Inflow current into VCC terminal after OLP operation) Measurement circuit 6



410

700

μA

OVP Protection Voltage

VCC(OVP)

4-5

(VCC terminal voltage at which the voltage of D/ST terminal is switched from low to high by decreasing VFB after setting VFM = 0 V) Measurement circuit 1, VCC = 18.0 V through 27 to 30 V

27

28.5

30

V

Latch Circuit Sustaining Current2

ICC(La.H)

4-5

(Inflow current into VCC terminal after OVP operation) Measurement circuit 1, VCC = 8 V



140

220

μA

VCC(La.OFF)

4-5

(VCC voltage at which ICC is dropped below 20 μA by decreasing VCC after OVP operation) VCC = 31.0 V through 7.8 to 6.4 V

6.4

7.1

7.8

V

ELP Threshold Voltage

VELP

7-5

(FM/ELP terminal voltage at which the oscillation of the D/ST terminal waveform is stopped by increasing VFM) Measurement circuit 2

6.4

7.1

7.8

V

Inflow Current at External Latch Protection

IELP

7-5

(Inflow current at VFM = VELP) Measurement circuit 2



55

100

μA

Thermal Shut Down Operating Temperature

TJTSD



135





°C

Drain-to-Source Breakdown Voltage

VDSS

1-3

ID = 300 μA, Measurement circuit 8

650





V

Drain Leakage Current

IDSS

1-3

VD = 650 V, Measurement circuit 7





300

μA

ON-Resistance

RDS(ON)

1-3

ID = 1.2 A, VFM = 0 V Measurement circuit 10





1.9

Ω

Switching Time

tr

1-3

Measurement circuit 9





400

ns

Thermal Resistance

RθJ-F



Measured between junction and internal frame





1.75

°C/W

Single Pulse Avalanche Energy

EAS



Measurement circuit 11









Drain Peak Current Compensation Coefficient

Latch Circuit Release Voltage2

Power MOSFET Characteristics

1Input 2The

and output current polarity at the device pin; plus(+) represents sink and minus(–) represents source. latch circuit means a circuit operated ELP, OVP, and TSD.

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

6

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

Measurement Circuit 1

V CC(ON) 13.8V

STR-W6200D D/ST 1

S/OCP VCC GND 3

4

5

FB 6

FM/ ELP

V CC

7

V FM

0V

V FB

0V

5V

A ICC

V DD 10V

+

1μF V FB

V CC

8V

V CC(OFF) 3.65V

V CCc(La.OFF)

V OFF(FM) 0V

2V

VD 100Ω

32V

V CC(OVP)

18V

VD

V FM

ICC ICC(OFF)

ICC(STOP)

ICC(La.H)

ICC(ON)

Measurement Circuit 2 18V V CC

5V

V FB

STR-W6200D D/ST 1

S/OCP VCC GND 3

4

5

FB 6

FM/ ELP

VD A

+

100Ω 18V V DD 10V

0V

0V

V FM

V FML

V FB

V FM

2.8Vtyp

V LFM +(V FMH -V FML)/2 IELP

Isrc(FM)

IFM 0μA

࡮Δf =f osc(Hi)-f osc(Lo) ࡮Dmax= t2/ t1х100

Isnk(FM)

1μF

V CC

V ELP

4.5Vtyp

V FMH

7

IFM

5V

t2

VD f osc(Hi)

f osc(av) t1

f osc(Lo)

Measurement Circuit 3 18V V CC 5V

5V

V FM

STR-W6200D D/ST 1

S/OCP VCC GND 3

4

5

6

FM/ ELP

5V V FB

7

V HYS Vburst

5V

0V

IFB

VD +

100Ω 18V V DD 10V

FB

0V

V CC

VD

A

1μF

V FM V FB

-IFB

IFB(MAX)

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

IFB(MIN)

7

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

Measurement Circuit 4 18V V CC

5V

3.65V

V FM

STR-W6200D D/ST 1

VD 100Ω

S/OCP VCC GND 3

4

5

FB 6

V FB

+

V DD 10V

V FB

7

V OCP 18V

FM/ ELP

1μF

V FM

4V V1

Internal feedback signal 0.68V V1-0.02V

V1-0.04V

V OCP

t4

4V

V CC

VD ࡮DSLP= t3 / t4 ˜100 ࡮SLP = 0.02 / (t2-t1)

t1

t2

t3

t5(≈tblank)

Measurement Circuit 5 18V V CC 5V V FM

STR-W6200D D/ST 1

VD 100ǡ

S/OCP VCC GND 3

4

5

FB 6

FM/ ELP 7

3.65V

0V

2V V OCP1 V OCP

0V

V OCP

tblank

+

18V V DD 20V

1μF

V FM

V CC

VD

V D(Lo)

VOCP2 = (–0.75 × SLP × DMAX / fOSC(av)) + VOCP1

Measurement Circuit 6

18 V V CC

STR-W6200D D/ST 1

S/OCP VCC GND 3

VD 100Ω

4

5

ICC A

6

FM/ ELP

+

SW

V FM

7

t FM SW ONψOFF

V FB

1μF V DD 10V

FB

7.8 V typ

V FB V FM 47nF

VD

V CC 18V

ICC(OLP)

ICC t OLP(= t FM˜16)

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

8

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

Measurement Circuit 7 650V

400V V DD 18V

STR-W6200D D/ST 1

S/OCP VCC GND 3

ID

4

ICC

A

5

FB 6

V CC

FM/ ELP

13V

0V

V FM

7

V BIAS

5V

0V

A ID +

V DD

V CC

IDSS

V FM

ICC

1μF

ISTARTUP

Measurement Circuit 8

STR-W6200D D/ST 1

S/OCP VCC GND 3

4

5

FB 6

FM/ ELP 7

Measurement Circuit 9

STR-W6200D D/ST S/OCP 1

VD

3

VCC GND 4

5

FB 6

FM/ ELP

VD

10V

7

90%

VD ID

V

+

300 μ A

18V

V FM

1μF

47nF

V CC

100Ω

+

18V V DD 10V

10%

V FM

1μF

47nF

V CC

tr

Measurement Circuit 10

18V V CC

STR-W6200D D/ST 1

S/OCP VCC GND 3

4

5

FB 6

FM/ ELP 7

VD V

ID 0.6A

5V V FM

0V

+

18V V CC

1μF

V FM

VD

V D(Lo) RDS(ON) =V D(Lo) / 0.6

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

9

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

Measurement Circuit 11

Vcc

STR-W6200D D/ST S/OCP

L

1

3

VCC GND 4

V DD

5

FB 6

FM/ ELP

18V

8V

V GS

7

V DSpeak

+

V DS 18V V GS

IL

1μF

V DD

V DS

V CC

t

TYPICAL APPLICATION CIRCUIT

O UT

V IN ( ac)

1

4

D/ST

VCC

S T R -W 6200D FM / S/O C P ELP 3 7

GND 5

FB 6

G ND

Option

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

10

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

PACKAGE DIMENSIONS, TO-220

Ø3.2 ±0.2

2.6 ±0.1 Terminal dimension at case surface

+0.2

5.0 ±0.5 (5.4)

1)

+0.2

1.74 –0.1

×R (2

1.34 –0.1

10.4 ±0.5

XXXXXXXX XXXXXXXX

2.8 MAX

Branding

16.9 ±0.3

2.8 ±0.2

7.9 ±0.2

Gate Burr

4.2 ±0.2

4 ±0.2

10.0 ±0.2

+0.2

6×P1.27 ±0.15 = 7.62 ±0.15 Terminal dimensions at case surface

0.45 –0.1

5.08 ±0.6 Terminal dimension at lead tips

1 2 3 4 5 6 7

Gate burr: 0.3 mm (max.) Terminal core material: Cu Terminal treatment: Ni plating and solder dip Heat sink material: Cu Heat sink treatment: Ni plating Leadform: 2003 Weight (approximate): 2.3 g

Drawing for reference only Branding codes (exact appearance at manufacturer discretion): 1st line, type: W6253 2nd line, lot: YMDD R Where: Y is the last digit of the year of manufacture M is the month (1 to 9, O, N, D) DD is the 2-digit date R is the manufacturer registration symbol

Dimensions in millimeters

Leadframe plating Pb-free. Device composition complies with the RoHS directive.

Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com

11

60 W-Universal Input/90 W-230 Vac Input PWM Switching Regulators

STR-W6253D

PACKING SPECIFICATIONS Minimum packing option: Tube FM-205 E

4.8

+0.4 0

1.4

5.1 9 × R0.6

35.0

(15.4)

9.5–0.1

+0.3

8.9

Shipping Tube Dimensions: Wall thickness: 0.6±0.3 mm Wall warp: