CD4060BMS CMOS 14 Stage Ripple-Carry Binary Counter/Divider and Oscillator

December 1992

Pinout

Features • High Voltage Type (20V Rating) • Common Reset • 12MHz Clock Rate at 15V

Q12 1

16 VDD

Q13 2

15 Q10

Q14 3

14 Q8

• Fully Static Operation

Q6 4

13 Q9

• Buffered Inputs and Outputs

Q5 5

12 RESET

• Schmitt Trigger Input Pulse Line

Q7 6

11 øI

Q4 7

10 ø0

VSS 8

9 ø0

• Standardized, Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”

Functional Diagram

Oscillator Features

Q4

• All Active Components on Chip

Q5

• RC or Crystal Oscillator Configuration

Q6

• RC Oscillator Frequency of 690kHz Min. at 15V

Q7

R 12 14 STAGE RIPPLE COUNTER AND OSCILLATOR

Applications • Control counters øI 11

• Timers

Q8 Q9 Q10 Q12

• Frequency Dividers VSS = 8 VDD = 16

• Time Delay Circuits

Q13 Q14

7 5 4 6 14 13 15 1 2 3

Description CD4060BMS consists of an oscillator section and 14 ripple carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all O’s state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of øI (and ø0). All inputs and outputs are fully buffered. Schmitt trigger action on the input pulse line permits unlimited input pulse rise and fall times.

ø0

9

ø0 10

The CD4060BMS is supplied in these 16 lead outline packages: Braze Seal DIP

H4W

Frit Seal DIP

H1F

Ceramic Flatpack

H6W

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

7-949

File Number

3317

Specifications CD4060BMS Absolute Maximum Ratings

Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum

Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER Supply Current

SYMBOL IDD

CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND

VDD = 18V, VIN = VDD or GND Input Leakage Current

IIL

VIN = VDD or GND

VDD = 20

VDD = 18V Input Leakage Current

IIH

VIN = VDD or GND

VDD = 20

GROUP A SUBGROUPS

LIMITS TEMPERATURE

MIN

+25

-

10

µA

+125oC

-

1000

µA

3

-55oC

-

10

µA

1

+25o

C

-100

-

nA

2

+125oC

-1000

-

nA

3

-55oC

-100

-

nA

1

+25oC

-

100

nA

2

+125oC

-

1000

nA

-

100

nA

-

50

mV

-

V

3

Output Voltage

VOL15

VDD = 15V, No Load

1, 2, 3

+25oC, +125oC, -55oC

Output Voltage

VOH15

VDD = 15V, No Load (Note 3)

1, 2, 3

+25oC, +125oC, -55oC 14.95

Output Current (Sink) (Excluding pins 9 & 10)

Output Current (Source) (Excluding pins 9 & 10)

N Threshold Voltage P Threshold Voltage Functional

IOL5

VDD = 5V, VOUT = 0.4V

UNITS

1

-55oC

VDD = 18V

MAX

2

oC

1

+25oC

0.53

-

mA

IOL10

VDD = 10V, VOUT = 0.5V

1

+25oC

1.4

-

mA

IOL15

VDD = 15V, VOUT = 1.5V

1

+25oC

3.5

-

mA

1

+25oC

-

-0.53

mA

1

+25oC

-

-1.8

mA

IOH5A IOH5B

VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V

IOH10

VDD = 10V, VOUT = 9.5V

1

+25oC

-

-1.4

mA

IOH15

VDD = 15V, VOUT = 13.5V

1

+25oC

-

-3.5

mA

1

+25oC

-2.8

-0.7

V

1

+25oC

0.7

2.8

V

VNTH VPTH F

VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND

7

+25oC

VDD = 20V, VIN = VDD or GND

7

+25oC

VDD = 18V, VIN = VDD or GND

8A

+125oC

VDD = 3V, VIN = VDD or GND

8B

-55oC

VOH > VOL < VDD/2 VDD/2

V

Input Voltage Low (Note 2)

VIL

VDD = 5V, VOH > 4.5V, VOL < 0.5V

1, 2, 3

+25oC, +125oC, -55oC

-

1.5

V

Input Voltage High (Note 2)

VIH

VDD = 5V, VOH > 4.5V, VOL < 0.5V

1, 2, 3

+25oC, +125oC, -55oC

3.5

-

V

Input Voltage Low (Note 2)

VIL

VDD = 15V, VOH > 13.5V, VOL < 1.5V

1, 2, 3

+25oC, +125oC, -55oC

-

4

V

Input Voltage High (Note 2)

VIH

VDD = 15V, VOH > 13.5V, VOL < 1.5V

1, 2, 3

+25oC, +125oC, -55oC

11

-

V

NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs.

7-950

3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.

Specifications CD4060BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER

SYMBOL

CONDITIONS (NOTES 1, 2)

Propagation Delay Input Pulse Operation øI to Q4

TPHL1 TPLH1

VDD = 5V, VIN = VDD or GND

Propagation Delay QN to QN + 1

TPHL2 TPLH2

VDD = 5V, VIN = VDD or GND

Propagation Delay RESET Transition Time

Maximum Input Pulse Frequency

TPHL3

TTHL TTLH

GROUP A SUBGROUPS TEMPERATURE

10, 11

VDD = 5V, VIN = VDD or GND

VDD = 5V VIN = VDD or GND

-55oC

+25oC o

o

+125 C, -55 C o

MIN

MAX

UNITS

-

740

ns

-

999

ns

-

200

ns

-

270

ns

9

+25 C

-

360

ns

10, 11

+125oC, -55oC

-

486

ns

-

200

ns

-

270

ns

o

9 10, 11

FØI

+125oC,

9 10, 11

VDD = 5V, VIN = VDD or GND

+25oC

9

LIMITS

+25 C o

o

+125 C, -55 C o

9

+25 C

3.5

-

MHz

10, 11

+125oC, -55oC

2.59

-

MHz

MIN

MAX

UNITS

-

5

µA

+125 C

-

150

µA

oC,

-

10

µA

NOTES: 1. VDD = 5V, CL = 50pF, RL = 200K 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current

SYMBOL IDD

CONDITIONS

NOTES

VDD = 5V, VIN = VDD or GND

1, 2

TEMPERATURE -55oC,

+25oC o

VDD = 10V, VIN = VDD or GND

1, 2

-55

+25oC

+125 C

-

300

µA

-55oC, +25oC

-

10

µA

+125oC

-

600

µA

oC, +125oC,

-

50

mV

o

VDD = 15V, VIN = VDD or GND

Output Voltage

VOL

VDD = 5V, No Load

1, 2

1, 2

+25

-55oC Output Voltage

VOL

VDD = 10V, No Load

1, 2

+25oC, +125oC, -55oC

-

50

mV

Output Voltage

VOH

VDD = 5V, No Load

1, 2

+25oC, +125oC, -55oC

4.95

-

V

Output Voltage

VOH

VDD = 10V, No Load

1, 2

+25oC, +125oC, -55oC

9.95

-

V

Output Current (Sink) (Excluding pins 9 & 10)

IOL5

VDD = 5V, VOUT = 0.4V

1, 2

+125oC

0.36

-

mA

0.64

-

mA

0.9

-

mA

1.6

-

mA

Output Current (Sink) (Excluding pins 9 & 10)

-55 IOL10

VDD = 10V, VOUT = 0.5V

1, 2

oC

+125 -55

Output Current (Sink) (Excluding pins 9 & 10)

IOL15

Output Current (Source) (Excluding pins 9 & 10)

IOH5A

Output Current (Source) (Excluding pins 9 & 10)

IOH5B

Output Current (Source) (Excluding pins 9 & 10)

IOH10

VDD = 15V, VOUT = 1.5V

VDD = 5V, VOUT = 4.6V

1, 2

1, 2

1, 2

2.4

-

mA

-55oC

4.2

-

mA

+125oC

-

-0.36

mA

-

-0.64

mA

-

-1.15

mA

-

-2.0

mA

-

-0.9

mA

-

-1.6

mA

+125

1, 2

oC

+125oC -55

7-951

oC

+125oC -55

VDD = 10V, VOUT = 9.5V

oC oC

-55 VDD = 5V, VOUT = 2.5V

oC

oC

Specifications CD4060BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER

SYMBOL

Output Current (Source) (Excluding pins 9 & 10)

IOH15

CONDITIONS VDD =15V, VOUT = 13.5V

NOTES

TEMPERATURE

MIN

MAX

UNITS

1, 2

+125oC

-

-2.4

mA

-55 C

-

-4.2

mA

o

Input Voltage Low

VIL

VDD = 10V, VOH > 9V, VOL < 1V

1, 2

+25oC, +125oC, -55oC

-

3

V

Input Voltage High

VIH

VDD = 10V, VOH > 9V, VOL < 1V

1, 2

+25oC, +125oC, -55oC

+7

-

V

Drive Current at Pin 9 Oscillator Design

IOL

VDD = 5V, VO = .4V

3

+25oC

0.16

-

mA

3

+25oC

0.42

-

mA

VDD = 10V, VO = .5V VDD = 15V, VO = 1.5V

Drive Current at Pin 9 Oscillator Design

IOH

VDD = 5V VDD = 10V VDD = 15V

Propagation Delay Input Pulse øI to Q4

TPHL1 TPLH1

VDD = 10V VDD = 15V

Propagation Delay QN to QN + 1

TPHL2 TPLH2

VDD = 10V

Propagation Delay RESET Transition Time

Maximum Input Pulse Frequency Minimum RESET Pulse Width

Minimum Input Pulse Width F = 100kHz

TPHL3

VDD = 15V

FØI

RC Operation CX Max

RX

CX

RC Operation Variation of Frequency (Unit-to-Unit)

CX = 200pF RS = 560K RX = 50k

1, 2, 3

-

-.42

mA

1, 2, 3

o

+25 C

-

1.0

mA

1, 2, 3

+25o

C

C

-

300

ns

1, 2, 3

+25

oC

-

200

ns

1, 2, 3

+25oC

-

100

ns

1, 2, 3

+25oC

-

160

ns

1, 2, 3

+25

oC

-

100

ns

VDD = 10V

1, 2, 3

+25o

C

-

100

ns

VDD = 15V

1, 2, 3

+25oC

-

80

ns

8

-

MHz

12

-

MHz

C

-

120

ns

oC

-

60

ns

VDD = 10V

VDD = 5V

o

1, 2, 3

+25 C

1, 2, 3

+25

oC

1, 2, 3

+25o

1, 2, 3

+25

VDD = 15V

1, 2, 3

+25o

C

-

40

ns

VDD = 5V

1, 2, 3

+25oC

-

100

ns

VDD = 10V

1, 2, 3

+25oC

-

40

ns

1, 2, 3

oC

-

30

ns

2, 3

+25oC

-

20

MΩ

VDD = 10V, CX = 50µF

2, 3

+25

oC

-

20

MΩ

VDD = 15V, CX = 10µF

2, 3

+25oC

-

10

MΩ

2, 3

+25

oC

-

1000

µF

+25

oC

-

50

µF

2, 3

+25

oC

-

50

µF

VDD = 10V

2, 3

+25oC

530

810

ns

VDD = 15V

2, 3

+25oC

690

940

ns

2, 3

+25

oC

18

25

kHz

2, 3

+25

oC

20

26

kHz

2, 3

+25oC

21.1

27

kHz

2, 3

+25

oC

-

2

kHz

+25

oC

-

1

kHz

VDD = 5V, CX = 10µF

VDD = 5V, RX = 500kΩ

2, 3

VDD = 5V VDD = 10V VDD = 15V

Variation of Frequency with Voltage Change (Same Unit)

mA

+25o

+25 C

VDD = 15V, RX = 300kΩ RX = 5kΩ CX = 15pF

mA

-.16

1, 2, 3

VDD = 10V

VDD = 10V, RX = 300kΩ

Maximum Oscillator Frequency (Note 4)

-

-

ns

VDD = 15V RC Operation RX Max

-1.0

80

VDD = 10V

TW

+25 C +25oC

-

VDD = 15V TW

3 1, 2, 3

o

VDD = 15V TTHL TTLH

o

CX = 200pF 5V to 10V RS = 560K 10V to 15V RX = 50k

2, 3

7-952

+25

Specifications CD4060BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER

SYMBOL

Input Capacitance

CIN

CONDITIONS Any Input

NOTES

TEMPERATURE

MIN

MAX

UNITS

1, 2

+25oC

-

7.5

pF

NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. RC Oscillator applications are not recommended at supply voltages below 7V for RX < 50kΩ. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER

SYMBOL

CONDITIONS

NOTES

TEMPERATURE

MIN

MAX

UNITS

IDD

VDD = 20V, VIN = VDD or GND

1, 4

+25oC

-

25

µA

o

-2.8

-0.2

V

o

Supply Current N Threshold Voltage

VNTH

N Threshold Voltage Delta

∆VTN

VDD = 10V, ISS = -10µA

1, 4

+25 C

-

±1

V

P Threshold Voltage

VPTH

VSS = 0V, IDD = 10µA

1, 4

+25oC

0.2

2.8

V

P Threshold Voltage Delta

∆VTP

Functional

F

VDD = 10V, ISS = -10µA

1, 4

VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND

+25 C

1, 4

+25 C

-

±1

V

1

+25oC

VOH > VDD/2

VOL < VDD/2

V

1, 2, 3, 4

+25oC

-

1.35 x +25oC Limit

ns

o

VDD = 3V, VIN = VDD or GND Propagation Delay Time

TPHL TPLH

VDD = 5V

3. See Table 2 for +25oC limit.

NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

4. Read and Record

TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER

SYMBOL

DELTA LIMIT

Supply Current - MSI-2

IDD

± 1.0µA

Output Current (Sink)

IOL5

± 20% x Pre-Test Reading

IOH5A

± 20% x Pre-Test Reading

Output Current (Source)

TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD

GROUP A SUBGROUPS

Initial Test (Pre Burn-In)

100% 5004

1, 7, 9

IDD, IOL5, IOH5A

Interim Test 1 (Post Burn-In)

100% 5004

1, 7, 9

IDD, IOL5, IOH5A

Interim Test 2 (Post Burn-In)

100% 5004

1, 7, 9

IDD, IOL5, IOH5A

100% 5004

1, 7, 9, Deltas

CONFORMANCE GROUP

PDA (Note 1) Interim Test 3 (Post Burn-In)

100% 5004

1, 7, 9

100% 5004

1, 7, 9, Deltas

100% 5004

2, 3, 8A, 8B, 10, 11

Sample 5005

1, 2, 3, 7, 8A, 8B, 9, 10, 11

Subgroup B-5

Sample 5005

1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas

Subgroup B-6

Sample 5005

1, 7, 9

Sample 5005

1, 2, 3, 8A, 8B, 9

PDA (Note 1) Final Test Group A Group B

Group D

7-953

READ AND RECORD

IDD, IOL5, IOH5A

Subgroups 1, 2, 3, 9, 10, 11

Subgroups 1, 2 3

Specifications CD4060BMS TABLE 6. APPLICABLE SUBGROUPS (Continued) MIL-STD-883 METHOD

CONFORMANCE GROUP

GROUP A SUBGROUPS

READ AND RECORD

NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION

CONFORMANCE GROUPS

TEST

READ AND RECORD

MIL-STD-883 METHOD

PRE-IRRAD

POST-IRRAD

PRE-IRRAD

POST-IRRAD

5005

1, 7, 9

Table 4

1, 9

Table 4

Group E Subgroup 2

TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION

OPEN

GROUND

VDD

Static Burn-In 1 Note 1

1 - 7, 9, 10, 13 - 15

8, 11, 12

16

Static Burn-In 2 Note 1

1 - 7, 9, 10, 13 - 15

8

11, 12, 16

Dynamic Burn-In Note 1

-

8, 12

16

1 - 7, 9, 10, 13 - 15

8

11, 12, 16

Irradiation Note 2

9V ± -0.5V

50kHz

25kHz

1 - 7, 9, 10, 13 - 15

11

-

NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V

Logic Diagram ø0

9

ø 0 10 *** ø I 11

* *

ø1 Q1

*

FF1 ø1 Q1

ø2

Q13 FF2-FF13

ø2

Q13

ø14 Q14 FF14 ø14 Q14

Q14 * ** RESET 12 Q4 - Q10 Q12, Q13

**R = HIGH DOMINATES (RESETS ALL STAGES) VDD ***COUNTER ADVANCES ONE BINARY COUNT ON EACH NEGATIVE - GOING TRANSITION OF øI (AND øO)

*ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK

VSS

DETAIL OF TYPICAL FLIP-FLOP STAGE ø

ø

p

p R

n

n

Q

R

ø

ø ø

ø

p

p

n

n

ø

ø

7-954

Q

CD4060BMS

AMBIENT TEMPERATURE (TA) = +25oC

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

25 20 15

10V

10 5

5V 0

5

10

AMBIENT TEMPERATURE (TA) = +25oC

15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 10V

7.5 5.0 2.5

15

5V 0

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

FIGURE 1. TYPICAL N-CHANNEL OUTPUT LOW SINK CURRENT CHARACTERISTICS

0

AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V

FIGURE 2. MINIMUM N-CHANNEL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5

0 -5 -10 -15

-10V

-20 -25

-15V

-30

-5

-10V

PROPAGATION DELAY TIME (tPLH, tPHL) (ns)

PROPAGATION DELAY TIME (tPLH, tPHL) (ns)

SUPPLY VOLTAGE (VDD) = 5V 100

10V 50 15V

40

60

80

-15

FIGURE 4. MINIMUM P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS

150

20

-10

-15V

AMBIENT TEMPERATURE (TA) = +25oC

0

0

GATE-TO-SOURCE VOLTAGE (VGS) = -5V

FIGURE 3. TYPICAL P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS

0

0

AMBIENT TEMPERATURE (TA) = +25oC

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5

5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

30

OUTPUT LOW (SINK) CURRENT (IOL) (mA)

OUTPUT LOW (SINK) CURRENT (IOL) (mA)

Typical Performance Curves

100

LOAD CAPACITANCE (CL) (pF)

FIGURE 5. TYPICAL PROPAGATION DELAY TIME (QN TO QN+1) AS A FUNCTION OF LOAD CAPACITANCE

7-955

AMBIENT TEMPERATURE (TA) = +25oC 700 600 500 SUPPLY VOLTAGE (VDD) = 5V 400 300 10V

200 100 0

15V 0

20

40 60 80 LOAD CAPACITANCE (CL) (pF)

100

FIGURE 6. TYPICAL PROPAGATION DELAY TIME (Ø1 TO Q4 OUTPUT) AS A FUNCTION OF LOAD CAPACITANCE

CD4060BMS (Continued) 105

TRANSITION TIME (tTHL, tTLH) (ns)

AMBIENT TEMPERATURE (TA) = +25oC

200 SUPPLY VOLTAGE (VDD) = 5V

150

100 10V 15V

50

0 0

20

DYNAMIC POWER DISSIPATION (PD) (µW)

Typical Performance Curves

8 6 4 2

104

SUPPLY VOLTAGE (VDD) = 15V

8 6 4

10V

2

5V

10V

103

8 6 4 2

LOAD CAPACITANCE

102

8 6 4

CL = 50pF CL = 15pF

2

10

40 60 80 100 LOAD CAPACITANCE (CL) (pF)

AMBIENT TEMPERATURE (TA) = +25oC

2

4 6 8

0.1

2

1

4 6 8

2

10

4 6 8

102

2

4 6 8

103

2

4 6 8

104

INPUT FREQUENCY (føI) (kHz)

FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE

FIGURE 8. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF INPUT FREQUENCY

Test Circuits VDD

500µF

ID

CL CL CL CL CL

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8

9

CL CX CL CL RX

RS

CL

11

10

9

CL NOTE: RS IS 2RX TO 10RX T = 2.2 RXCX

PULSE GENERATOR 12

FIGURE 9.

DYNAMIC POWER DISSIPATION TEST CIRCUIT

FIGURE 10. TYPICAL RC CIRCUIT

7-956

CD4060BMS Test Circuits

(Continued)

11 C1

9

10

RC RS C2

NOTE: CXTAL = C1 + C2 + CSTRAY RC = Broader frequency response RS = Current limiting

FIGURE 11. TYPICAL CRYSTAL CIRCUIT

Chip Dimensions and Pad Layout

Dimension in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch).

METALLIZATION: PASSIVATION:

Thickness: 11kÅ − 14kÅ,

AL.

10.4kÅ - 15.6kÅ, Silane

BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches

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957

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