Digital Filters: Real-time and Not-so-real-time Overview: In the final lab assignment for EE 160, you will learn how to implement the powerful tools of digital filtering in a LabVIEW programming environment. So far, you have studies circuits containing one semiconductor device (the BJT amplifier), and circuits containing perhaps a few dozen semiconductor devices integrated on one chip (the op-amp circuits you studied at the beginning of the course.) It’s fitting that we wind the semester up by “building” a circuit from the high end of Moore’s Law, one that is implemented in a PC containing many thousands of semiconductor devices. A key point to remember here is that all through our lab work, we have been interesting in measuring fairly simple relationships. Those relationships link the input of a circuit to its output and have been expressed in different ways, the most useful expressions being in the time and frequency domains. In this lab assignment you will use the computer at your own lab station to perform measuring tasks that you are already familiar with, but for some of the work you will be using the computer at the lab station next to yours to act as the digital filter whose properties you measure. Therefore, if you haven’t gotten along well with your next-door neighbor in lab up to now, it might be a good time to make amends. In this assignment, you will be supplied with a minimum of direction, since by now you are should be familiar with measuring frequency responses and time waveforms and with using LabVIEW. Off-line digital filtering (not-so-real time): A thorough treatment of digital filters constitutes at lease one entire course, probably more. You won’t have time to do more than scratch the surface in this project. We are going to consider band-pass filters only, the kind you might use to extract a single-frequency sinusoid from noise and other interfering frequencies. Ideally, such filters should pass with no loss all of the frequencies between a lower limit frequency, f-low, and an upper limit frequency we will express as f low + (bandwidth) . LabVIEW has many digital filters available in the Functions Palette under Analyze\Signal Processing\Filters. Two of them, the Butterworth and the Inverse Chebyshev filters have been incorporated into a Computer Aided Design (CAD) program on your computers in the Laboratory. This program is named fildesign.vi, and is located in a folder called ee160_438. The first tasks in this lab assignment utilize this program.

Fig. 1. A front-panel from the fildesign.vi.

Task 1. Suppose you want to design a digital filter that will take as input a 15Hz square wave, and pass only the 45 Hz third harmonic. All other harmonics and all noise at other frequencies should be attenuated as much as possible. A good goal would be to attenuate the first and the fifth harmonics by at least a factor of 1000. Use the fildesign.vi to design a filter that does this, keeping the order of the filter as low as possible. It’s important to keep the order low for two reasons: 1) In Fig. 1, note how for a 7th order filter, the really good-looking frequency response (in this case for a center frequency of 30Hz) came at the cost of a rather slow time-domain response, i.e, it takes this filter a rather long time to recognize that it has an input at its center frequency. 2) In a digital filter, high filter order takes more computation time to calculate what the output should be, and this limits the sampling frequency at which the filter can work if it is operating in real-time. (When referring to real-time digital filters or computer control systems, the sampling frequency is sometimes called the “looprate.”) Obtain the approval of your TA for your filter design, then print out a copy of the front panel to turn in along with your other results. If you tried a good many design variations, you should have observed the following trends:

1) If you don’t care about computational overhead (order), or about the transient response, (i.e., you are doing “off-line” signal processing) there is almost no limit to how “good-looking” you can make the frequency response of a digital filter. 2) Combining the desired frequency response with a low order and a fast transient response is a really difficult design problem. Task 2. Investigate the constraints of real-time computer filter operation. Use any convenient signal source (like the HP signal generator) to generate a 10Hz symmetric triangle wave and connect this signal to channel AI(1). Go to the anlog_io.llb in the daq examples folder and open the AIAO Control Loop Hardware-timed.vi. Set the loop rate control on the front panel to about 100 Hz and Run the VI. You should see the triangle wave on the waveform chart. Stop the VI and look at its diagram. Double-click on the sub-VI called my contrl calc, then look at the sub-VI diagram. Note that no transformation at all is done on the input signal. The time needed for one iteration of the While Loop in the main AIAO Control Loop VI sets the highest scan rate that any real-time digital filter could run at on this machine. Determine the highest loop rate at which your computer can run this AIAO Control Loop VI by gradually increasing the loop rate until the VI won’t run. Remember that you must stop the VI before you can reset the loop rate. Enter this rate on the Results Summary at the end of this document. Have your TA initial next to this entry to attest that he/she has also observed this maximum loop rate. Task 2a. Measure the effect of putting a simple calculation inside the my contrl calc subVI. Put an absolute value calculation into the my contrl calc subVI for Channel 0 and see if a such a simple calculation changes the maximum loop rate. Enter this rate on the Results Summary at the end of this document. Have your TA initial next to this entry to attest that he/she has also observed this maximum loop rate. Task 3. Determine the maximum loop rate for the AIAO Control Loop VI when you have substituted your designed filter for the my contrl calc subVI. The main VI will run faster if you just wire constants with the proper values to whatever digital filter VI you wind up using. An example is shown below:

Fig. 2. Replacing the upper mycontrlcalc.vi with a Butterworth filter, low cutoff = 20Hz, high cutoff=40Hz, order=2, init =true. Note that you must convert the incoming value into an array of length 1, and convert the filter output from an array back to a number. You need to wire the loop rate control outside the loop to the fs terminal of the filter VI. Modify the AIAO Control Loop VI to incorporate the filter you designed in Task 1. Determine its maximum operating loop rate the same way you did in Task 2. Different machines may give different results here. In the event your loop rate with your filter is too slow (not at least twice the fifth harmonic frequency, then highest frequency you have to deal with), you will need to go back and redesign your filter, or start over and work with a lower-frequency square wave. If this problem arises for you, consult your TA concerning whether you should redesign your filter or work with a lower frequency square wave. Enter the maximum loop rate you measured on the Results Sheet. Have your TA initial the entry to attest that he/she has observed this maximum loop rate. Task 4. Measure the frequency response function of your digital filter. Set up your final digital filter program on your computer. Set up your transfer function measuring program on your neighbor’s computer. Connect the AI and AO terminals as shown below:

Set the sampling and update rates for the transfer function VI equal to the maximum loop rate for the digital filter VI. When you have a front panel showing graphs of the magnitude and the phase of the digital filter’s transfer function versus frequency, show

the working system to your TA. Print out a front panel under these conditions, have your TA initial it, and attach it to the Results Summary.

EE 160 Digital Filter Project – Results Summary (to be filled out and turned in to your TA)

Name________________________________ Lab Section __________________ TA__________________________________ Task 1. Filter design: Filter Parameters: List parameter name and value:

(attach front panel from fildesign.vi) Task 2: Maximum loop rate for AIAO Control…vi without modification:________Hz TA initials_______ Task 2a: Maximum loop rate for AIAO Control…vi with absolute value calculation modification:________Hz TA initials_______ Task 3: Maximum loop rate for AIAO Control…vi full digital filter modification:________Hz TA initials_______ Task 4: Frequency response measurement: (attach front panel from Transfer Function measurment VI TA initials.