DC Coupled CMOS Amplifier
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING
DC Coupled MOSFET Amplifier Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee/ Microelectronic Engineering Rochester Institute of Technology 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Email:
[email protected] MicroE webpae: http://www.rit.edu/kgcoe/microelectonic/
1-13-17 DC_Coupled_MOSFET_Amp.ppt Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
INTRODUCTION The following will be covered at the beginning of lab. These pages represent the instructors prelab.
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
SPICE MODELS FOR CD4007 MOSFETS *SPICE MODELS FOR RIT DEVICES AND LABS - DR. LYNN FULLER 1-11-20175 *LOCATION DR.FULLER'S COMPUTER *and also at: http://people.rit.edu/lffeee * *----------------------------------------------------------------------*Used in Electronics II for CD4007 inverter chip *Note: Properties L=10u W=170u Ad=8500p As=8500p Pd=440u Ps=440u NRD=0.059 NRS=0.059 .MODEL RIT4007N7 NMOS (LEVEL=7 +VERSION=3.1 CAPMOD=2 MOBMOD=1 +TOX=4E-8 XJ=2.9E-7 NCH=4E15 NSUB=5.33E15 XT=8.66E-8 +VTH0=1.4 U0= 1300 WINT=2.0E-7 LINT=1E-7 +NGATE=5E20 RSH=300 JS=3.23E-8 JSW=3.23E-8 CJ=6.8E-8 MJ=0.5 PB=0.95 +CJSW=1.26E-10 MJSW=0.5 PBSW=0.95 PCLM=5 +CGSO=3.4E-10 CGDO=3.4E-10 CGBO=5.75E-10) * *Used in Electronics II for CD4007 inverter chip *Note: Properties L=10u W=360u Ad=18000p As=18000p Pd=820u Ps=820u NRS=O.027 RD=0.027 .MODEL RIT4007P7 PMOS (LEVEL=7 +VERSION=3.1 CAPMOD=2 MOBMOD=1 +TOX=5E-8 XJ=2.26E-7 NCH=1E15 NSUB=8E14 XT=8.66E-8 +VTH0=-1.65 U0= 400 WINT=1.0E-6 LINT=1E-6 +NGATE=5E20 RSH=1347 JS=3.51E-8 JSW=3.51E-8 CJ=5.28E-8 MJ=0.5 PB=0.94 +CJSW=1.19E-10 MJSW=0.5 PBSW=0.94 PCLM=5 +CGSO=4.5E-10 CGDO=4.5E-10 CGBO=5.75E-10) *----------------------------------------------------------------------Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
CALCULATIONS FOR DIFF AMP CURRENT SOURCE Current Source Hand Calculations: Assume transistors are in saturation
IDsat = µW Cox’ (Vg-Vt)2 2L NMOS SPICE model shows: VT=1.4, KP=UO Cox’=60uA/V2 NMOS Parameters shown as: L=10u, W=170u, NRD=0.059, NRS=0.059. PMOS SPICE model shows: VT=1.65, KP=UO Cox’ = 23uA/V2 PMOS parameters as: L=10u, W=360u, NRD=0.027 NRS=0.027. For the current source: ID = 4mA = 0.5(60uA/V2 )(170u/10u)(VG-1.4)2 7.84=(VG-1.4)2 VG=4.2 SPICE GIVES=4.37 Measured from family of curves gives Vg=4.3
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
DIFF AMP GAIN CALCULATIONS Diff Amp Hand Calculations: Differential Gain Vodiff/Vindiff = gm ro//RL
Single Sided Gain Voss/Vindiff = ½ gm ro//RL See Sedra and Smith, pages 644-646. It specifically talks about the differences between differential and single ended outputs. It says that using load resistors you get 1/2 the gain if you take your output single ended. But it says that you can fix this by using a current mirror load, which provides a matching current of the one drawn by the driving transistors and results in Iout=(2*Id/2) to the output. This compensates the 1/2 loss.
It is the use of a current-mirror in the load that leads to a gain of Avss = gm(ro2//ro4//RL) for single ended outputs using current mirror load. ro comes from lambda: Assume l=0.01 for NMOS and l=0.02 for PMOS ro for NMOS = (1/l) (1/ID) = 1/0.01 1/2m = 50K ohm ro for PMOS = (1/l) (1/ID) = 1/0.02 1/2m = 25K ohm Transconductance gm = DId/DVg = 1.1mA /0.5V = 2.2mS Thus Avss = Hand Calculation of Gain = 2.2m (50K//25K) = 2.2m(16.66K) = 37 V/V SPICE gives Gain = 38 V/V Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
HAND CALCULATION OF OVERALL GAIN +5 V M3
M4
VDD 5V (DC)
M7 M1
RD7
R
+
IREF
vid –
10
Rout
1 k 100 F
M2
51
vsig 1 kz
~
Rout8 RD8
VSS 5V (DC)
Io M5
Vcom (DC)
M8 RS = 200
M6 –5V
100 F
vo RL 20 k
gm of m7 = Id/Vgs = 3mA / (3.85-1.65) = 1.36mS Voltage gain of output stage Avd = gm7 (ro7//ro8//RL) = 1.36m (16.66K//33K//20K) = 1.36m x 7K = 9.52 Overall amplifier gain = Av1 x Av2 Av total= 40 x 9.52 = 380 V/V If RL = infinite A total = 40 x 1.36mx11K = 598 V/V
Finding Id in M8 Vgs for M6 in the 4mA current source is 4.421 volts KVL 4.421 = Vgs of m8 + I x 200 where I = ½ KP W/L (Vgs – Vt)2 Guess at Vgs calculate I Find right hand side of equation if equal to 4.421 then I is correct. Id8 = ~3mA ro8 = 1/(l Id) = 33K Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
DC AMPLIFIER SPICE D (V(Vout)) Gain ~770 with an offset of ~ 14.5mV
Diff Amp Gain
Vout
Vout diff_Amp
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
DC AMPLIFIER SPICE Vout diff_Amp
Vin
Vout
Rochester Institute of Technology Microelectronic Engineering
Adding -14.5mV offset to input Results in Gain ~750 V/V
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
DC AMPLIFIER SPICE Vout diff_Amp
Vin
Vout
Rochester Institute of Technology Microelectronic Engineering
You can also fix the output offset by changing R5 resistor to 1700 but that reduces the gain to ~100 V/V
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
DC AMPLIFIER SPICE D (V(Vout)) Gain ~180
Diff Amp Gain
Vout
Vout diff_Amp
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
FREQUENCY RESPONSE (TINY CAPACITOR)
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
Gain dB vs Frequency and Phase Page 11
DC Coupled CMOS Amplifier
FREQUENCY RESPONSE (WITH CAPACITOR)
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
PSPICE – DC SWEEP AND GAIN Voltage Gain
700 V/V
Voutput vs Vinput
Do a DC sweep of Vin see Vout transition from low to high. The Rochester Institute of Technology is Voltage derivative if Vout/vin Microelectronic Engineering Gain which is 700 V/V max. © January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
PSPICE – NO INPUT OFFSET CORRECTION
Input = 10mV p-p
Output = 0.6V p-p
With no input offset correction Gain = Voutput p-p / Vinput p-p =(3.3-3.9)/.01 = 60 V/V Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
PSPICE – WITH INPUT OFFSET CORRECTION Zoom in on transition region by DC sweeping from -50mV to +50mV then change source to sinusoid and add offset.
Gain=700
Derivative of Voutput = Gain Offset = -15.8mV Voutput
Vinput p-p = 4mV Gain=2.8/.004=700V/V With 50:1 Voltage Divider Input is 50 x (2mV p-p + -15.8 mV) Rochester Institute of Technology Input is = 100mV amplitude + -0.79V offset Microelectronic Engineering © January 13, 2017 Dr. Lynn Fuller, Professor
Voutput p-p = 2.8V
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DC Coupled CMOS Amplifier
SUMMARY The two stage CMOS Operational Amplifier can work using the NMOS and PMOS transistors in the CD4007 chip. Voltage gains of over 700V/V is possible. However, being limited to the transistor sizes (L’s and W’s) for the CD4007 it is not possible to minimize the DC input offset voltage, the DC voltage needed to make the output voltage zero, which also maximizes the voltage gain. This voltage is approximately 20 mV at the non inverting input (or -20mV at the inverting input). One way to fix this is to use the DC offset capability of the signal generator and DC couple to one of the differential inputs (eliminate the input capacitor). With a 50:1 voltage divider the 20mV will be realized with ~1 volt offset. Adjust the setting to maximize gain. With a voltage gain of ~700 the input must be small for output voltages of a few volts p-p. An amplitude setting of 100mV for a sine wave at 1000 hz will provide an source of 200mv p-p giving 4mV p-p input (after the 50:1 and 4mV x 700 = 2.8V p-p output. Rochester Institutedivider) of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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DC Coupled CMOS Amplifier
REFERENCES 1. Microelectronic Circuits, Sedra and Smith 2. Device Electronics for Integrated Circuits, 2nd Edition, Kamins and Muller, John Wiley and Sons, 1986. 3. CMOS Analog Circuit Design, Phillip E. Allen and Douglas R. Holberg, Holt, Rinehart and Winston, 1987
Rochester Institute of Technology Microelectronic Engineering
© January 13, 2017 Dr. Lynn Fuller, Professor
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