DATA ACQUISITION, REAL TIME CONTROL AND ANALYSIS

DATA ACQUISITION, REAL TIME CONTROL AND ANALYSIS Daniele Carnevale and Luca Boncagni, Cristina Centioli, Gianmaria De Tommasi, Francesco Iannone Maur...
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DATA ACQUISITION, REAL TIME CONTROL AND ANALYSIS Daniele Carnevale and Luca Boncagni, Cristina Centioli, Gianmaria De Tommasi, Francesco Iannone

Maurizio Panella,

Vincenzo Vitale,

Riccardo Vitelli,…..

Master on Fusion Energy – Module 4 – L35 – 19th April 2013

Lecture Plan •  Data Acquisition System (Hardware, ADC, quantization,

Sampling time – Shannon, DAC) •  FTU control: slow - fast •  MARTe at FTU

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Signal Acquisition Introduction to hardware and theory

X(t) Input filter

ADC (sampler)

x(k)

Digital processor

y(k)

Digital Signal Processor (DSP)

DAC

Output filter

Y(t)

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Analog to Digital converter

The A/D converter transforms a function of time u(t) into a sequence {u(k)}. If the conversion is executed every T time instants then (with abuse of notation)

u(k) = u(kT ), For k ∈ Ν(the set of natural numbers, including zero). The time T is the sampling time. If the conversion is executed at times i ∈ Ν, then u(k) = u(tk ).

ti , with

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Analog to Digital converter ADC (anti-aliasing and sampler)

X(t)

AntiAliasing Filter

Sampler T

T

Quantizer (saturation)

Encoder

X(k)

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Aliasing (1) x(t)

fs =

Sampler T

x ∗ (k) =  x(kT )

1 2π f ,  ω s = = 2π fs ,   f N = s T T 2

T

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Aliasing – the spectrum of the sampled signal (2)

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Aliasing – the spectrum of the sampled signal (3)

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Aliasing – the spectrum of the sampled signal (4)

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Aliasing – the spectrum of the sampled signal (5)

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Aliasing – the spectrum of the sampled signal (6)

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Aliasing – the spectrum of the sampled signal (7)

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Aliasing – the spectrum of the sampled signal (8)

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Aliasing – the spectrum of the sampled signal (9)

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Aliasing – the spectrum of the sampled signal (10)

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Aliasing – the spectrum of the sampled signal (11)

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Aliasing – the spectrum of the sampled signal (12)

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Aliasing (13)

x(t)

Sampler T

x ∗ (k) =  x(kT )

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Aliasing: Anti-Aliasing filter (14)

x(k)

AntiAliasing Filter

Sampler T

Vo (t) =

x ∗ (k)

sCR2 +1 Vi (t) sC(R1 + R2 ) +1

Vo _ ideal (t) =

1 Vi (t) sCR1 +1

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Aliasing: Anti-Aliasing filter (15) Vo (s) =

sCR2 +1 Vi (s) = FAA (s)Vi (s) sC(R1 + R2 ) +1

Vo _ ideal (s) =

High frequency noise… white noise can help…

1 Vi (s) = FAA _ i (s)Vi (s) sCR1 +1

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Aliasing: Anti-Aliasing filter choice (16) Fn (s) =

1 , 2n n s + (−1)

s 2n + (−1)n = 0 ⇔ sk = e jπ (2kn−1)/(2n), k = 1, 2,..., 2n

Fn (s) = F − (s)F + (s), | F − ( jω ) |=| F + ( jω ) |= F( jω ) =

1 1+ ω 2n

•  Butterworth Filter (degree, cut-off)-> (n, ω c ) n " s % 1 n Gn (s) := F $ ' = ω c ∏ , # ωc & k=1 s − ω c sk 1 Gn ( jω c ) = 2 − n

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ADC features: •  Input range •  Sampling speed - [0.5k,G] sample/s (response time) •  Number of channels and Resolution A/(2^b-1) - [8, 10, 12, 14,..,24] bits •  Accuracy, Nonlinearity •  Nonlinear quantization levels (log) •  Conversion type: flash (bank of comparators), successive-approximation,

sigma-delta, etc.

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Signal Analysis (very short….more in the control dedicated lecture L36) •  Filtering •  Fourier Transform (DFT, windowing,…) •  Wavelet Analysis •  Derivatives •  Zero-crossing detection •  Hysteresis and threshold crossing •  Model Identification [Giovanni Artaserse, R. Albanese… ]

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Digital to Analog converter

D

C

B

A

0

1 0

1

MSB (Most Significant Bit)

u(k)

LSB (Last Significant Bit)

u(t)

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DAC: the ideal hold device

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The Zero-Holder hold (ZOH)

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DAC features: •  Input range •  Number of channels and speed (settling time) •  Resolution - [8, 10, 12, 14, 16] bits •  Accuracy, Nonlinearity •  Conversion type: pulse-width modulator (low-pass filters), sigma-delta,

R-2R (cascade resistors) etc.

FTU plants and sub-plants

Machine (LN2,Vacuum plants, MFG...)

Radiofrequency (LH, ECRH, IBW...)

Power supplies (Toroidal, Poloidal...)

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CODAS at FTU

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CODAS architecture HARDWARE

SOFTWARE

•  DEC computers •  cPCI stations •  VME stations, CAMAC (crate) •  Westinghouse PLCs •  100-1000Mb/s Eternet cable /Optical

fiber •  ADC/DAC •  Timers

Versabus Module Eurocard station

•  Tru64, Linux, OpenVMS (virtualized) •  Special DEC SW (Live Database and Integration Platform), B*, AFS •  Mimics (synoptic), Command dispatcher, Bridges, CAMAC drivers, Log server, Alarm manager, Sequences

Liquid Nitrogen Mimic

 

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Data Acquisition system: overview n  25-30

pulses per day

n  Up

to 3000 channels CAMAC + 200 PCI + 400 VME acquired each pulse

n  ~240

MB data per pulse

E T H E R N E T

n  Data

stored on distributed file system AFS (Andrew File System)

n  Cluster

Linux data analysis

Storage System (over AFS)

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CODAS at FTU: Slow control (≈1 s) 1. 

2.  3. 

High level control ( HLC ): server with supervisory functionality (named PROMETEO) and real-time database management system. It is centered on BASEstar Open software package operating on CHARON-AXP/SMA emulator (Win x86_64); Medium level control ( MLC ): processor unit which interfaces I/O field equipment concentrating sub-plant data; Low level control ( LLC ): with hard real-time I/O functionality, handled by PLCs with about 8000 field-points.

HLC MLC LLC • 

Open source solutions in control and data acquisition systems: FTU case studies, F. Iannone, A. Bertocchi, L. Boncagni, C. Centioli, M. Panella, M. Vellucci, V. Vitale, Fusion Engineering and Design 85 (2010) 321–324.

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High Level Control ( HLC ) •  Alarm handling •  Data archiving

declare event [Request,Pid_Sender,Event_Sender,Time]

•  Automatic sequences

of operations •  Live database •  Dispatcher

Enbox_Sender

Event_Dispatcher

•  HMI ( Synoptics) •  Trends

Sender Process

Event_Sender

Enbox_Dispatcher Parsing

File

Dispatcher

declare event [Request,Event_Sender] declare event [Outcome,Pid_Receiver,Time] Event_Receiver Enbox_Receiver Receiver Process Command

outcome Plant

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Medium level control ( MLC ) The concentrators are the processor units linking the plant PLCs to PROMETEO. •  Bi-directional data transmission LLC-HLC; •  Data filter sending to HLC only changed field-points; •  Collating field data into structured data objects; •  I/O data conversion with linear and non-linear functions. FTU control system has three concentrator systems that manage 23 PLCs Numalogic PC-700 : 1.  Power supply controls 4 PLCs; 2.  Machine controls 11 PLCs; 3.  Radio-frequency controls 8 PLCs. The bidirectional link between concentrators and PLCs is RS232 asynchronous serial standard at 9600 bps. Loop topology has been adopted and optical fibre has been used to reduce electromagnetic noise. A switched FastEthernet network links concentrators to HLC supervisor computer.

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MLC : software architecture HLC

VME/cPCI stations MLC

LLC

PLCs

Plant

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Linux embedded solutions (VME (concentrators) replacement) 3U embedded CPU controller CompactPCI Pentium III @850 MHz, 256MB DRAM and a 20GB hard disk. The board is provided with i810 chip set, which contains an embedded graphics controller. FastEthernet adapter, DVI-2 RS232-USB ports are also embedded;

3U PC-MIP carrier board for universal I/O on the cPCI bus or on the PXI bus. It can install up to PC-MIPs, with two Type I/II PC-MIPs and one Type I PCMIP;

P10 high-performance quad-port UART with RS232 interface, based on the PCMIP ANSI mezzanine standard. Each 16C950 UART channel has 128-deep transmit and receive FIFO. All UARTs are capable of delivering up to 15 Mps asynchronous data throughput simultaneously;

Industrial cPCI crate with three independent PCI bus and three CONDOR power supplies for each embedded controller

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Low Level Control ( LLC) •  PLC based plant control •  PLCs connected via RS232 lines •  Each PLC has a passive role (commands & status

monitor)

Three packages: PLCs manager, commands and data-point objects manager, network data communications.

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LCL: new EPICS controlled Siemens Simatic S7-314 • PS 307 DC 24 V/10A power supply • CPU 314 with a 192 kB Micro Memory Card (MMC) • CP 343 communication processor • two SM 321 digital inputs DI 32 channels DC 24V • SM322 digital output DO 32 channels DC 24 V/0.5A • SM331 analog input, 8 channels, 12 bits • PROFINET interface A dedicated bridge and Epics channel access application provides the control of the toroidal coil power system.

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Sequences •  The Sequences are elaboration unit performing automatic

operation on FTU. They sent predetermined commands and their state evolve according to the plant state. Start Session Initialization Configuration Standby End Session

Idle Pre-Shot

4 min 15 min

Shot

20 secs

Post-Shot

3 min

Cooling

2 min

Storage15 min

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Real-Time Control Plasma Position Control System (PCS) and Gas Control (2003) •  Cycle time 0.5 ms (I/O+execution time:170 µs) •  40 analog input (magnetic measure + density), 2 digital input, 4 analog output e 6 digital output •  Codice di controllo sviluppato in C/C++ su piattaforma Linux RTAI 3.7 (kernel 32bit 2.6.23) •  CPU VME Intel Xeon LV138 2.13GHz quad-core 4GB RAM Controlled variables: •  plasma current intensity (IP) •  horizontal plasma position (rs1, rs2) •  plasma elongation •  vertical plasma position ( slight z1, z2) •  gas density (ne)

Control variables (plant input): •  T coil current (IT) •  V and F coil currents (IV, IF) •  F coil currents (IF) •  H coil current (IH) •  6 (fast) gas valves

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Real-Time Control: general picture

Measurement Systems Preprogrammed

References

(from CODAS)

Controller

Magnetic Measurements probes

( 16 saddle + 16 pick-up coils +

Vloop + VMagnet)

+

Gas Density from Interferometer

z2 rs2

rs1 z1

Feedback System

Actuating Systems

Electrical Power Supply

(feeding 4 sets of poloidal

windings)

+

Gas Injection System

(with 6 Piezoelectric valves)

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Real-Time Control: position/elongation control

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Real-Time Control: hardware architecture (2003) VME BUS T I M I N G

A A A D D D C C C #1 #2 #3

Intel Xeon 2.13GHz (RTAI O.S.)

D A C

D A C

IV, IF, IT, IH

IpON

(to the power

supply system)

D.I.

FSC Signal

Start-run Signal

6 on/off signals

(for the 6 fast valves)

CK=500 µs

Saddle

Bpol

(16)

(16)

Ethernet

ne

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Real-Time Control: feedback state diagram Storage request

Idle Abort

New Shot

Data from Codas Abort

Prerun

Off-line computation Start FSC

Real-time control End-run

Last shot data storage

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Real-Time Control: State Machine -2.0

-1.5

A STATE

-1.4

B STATE

C STATE

-1.0

-0.01

-0.001

D E STATE STAT.

+3.0

F STATE

t (sec)

•  Shot measures offset (one entire shot is dedicated to obtain the ZERO-offset) to be removed from signals in F •  Powering the toroidal magnetic component •  Preprogrammed references are emitted (Gas puffs, T pre-rump…)

• Measurements readout •  offsets and toroidal component removal •  plasma position computation •  protections check (plasma presence, no disruption and no run-away) •  PID control application •  protections check (max amplitude and max derivative) •  references emission

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Real-Time Control: control evaluation (cycle time) t + Tck

t

I N

ELAB.

O U T

wait

I N

t + 2Tck

ELAB.

O U T

wait

t (sec)

~30µs

~5µs

~100µs

Tck = 500µs

The new Control Architecture at FTU: MARTe

MARTe: Multi-threaded Application Real-Time executor (built on C++ multiplatform real-time - BaseLib2) A. Neto, F. Sartori, F. Piccolo, R. Vitelli, G. De Tommasi, L. Zabeo, A. Barbalace, H. Fernandes, D.F. Valcárcel, A.J.N. Batista and JET-EFDA Contributors MARTe: a Multi-Platform Real-Time Framework, EFDA–JET–CP(09)01/02

Tree DB

http://wpage.unina.it/detommas/MARTe-Downloads/MARTeFramework.pdf

MARTe: Multi-threaded Application Real-Time executor

Around MARTe:

Generic Application Module (GAM) •  GAM: is a block of code implementing an interface specified

in the BaseLib2 library •  GAMs are used to: interface with hardware, store acquired data, execute algorithms, take decisions based on the current state of the system, debug internal states and provide live information about the system, simulation. •  Work to be done: GAMs development and organization •  GAM: three communication points: configuration (mandatory), input and output (chaining, GAMs unaware of other GAMs…). •  Common GAMs (Hardware I/O, Algorithms, Decision tacking, Persistence, Debug, Information)

Logger •  Ensure the correct function of the system •  BaseLib2 functions: message append, information (object

name, memory location, timestamp), thread and process identifiers (machine name…) •  Consumer/producer scheme (optimizing performance): logger message are appended (by processes) to a FIFO queue, which is read by consumers (low priority). •  Messages are send using the User Datagram Protocol (UDP) •  Relay Logger Nodes Mechanism: combining messages from different machines (routing, proxy, data saving) - Organizing messages: Java dedicated application (identified by producer, severity, threa, object, filters…)

Logger Messages produced by private network

Dedicated data server Live information system

Dynamic Data Buffer (DDB) •  Exchanging data between GAMs •  Coherency (Patching: signal overwritten between GAMs) •  Specific GAMs can be implemented to send signals to other

machines…

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Real-time thread •  The real-time thread contains and schedule (sequentially)

the GAMs •  Dedicated CPU with assigned priority •  The GAMs schedule can be

opportunely programmed •  MARTe must contain at least a realtime thread •  Challenges: GAMs order of execution •  Time of execution (frequency) •  Cycle time error •  Specific IOGAMs to exchange data among threads (see below)

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Syncronization •  Shared variable (micro-senconds) among threads to keep

track of the absolute time •  External hardware for time sync (CPU time…) •  Thread control cycle: requested cycle period •  Synchronization module: interrupt or polling •  Timeouts handling •  Multiple threads: concurrent (same CPU) or parallel •  IOGAMs to exchange data among threads: output and input acquisition modules of two distinct threads act as synchronizers (output consumers thread is driven by the output producer thread)

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Syncronization

50 micro-senconds cycle Header abs time

Mapped ADCs

Buffer

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Message Interface •  BaseLib2 message protocols: synchronous messages to the

framework to start or stop specific MARTe internal services •  Message received: validation and execution of internal services (forced re-scheduling if necessary) •  Change the list of modules to be executed and GAMs parameter update

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HTTP interface •  HTTP server provided by BaseLib2 (communication channels

with internal elements) •  Available utilities: remote configuration file upload, signal server, live diagnosis, memory activity, list of registered objects etc..

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MARTe at JET •  Closed loop cycle of 50 micro-seconds •  Maximum Jitter of 2.5 micro-seconds

IOGAM (sync)

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Coding… Preliminary Steps • Create the code files for the GAM (H, CPP) • Write the GAM skeleton code • (Optional) Create a makefile to help with the compilation • Create a MARTe configuration file to instantiate and run the GAM

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Coding: the H file •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  • 

/* * File: SampleGAM.h * Author: danielv * * Created on May 31, 2010, 14:00 */ #ifndef __SAMPLEGAM_H__ #define __SAMPLEGAM_H__ #include "GAM.h" OBJECT_DLL(SampleGAM) class SampleGAM : public GAM { public: // Default constructor SampleGAM(); // Destructor virtual ~SampleGAM(); // Initialise the module virtual bool Initialise(ConfigurationDataBase& cdbData); // Execute the module functionalities virtual bool Execute(GAM_FunctionNumbers functionNumber); OBJECT_DLL_STUFF(SampleGAM) }; #endif /* __SAMPLEGAM_H__ */

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Coding: the CPP file •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  •  • 

/* * File: SampleGAM.cpp * Author: danielv * * Created on November 11, 2008, 6:12 PM */ #include "SampleGAM.h" OBJECTLOADREGISTER(SampleGAM, "$Id: $") // Default constructor SampleGAM::SampleGAM() {} // Destructor SampleGAM::~SampleGAM() {} // Initialise the module bool SampleGAM::Initialise(ConfigurationDataBase& cdbData) { CDBExtended cdb(cdbData); return True; } // Execute the module functionalities bool SampleGAM::Execute(GAM_FunctionNumbers functionNumber) { return True;

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GAM I/O (single thread)

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Comparison

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MARTe: conclusions •  real-time multi-platform C++ framework (development and

deployment of control systems) •  BaseLib2: key concepts that make code safer and easier to debug •  highly efficient logger mechanism, built-in object introspection, garbage collection of named objects and data driven object creation and configuration •  GAMs to embed hardware interfaces, algorithms and system configuration

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References (just few….) - F.Alladio, F.Crisanti, Analysis of MHD Equilibria by Toroidal Multipolar Expansions, Nuclear Fusion Vol 2.6, N. 9 (1986) - F.Crisanti,M.Santinelli, ActivePlasma Position and Current Feedback Control in the FTU Tokamak Machine, 13th SOFE, p. 1143-1163(1989) - F.Crisanti,C.Neri, M.Santinelli, FTU Plasma Position and Current Feedback Control,16th SOFE Vol. 2, p 1080-1083 (1990) - G.Fermani et al, Experimental Results and Upgrading of the Plasma Current and Position Control in FTU,16th SOFT Vol. 2, p 1080-1083 (1990) - Pizzuto, et al., The fusion advanced studies torus (FAST): a proposal for an iter satellite facility in support of the development of fusion energy, in: 22nd IAEA Fusion Energy Conference, Geneva. - A. Neto, et all, Marte: A multiplatform real-time framework, Nuclear Science, IEEE Transactions on 57 (2010) 479 –486. - A. Neto, D. Alves, L. Boncagni, P. J. Carvalho, D. F. Valcarcel, A. Barbalace, G. D. Tommasi, H. Fernandes, F. Sartori, E. Vitale, R. Vitelli, L. Zabeo, A survey of recent marte based systems, Submitted to IEEE Transactions on Nuclear Science (2011). - L. Boncagni, et all, Progress in the migration towards the real-time framework MARTe at the FTU tokamak, Fusion Engineering and Design (2011). - L. Boncagni, et all, MARTe at FTU: the new feedback control, Fusion Engineering and Design (2011). - L. Boncagni, D. Pucci, F. Piesco, E. Zarfati, G. Mazzitelli, S. Monaco, A control approach for plasma density in tokamak machines, Fusion Engineering and Design (2013).

http://www.fusione.enea.it/FTU/chisiamo/staff.html.it http://wpage.unina.it/detommas/MARTe.html