PROPRIETARY NOTICE All rights reserved by Janz Tec AG. No parts of this technical manual may be modified, copied or reproduced in any form or by any means for commercial use without the prior written permission of Janz Tec AG, Germany. All instructions, information and specification contained in this manual are for reference only and remain subject to change without announcement.

CAN-PCIL PCIbus CAN Interface (Hardware Manual) Version 2.0

refers to product revision no. V 1.x / 2.x

Title: File: Pattern: Created: Last Update:

CAN-PCIL Users Manual j:\as\entwicklung\projekte\hw\pc\can-pcil\doc\manual\can-pcil.doc \\ntserv1\novelln\daten\msoffice\msword\docvorl\ew\manual.dot Stefan Althöfer, 30.05.2012 Stefan Althöfer, 30.05.2012

© Janz Tec AG 2012

Im Dörener Feld 8 D-33100 Paderborn Tel.:

+49-5251-1550-0

FAX:

+49-5251-1550-90

email:

[email protected]

Internet:

www.janztec.com

CAN-PCIL (Hardware Manual) • Contents

i

Contents 1

Introduction 1.1 1.1.1 1.1.2 1.1.3 1.2

2

3

5

9

Handling Instructions ...........................................................................................................9 Components and Jumper Locations ................................................................................. 10 Connecting IO signals....................................................................................................... 12 Software Considerations................................................................................................... 13 Finding Free Resources.................................................................................................... 13 System BIOS ............................................................................................................... 13

Programming Information 4.1 4.2 4.3 4.4 4.5 4.5.1 4.5.2 4.5.3 4.5.4

8

Installation and Maintenance ...............................................................................................8 Ambient and Environmental Conditions...............................................................................8

Installation 3.1 3.2 3.3 3.4 3.5 3.5.1

4

Features ...............................................................................................................................5 Hardware ........................................................................................................................5 Hardware Customization ................................................................................................5 Software..........................................................................................................................6 Functional Overview ............................................................................................................7

Safety Instructions 2.1 2.2

5

14

PCIbus configuration space .............................................................................................. 14 CAN address space .......................................................................................................... 16 On-board registers ............................................................................................................ 16 nvSRAM ............................................................................................................................ 17 Register Description.......................................................................................................... 17 CAN Interrupts ............................................................................................................. 17 Board Number.............................................................................................................. 18 CAN Controller Reset .................................................................................................. 18 Expansion Module Presence Detection....................................................................... 19

Appendices

20

5.1 5.2 5.3 5.4 5.5 5.6

Technical Data .................................................................................................................. 20 References........................................................................................................................ 22 Pin Assignment CAN0/1 Connector U100/200 ................................................................. 23 Pin Assingment Flat Cable Header (CAN-2 and CAN-3) ................................................. 24 Product History.................................................................................................................. 25 Manual History .................................................................................................................. 26

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ii

CAN-PCIL (Hardware Manual) • Contents

List of Figures figure 1: CAN-PCIL block diagram ...........................................................................................................7 figure 2: Mounting of CAN-PCIx/EXT on CAN-PCIL ................................................................................9 figure 2: Component side of CAN-PCIL ................................................................................................ 10 figure 3: Bracket for CAN-PCIL boards ................................................................................................. 12 figure 4: MODULbus interrupt scheme (likewise for CAN_INT2# and CAN_INT3#) ............................ 17 figure 5: Physical Dimensions ............................................................................................................... 21

List of Tables Table 1:CAN-PCIL standard products......................................................................................................5 table 1: User jumper functions............................................................................................................... 11 table 4:Pin assignment flat cable header .............................................................................................. 24

© Janz Tec AG

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CAN-PCIL (Hardware Manual) • Contents

iii

About this Manual This is the Hardware Manual for the CAN-PCIL CAN fieldbus controller board for PCI bus. It gives all necessary information to users and programmers of the CAN-PCIL. We try to keep it compact, so there are no special section for users and programmers. Users that are no programmers might therefore only read the first sections (Introduction and Installation), and come back to the detailed sections when they need a special information. In any case, this manual assumes that the users, especially programmers, are familiar with their job. Were not specific to the CAN-PCIL, we do not give basic information about programming, computer hardware or describe operation of bus-systems. You will find pointers to advance information in section 4.2. The manual starts of with some Introduction to the CAN-PCIL. This is some prose that describes the features and architecture of the CAN-PCIL. You should already know this if you have bought the board! It then discusses some topics about Installation and Configuration of the product. The rest of the manual will then cover technical details about the CAN-PCIL.

Conventions If numbers are specified in this manual, they will be either decimal or hexadecimal. We use C-notation to identify hexadecimal numbers (the 0x prefix). If we refer to low active signal names, they will suffixed by a “#” character. Some parts of the manual contains notices you have to observe to ensure your personal safety, or to prevent damage to property. These are visually marked with the following alert symbols: DANGER indicates that death or severe personal injury will result if proper precautions are not taken. WARNING indicates that death or severe personal injury may result if proper precautions are not taken. CAUTION indicates that minor personal injury can result if proper precautions are not taken. NOTICE indicates that damage to equipment can result if proper precautions are not taken. indicates information that we think you should have read to save your time by avoiding common problems. Important suggestions that should be followed will also be marked with this sign.

Acronyms and Abbreviations EMC ESD

Rev. 2.0

Electromagnetic capability. Electrostatic discharge.

© Janz Tec AG

CAN-PCIL (Hardware Manual) • Introduction

1

1-5

Introduction

The CAN-PCIL is a short PCIbus compatible add-in card, that is equipped with up to four non intelligent CAN Interfaces. With the CAN-PCIL, the system integrator is able to build low-cost CAN connections for industrial need. Material-No.

Product

BO-FPC-31001

CAN-PCIL/1

BO-FPC-31002

CAN-PCIL/1O

BO-FPC-31021

CAN-PCIL/1

BO-FPC-31022

CAN-PCIL/1O

BO-FPC-31122

CAN-PCIL/1O/NV/EX

BO-FPC-22040

CAN-PCIx/EXTO

Description Non-Intelligent CAN Interface for PCI Systems; one SJA1000 CAN controller Non-Intelligent CAN Interface for PCI Systems; one isolated SJA1000 CAN controller Non-Intelligent CAN Interface for PCI Systems; two SJA1000 CAN controller Non-Intelligent CAN Interface for PCI Systems; two isolated SJA1000 CAN controller Non-Intelligent CAN Interface for PCI Systems; two isolated SJA1000 CAN controller. 128 KB nvSRAM. Expansion connector for CAN-PCIx/EXT Expansion Module to add two additional isolated SJA1000 CAN controller interfaces to CANPCIH/PCIL/PCIeL.

Table 1:CAN-PCIL standard products

1.1

Features

1.1.1

Hardware

• • • • • • • • •

Non-Intelligent CAN fieldbus controller for PCIbus systems Short card form factor 32 bit PCI 2.2 target interface (PLX 9030) 5V/3.3 V PCI interface Only one PCI-bus slot occupied up to 2 CAN Interfaces with SJA1000 CAN Controllers 11 bit ID and 29 bit ID CAN Specifications supported ISO/DIS 11898, optionally opto-isolated 9pol. D-Sub connector for each CAN interface at PCI bracket

As of version 2.0 there are additional optional features: • Expansion socket to add two more CAN interfaces by adding CAN-PCIx/EXT(O). Additional CAN interfaces are brought out by 20pin flat cable connector and can be routed to PCI slot bracket or extra D-Sub openings in the housing. • 128 KB nvSRAM for non-volatile data storage without need of backup battery

1.1.2 Hardware Customization The CAN-PCIL design can be customized to your special needs. Customization is possible even at moderate quantities. Ask sales department for details. Following you find a (non-complete) list of possible customization: • Bring out power supply to the D-Sub 9 connector Rev. 2.0

© Janz Tec AG

1-6

CAN-PCIL (Hardware Manual) • Introduction

•

Remove the internal 3.3V regulator and sink power from PCI 3.3V for reduced power dissipation and cost. Add only nvSRAM or only expansion connector for optimized cost

•

1.1.3 Software Contact Janz Tec AG for more information about the available software packages.

© Janz Tec AG

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CAN-PCIL (Hardware Manual) • Introduction

1.2

1-7

Functional Overview

CAN-PCIL Control Logic

CAN-0

9 pin D-Sub connector

ISO/DIS 11898

SJA1000

CAN-1

9 pin D-Sub connector

ISO/DIS 11898

SJA1000

Local bus

PCIbus slave adapter PLX9030 PCI registers local-conf. regs.

nvSRAM

EEPROM

PCIbus 32bit 33MHz 3.3/5V

PCIbus card edge connector

The CAN-PCIL bridges the local CAN controllers to the PCI-bus. It uses the PLX9030 universal PCI to „anybus“ interface for this task. Therefore most electrical parameters of the CAN-PCIL are determined by this chip. The PLX9030 provides all the logic for a 32bit PCI 2.2 target interface. When programming with the CAN-PCIL, you should be familiar with PCI [1] and the PLX9030 [2] chip. Refer to figure 1 for a block diagram of the CAN-PCIL.

Expansion Connector

CAN-2

ISO/DIS 11898

SJA1000

CAN-3

ISO/DIS 11898

SJA1000

CAN-PCIx/EXT (optional)

Flat Cable Header

figure 1: CAN-PCIL block diagram The PLX9030, and thereby the PCI interface, are configured from a serial EEPROM device. Configuration data includes memory spaces, access timing and PCI parameters. When the configuration is done, the 9030 behaves like a proper PCIbus device. The PCI base address registers are set up so that the PCI-BIOS can assign addressing space to the CAN-PCIL. A CAN-PCIL is uniquely identified by the Device ID and Vendor ID of the PLX9030 chip and the subsystem ID and subsystem vendor ID of the CAN-PCIL itself. The CAN controllers are attached to the local bus of the PLX9030, address mappings are arranged so that the registers of each CAN controller are visible to the PCIbus memory space. Additionally, there are some local status registers (i.e. interrupt status register) that can also be accessed via PCI memory space. Furthermore address space for the nvSRAM is provided. As all CAN interrupts share a single PCI interrupt line, an interrupt status is readable, so that a CANPCIL driver can detect pending interrupts. To support more flexible control of the interrupts, each interrupt can be disabled or enabled individually.

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CAN-PCIL (Hardware Manual) • Safety Instructions

2-8

2

Safety Instructions

Refer to page iii for explanation of the warning notice system. The product described in this documentation may be operated only by personnel qualified for the specific task in accordance with the relevant documentation for the specific task, in particular its warning notices and safety instructions. Qualified personnel are those who, based on their training and experience, are capable of identifying risks and avoiding potential hazards when working with these products.

2.1

Installation and Maintenance CAUTION This product is designed to be integrated into (industrial) computer systems. DANGER This product may only be connected to power supply systems that are free of hazardous voltages (e.g. SELV). WARNING The IO interfaces (connectors) of the product are only suited to be connected to SELV circuits.

2.2

Ambient and Environmental Conditions WARNING This product does not provide a fire enclosure according to EN 60950-1. Installation is only permitted into computer systems that provide such enclosure. CAUTION Do not operate the product beyond the specified ambient conditions. DANGER Do not operate this product in potentially explosive atmosphere.

© Janz Tec AG

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CAN-PCIL (Hardware Manual) • Installation

3

3-9

Installation

When opening the shipping package of the CAN-PCIL, you should immediately check the contents of the package.

3.1

Handling Instructions NOTICE When installing the CAN-PCIL into a PC, you need to obey some handling precautions to avoid damaging your board with electrostatic discharge.

When taking the board from the anti-static bag in which it is delivered, you should wear a grounded anti-static wrist strap. The strap should also be connected to your working environment. It is recommended to first touch the board at the bracket, as this has a defined resistive path of about 2MΩ to the sensitive board electronics. Thereby a controlled discharge will take place. Before inserting the board to the PC, you should check that the power supply has enough strength to provide the extra load for the carrier board as well as for the modules that you have plugged onto the carrier board. You should also check whether the supplied voltage levels are appropriate. See section 4.2 for the specification. Before inserting the CAN-PCIL to the PC, you must turn the power off. When you insert the CAN-PCIL into the PC, a second discharge defect could arise. You need to ensure a defined discharge! Do so by „connecting“ the CAN-PCIL bracket with the ground of your PC system. This would be ensured if you touch the front panel, while you wear an anti-static wrist strap that is connected the ground of the PC. If the PC does not boot after having inserted the CAN-PCIL, turn the power off and contact us for help with your problem. When mounting the CAN-PCIx/EXT, please note that you must lock the extension board with the three screws that are delivered with the extension module.

2

2

1

1

figure 2: Mounting of CAN-PCIx/EXT on CAN-PCIL

Rev. 2.0

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CAN-PCIL (Hardware Manual) • Installation

3 - 10

DC/DC

J200

S1 EEPROM

CAN transceiver

PLD Quarz

Opto-Coupler

CAN1

U200

CAN transceiver

SJA1000

U100

CAN0

Opto-Coupler

DC/DC

J100

Components and Jumper Locations

SJA1000

3.2

PCI9030

V1.x

DC/DC

Buffer Cap.

PLD

nvSRAM

Isolator

CAN transceiver

Expansion Conn.

CAN0

J100 J200

S1

LED

DC/DC

SJA1000

EEPROM

CAN transceiver

CAN1

Isolator

SJA1000

PCI9030

LED

V2.x

figure 3: Component side of CAN-PCIL

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CAN-PCIL (Hardware Manual) • Installation

Jumper J100 J200 S1

Set Open Set Open 0..15

3 - 11

Function CAN line termination CAN0 on CAN line termination CAN0 off CAN line termination CAN1 on CAN line termination CAN1 off Board Number. To be used by drivers to identify the board. table 2: User jumper functions

If you use the jumpers to turn the CAN line termination on, you override any software settings.

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CAN-PCIL (Hardware Manual) • Installation

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3.3

Connecting IO signals

The CAN-PCIL is delivered with D-SUB connectors for the CAN I/Os. The connectors are assigned as defined by CiA DS102 oder CiA DS301.

CAN 0

Status LEDs

CAN 1

figure 4: Bracket for CAN-PCIL boards The CAN-PCIL bracket has openings special to the 9pin D-SUB connectors for CAN. If only one CAN interface equipped, the opening of CAN1 is closed. Interfaces that are added with PCIx-EXTO have no LED indicators.

© Janz Tec AG

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CAN-PCIL (Hardware Manual) • Installation

3.4

3 - 13

Software Considerations

For any information about installing drivers and other software packages related to the CAN-PCIL, refer to the documentation that comes with that driver or software.

3.5

Finding Free Resources

This section should not exist at all, as PCI is said to be plug-and-play. It however does.

3.5.1 System BIOS The first obstacle that must be checked is the BIOS of today’s PCIbus motherboards. They have a “PNP and PCI setup” section, where the interrupt resources of the system are managed. Each of the 16 interrupt controller inputs that is not used for a special purpose (timer, FPU, etc), can basically be assigned for two purposes: • •

PNP/PCI: Interrupts that are assigned to this class can be dynamically assigned to PCIbus devices or to plug-and-play devices when the system boots up. Legacy ISA: These interrupts are not subjected to PNP/PCI. They can safely be used by ISAbus add-in cards, as the BIOS will treat them as reserved. At least one of the interrupt lines must be left in PNP/PCI mode, so that the PCI BIOS can assign them to PCI-bus cards.

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© Janz Tec AG

CAN-PCIL (Hardware Manual) • Programming Information

4 - 14

4

Programming Information

This describes the methods that you need to take, when you wish to work with the CAN-PCIL. It definitely relies on the PLX9030 EEPROM configuration as defined by Janz Tec. If you manage to clear or alter the EEPROM, then this chapter will not longer apply to you.

4.1

PCIbus configuration space

The board (the interface chip) is identified by a set of IDs in PCI configuration space as listed below: Purpose Vendor ID Device ID Subsystem Vendor ID Subsystem ID CAN-PCIL/1 Subsystem ID CAN-PCIL/2

Value 0x10B5 0x9030 0x13C3 0x19xx 0x1Axx

Found in CFG space register 0x00 CFG space register 0x02 CFG space register 0x2C CFG space register 0x2E CFG space register 0x2E

The LSB of the Subsystem ID codes the hardware revision of the CAN-PCIL board. Currently the following version coding is used: LSB of Subsystem ID 0x00 0x01 0x11

CAN-PCIL revision V1.x V2.x V2.x

Features nvSRAM installed

The LSB of the Subsystem ID should be interpreted as follows: • b3..b0: A number that is incremented on significant changes. Drivers may ignore this number, as we normally try to be downward compatible with all features. Drivers may check for numbers greater than a certain level to ensure a feature is present. • b7..b4: Feature Flags where each bit is used to indicate a specific feature (independent of b3..b0). Drivers should not ignore these bits. The PLX9030 provides address spaces to access the local configuration registers (in both I/O and memory range). These registers are used to configure the PLX behaviour (i.e. access times at the local bus or local bus configuration). They are not the same as the configuration space registers. Additionally three address spaces are configured through which the CAN controllers and some boardregisters can be accessed. PCI base address register 0 1 2 3 4 5

Local address space 0 1 2 3

Description Local configuration registers (memory mapped) Local configuration registers (I/O mapped) CAN address space Reserved On-Board registers nvSRAM

Size 128 B 128 B 4 kB 4 kB 4 kB 1 MB

The actual addresses for these memory spaces are configured by the PCI-BIOS of your system every time the computer is booted. If you wish to access one of these spaces, then you need to read the actual addresses from the PCI configuration space!

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The CAN-PCIL does not provide an expansion ROM.

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4 - 16

4.2

CAN address space

Through the memory address space (Base address register 2) the CAN controllers of the CAN-PCIL are accessed. Address Offset 0x000..0x0ff 0x100..0x102 0x200..0x2ff 0x300..0x302 0x400..0x4ff 0x500..0x502 0x600..0x6ff 0x700..0x702

accesses: CAN controller 0 registers CAN controller 0 control CAN controller 1 registers CAN controller 1 control CAN controller 2 registers (if present) CAN controller 2 control (if present) CAN controller 3 registers (if present) CAN controller 3 control (if present)

Besides the registers of the SJA1000 (which are defined in the SJA1000 Manual), there are two additional registers which control the line termination and the front panel LEDs. These registers are unique for each channel. CAN_TERM0,1 7 6 5

4 3 Reserved

0x[13]00 (byte, wo) 2 1 0 TERM

PCI-RESET: TERM Reserved

Set to zero to disable the line-termination, Set to one to enable the termination resistor. Reserved positions should be written as zero for compatibility with future products. In earlier manuals this register was documented as read/write (and it still is), however for future compatibility you should not rely on this feature.

CAN_LED0,1 7 6 5 4 reserved PCI-RESET: LEDR LEDG Reserved

0

3

0x[13]02 (byte, wo) 2 1 0 LEDG LEDR 0

0

Write 1 to turn red LED indicator on, write 0 to disable. Write 1 to turn green LED indicator on, write 0 to disable. Reserved positions should be written as zero for compatibility with future products.

Notice: No LED indicators are implemented for CAN channel 2 and 3.

4.3

On-board registers

This address space (Base address register 4) provides some on-board registers, run-time configuration purposes that are outside of the scope of the 9030’s local configuration registers. Address Offset 0x1 (byte only!) 0x3 (byte only!) 0x5 (byte only!)

© Janz Tec AG

Read access INT_STAT BOARD_NUM EXTO_PRES

Write access INT_DISABLE INT_ENABLE RESET_ASSERT

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CAN-PCIL (Hardware Manual) • Programming Information

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0x7 (byte only!)

4.4

4 - 17

RESET_DEASSERT

nvSRAM

This address space (Base address register 5) provides access to the nvSRAM device. The nvSRAM memory saves data into an internal backup EERPOM when power goes down. To provide energy for this task, a buffer capacitor is used. Therefore it is completely maintenance free as no battery is required. Address Offset 0x00000..0x7ffff 0x80000..0x9ffff 0xa0000..0xfffff

description reserved nvSRAM reserved

The nvSRAM can be accessed by 8-, 16- and 32 bit operations (read and write). If nvSRAM is accessed by 16 or 32 bit operations, these are not atomar. In case of power down, it might happen that only parts of the 32 bit value are stored in the nvSRAM. Also notice that the PCI interface has buffers. Even if the write operation has been finished from CPU point of view, it might not have been saved into the memory. To make sure data has reached the memory, you need to read back the latest written content. Address decocder 5 is not enabled on version 1.x of the CAN-PCIL, hence the resource is not available.

4.5

Register Description

4.5.1 CAN Interrupts The INT# lines of all CAN controllers are logically ored, and share the same PCI-bus interrupt (IRQA#).

&

CAN_INT0# CAN_INT1#

PLX9030

>-1

&

LINT1 INTA#

INT_MASK

I1 I0

PCI-IRQ A

Latch

INT_STAT

INTSTAT

figure 5: MODULbus interrupt scheme (likewise for CAN_INT2# and CAN_INT3#)

o determine which CAN-controller has generated the interrupt, the Interrupt handler needs to read the interrupt status register: INT_STAT 7 Reserved Rev. 2.0

4

0x1 (byte, ro) 3 2 1 0 CAN3 CAN2 CAN1 CAN0 © Janz Tec AG

CAN-PCIL (Hardware Manual) • Programming Information

4 - 18

M[1..0]

Reserved

Interrupt status info. Each defined bit in this register reflects the status of the INT# pin of the corresponding CAN controller. A zero will be read when an interrupt is pending. If a CAN interrupt request line is disabled, then the corresponding bit is forced to “1”. Reserved positions are undefined, and must not be considered. Software must mask them off.

The interrupt handling routine can freely choose an algorithm to assign priorities to the different interrupt sources on a CAN-PCIL. CAN interrupt requests can be masked off by the CPU. This is done through the interrupt disable/enable registers. Interrupts are disabled after PCI-RESET, and you need to enable a CAN interrupt line before using it. INT_DISABLE 7 Reserved INT_ENABLE 7 Reserved I[1..0]

Reserved

4.5.2

4

4

3 I3

0x1 (byte, wo) 2 1 0 I2 I1 I0

3 I3

0x3 (byte, wo) 2 1 0 I2 I1 I0

Writing one of the bits disables/enables interrupts from the corresponding CAN controller. Both registers are accessed in hot-1 technique: Writing a one to a bit disables/enables further interrupts from the corresponding controller, writing zero to a bit does not affect the interrupt mask status of that controller. Bit I0 corresponds to CAN controller 0 and so on. If a CAN interrupt request line is disabled, then this CAN controller will never appear in the INTSTAT register and it will not cause interrupts. Reserved bit positions must be written as zero.

Board Number

If you plug several CAN-PCIL boards into a system, they can only be distinguished by the PCI device number. Sometimes it is unknown in which way physical slots are mapped to PCI device numbers. To uniquely identify one a specific CAN-PCIL boards, you can read the BOARD_NUM register. The value of this register is controlled by the HEX switch on the CAN-PCIL.

BOARD_NUM 7 6 5

BOARD_NUM

4.5.3

4 3 BOARD_NUM

0x3 (byte, ro) 2 1 0

The value of the HEX switch. Values form 0..15 can be set by the HEX switch.

CAN Controller Reset

To ensure a defined state of the CAN controllers at any time, it is possible to activate the RST# line of a controller via software. This can be done with the reset assert/deassert registers. The RST# line of all controllers is activated during a PCI-RESET.

RESET_ASSERT 7 Reserved

© Janz Tec AG

4

3 M3

0x5 (byte, wo) 2 1 0 M2 M1 M0

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CAN-PCIL (Hardware Manual) • Programming Information RESET_DEASSERT 7 4 Reserved M[3..0]

Reserved

4.5.4

3 M3

4 - 19

0x7 (byte, wo) 2 1 0 M2 M1 M0

Writing one of the bits asserts/deassert the RST# line of the corresponding CAN controller. Both registers are accessed in hot-1 technique: Writing a one to a bit asserts/deasserts RST# of a selected controller, writing zero to a bit does not affect the state of the RST# line of a controller. Bit M0 corresponds to CAN controller 0 and so on. Reserved bit positions must be written as zero.

Expansion Module Presence Detection

To check if a PCIx/EXT module is plugged onto the CAN-PCIL board, you can check the following register.

EXT_PRES 7

EP Reserved

4 3 Reserved

0x5 (byte, ro) 2 1 0 EP

Read high when the expansion module is present, else read as zero. Reserved bit positions must not be considered.

The EP bit reading is undefined in version 1.x of the CAN-PCIL. Check subsystem ID to detect if valid data can be read from the EXT_PRES register.

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CAN-PCIL (Hardware Manual) • Appendices

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5

Appendices

5.1

Technical Data

PCI Type Signaling Bus clock frequency Interrupt

32bit Slave only board, Rev 2.2 compliant 3,3 V / 5 V (keyed) 0 .. 33 MHz IRQA#

CAN Controller Physical layer Isolation barrier Connector Line termination

SJA1000, CAN 2.0B ISO/DIS 11898-2 optional, 500V 9pol D-SUB On board 120Ohm, enabled by jumper or software

nvSRAM Size Transfer Speed

128 kB Read: up to 3 MB/s, Write: up to 5 MB/s

Physical Dimensions PCB Size Slot requirements Weight

130 mm x 100 mm (short card) 1 slot. 90 g (w.o. PCIx/EXT(O) module)

Power Requirements +5V (±5%) +3.3V ±12V

500 mA 700 mA not required not required

2 CAN 4 CAN (with CAN-PCIx/EXTO)

Environmental Specifications Temperature range 0..+70 °C (operating), -20..+75 °C (non operating) Humidity 0%..80%, non condensing

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CAN-PCIL (Hardware Manual) • Appendices

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130mm

87mm

87mm

V1.x

130mm

87mm

111mm

V2.x

figure 6: Physical Dimensions

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CAN-PCIL (Hardware Manual) • Appendices

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5.2

References

These references direct you to manuals and specification, that you might need to know when you attempt programming the CAN-PCI2. Most of the documents can be downloaded from the Internet. Look for the WWW servers of the chip manufacturers. [1] [2] [3]

PCI local bus specification, PCI Special Interest Group, Revision 2.2, December 1998. PCI 9030 Data Book, Version 1.4, PLX Technology, May 2002. Data Sheet: SJA1000 Stand-alone CAN controller, Philips Semiconductor, 2000 Jan 04.

WWW-References Janz Tec AG: PCI Special Interrest Group PLX Philips Semiconductor

© Janz Tec AG

www.janztec.com www.pcisig.org www.plxtech.com http://www.semiconductors.philips.com

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5.3

5 - 23

Pin Assignment CAN0/1 Connector U100/200

This is the connector for CAN0

DSUB 1 2 3 4 5 6 7 8 9

NC CAN_L 2) GND NC NC GND CAN_H 2) NC EXVCC 2)

Flat cable header 1 3 5 7 9 2 4 6 8 10

Notes: 1) N/A. 2) For use of external transceiver (e.g. required for the CANOPTOkit) a special version of the CAN-PCIL exists, that provides TLL-level Tx and Rx signals of the CAN controller in place of CAN_H and CAN_L . This version provides +5V power on EXVCC pin to power the external transceiver. The +5V power is fused by a polyswitch (V2.x only)!

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5.4

Pin Assingment Flat Cable Header (CAN-2 and CAN-3)

This section show the pin assignment for the flat cable header on the CAN-PCIx/EXT. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Signalname CAN_GND CAN_L CAN-H CAN_GND EXVCC1) CAN_GND CAN_L CAN-H CAN_GND EXVCC1) -

Direction in/out in/out in/out in/out -

CAN2

CAN3

table 3:Pin assignment flat cable header 1)

optional EXVCC (+5V) voltage is available on pin1 (if R100 for CAN2 and R201 for CAN3 are equipped).

The CAN-PCIH/EXT comes with a fan-out cable that provides two 9pin D-SUB mounted on a standard PCI bracket.

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5.5

5 - 25

Product History

Version

Name Changes

V1.0

Release Date 11.05.2004

as

• initial version

V1.1

-

-

• Added LED indicator for CAN1

V1.2

-

-

• Converted to RoHS compliant

V2.0

21.05.2012

As

• Added optional 128 KB nvSRAM • Added optional expansion connector to add CAN-PCIx/EXT module for two additional CAN interfaces • Lattice PLD replaced by Xilinx PLD • Reworked PCB layout (rearranged CAN physical interface section with new isolator technology). • Changed PCI subsystem ID. • Except for the new subsystem ID, old software should run as before.

Rev. 2.0

© Janz Tec AG

CAN-PCIL (Hardware Manual) • Appendices

5 - 26

5.6

Manual History

Version 1.0

Release Name Date 12.05.2004 as

Changes •

Initial version

• • • •

Updated for V2.0 Removed some references to V1.0 Changed to Janz Tec Added safety instructions

•

2.0

30.05.2012 As

•

© Janz Tec AG

Rev. 2.0